b167421e55
Add the latest linux available from https://github.com/armbian/build commit de58ac1faac92724c6449db12c22affaeb003875, tag: sunxi-5.3, alongside all the patches that it comes with. Signed-off-by: Vicentiu Galanopulo <vicentiu@balena.io>
70 lines
2.5 KiB
Diff
70 lines
2.5 KiB
Diff
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c
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index 0f388f6944d5..582ebd41d20d 100644
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--- a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c
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+++ b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c
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@@ -65,19 +65,19 @@ static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
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BIT(28), /* lock */
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CLK_SET_RATE_UNGATE);
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-/* TODO: The result of N/M is required to be in [8, 25] range. */
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-static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(pll_video0_clk, "pll-video0",
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- "osc24M", 0x0010,
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- 192000000, /* Minimum rate */
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- 8, 7, /* N */
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- 0, 4, /* M */
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- BIT(24), /* frac enable */
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- BIT(25), /* frac select */
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- 270000000, /* frac rate 0 */
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- 297000000, /* frac rate 1 */
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- BIT(31), /* gate */
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- BIT(28), /* lock */
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- CLK_SET_RATE_UNGATE);
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+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(pll_video0_clk, "pll-video0",
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+ "osc24M", 0x0010,
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+ 192000000, /* Minimum rate */
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+ 1008000000, /* Maximum rate */
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+ 8, 7, /* N */
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+ 0, 4, /* M */
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+ BIT(24), /* frac enable */
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+ BIT(25), /* frac select */
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+ 270000000, /* frac rate 0 */
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+ 297000000, /* frac rate 1 */
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+ BIT(31), /* gate */
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+ BIT(28), /* lock */
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+ CLK_SET_RATE_UNGATE);
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/* TODO: The result of N/M is required to be in [8, 25] range. */
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static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
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@@ -152,19 +152,19 @@ static struct ccu_nk pll_periph1_clk = {
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},
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};
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-/* TODO: The result of N/M is required to be in [8, 25] range. */
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-static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(pll_video1_clk, "pll-video1",
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- "osc24M", 0x030,
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- 192000000, /* Minimum rate */
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- 8, 7, /* N */
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- 0, 4, /* M */
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- BIT(24), /* frac enable */
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- BIT(25), /* frac select */
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- 270000000, /* frac rate 0 */
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- 297000000, /* frac rate 1 */
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- BIT(31), /* gate */
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- BIT(28), /* lock */
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- CLK_SET_RATE_UNGATE);
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+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(pll_video1_clk, "pll-video1",
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+ "osc24M", 0x030,
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+ 192000000, /* Minimum rate */
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+ 1008000000, /* Maximum rate */
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+ 8, 7, /* N */
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+ 0, 4, /* M */
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+ BIT(24), /* frac enable */
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+ BIT(25), /* frac select */
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+ 270000000, /* frac rate 0 */
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+ 297000000, /* frac rate 1 */
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+ BIT(31), /* gate */
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+ BIT(28), /* lock */
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+ CLK_SET_RATE_UNGATE);
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static struct ccu_nkm pll_sata_clk = {
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.enable = BIT(31),
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