b167421e55
Add the latest linux available from https://github.com/armbian/build commit de58ac1faac92724c6449db12c22affaeb003875, tag: sunxi-5.3, alongside all the patches that it comes with. Signed-off-by: Vicentiu Galanopulo <vicentiu@balena.io>
53 lines
1.6 KiB
Diff
53 lines
1.6 KiB
Diff
From 7fe79d7ef105939f10903d87c44b8ea4da3bc4ae Mon Sep 17 00:00:00 2001
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From: Ondrej Jirman <megous@megous.com>
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Date: Sat, 30 Sep 2017 02:46:55 +0200
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Subject: [PATCH 31/82] ARM: dts: sun8i-a83t: Add CSI0 node for cmos sensor
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interface driver
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Signed-off-by: Ondrej Jirman <megous@megous.com>
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---
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arch/arm/boot/dts/sun8i-a83t.dtsi | 21 +++++++++++++++++++++
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1 file changed, 21 insertions(+)
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diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
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index 00a02b037320..66f035ead79a 100644
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--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
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+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
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@@ -636,6 +636,20 @@
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#reset-cells = <1>;
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};
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+ csi0: csi@01cb0000 {
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+ compatible = "allwinner,sun8i-a83t-csi";
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+ reg = <0x01cb0000 0x1000>; /* manual says 0x40000 size */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_CSI>,
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+ <&ccu CLK_CSI_SCLK>,
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+ <&ccu CLK_DRAM_CSI>;
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+ clock-names = "ahb", "mod", "ram";
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+ resets = <&ccu RST_BUS_CSI>;
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+ status = "disabled";
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+ };
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+
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pio: pinctrl@1c20800 {
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compatible = "allwinner,sun8i-a83t-pinctrl";
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
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@@ -649,6 +663,13 @@
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#interrupt-cells = <3>;
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#gpio-cells = <3>;
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+ csi0_pins: csi0-pins {
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+ pins = "PE0", "PE1", "PE2", "PE3", "PE4",
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+ "PE5", "PE6", "PE7", "PE8", "PE9",
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+ "PE10", "PE11", "PE12", "PE13";
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+ function = "csi";
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+ };
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+
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emac_rgmii_pins: emac-rgmii-pins {
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pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
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"PD11", "PD12", "PD13", "PD14", "PD18",
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--
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2.20.1
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