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Merge pull request #542 from obones/setDIOMapping

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Introduce the setDIOMapping method
This commit is contained in:
Jan Gromeš 2022-07-13 23:04:48 +02:00 • committed by GitHub
commit 96f2e34e09
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10 changed files with 248 additions and 16 deletions
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10
src/TypeDef.h
View file

@ -203,6 +203,16 @@
*/
#define RADIOLIB_ERR_LORA_HEADER_DAMAGED (-24)
/*!
\brief The requested functionality is not supported for this device
*/
#define RADIOLIB_ERR_UNSUPPORTED (-25)
/*!
\brief The specified DIO pin does not exist on this device
*/
#define RADIOLIB_ERR_INVALID_DIO_PIN (-26)
// RF69-specific status codes
/*!

7
src/modules/CC1101/CC1101.cpp
View file

@ -885,6 +885,13 @@ void CC1101::readBit(RADIOLIB_PIN_TYPE pin) {
updateDirectBuffer((uint8_t)digitalRead(pin));
}
int16_t CC1101::setDIOMapping(RADIOLIB_PIN_TYPE pin, uint8_t value) {
if (pin > 2)
return RADIOLIB_ERR_INVALID_DIO_PIN;
return(SPIsetRegValue(RADIOLIB_CC1101_REG_IOCFG0 - pin, value));
}
int16_t CC1101::config() {
// Reset the radio. Registers may be dirty from previous usage.
SPIsendCommand(RADIOLIB_CC1101_CMD_RESET);

11
src/modules/CC1101/CC1101.h
View file

@ -932,6 +932,17 @@ class CC1101: public PhysicalLayer {
*/
void readBit(RADIOLIB_PIN_TYPE pin);
/*!
\brief Configure DIO pin mapping to get a given signal on a DIO pin (if available).
\param pin Pin number onto which a signal is to be placed.
\param value The value that indicates which function to place on that pin. See chip datasheet for details.
\returns \ref status_codes
*/
int16_t setDIOMapping(RADIOLIB_PIN_TYPE pin, uint8_t value);
#if !defined(RADIOLIB_GODMODE) && !defined(RADIOLIB_LOW_LEVEL)
protected:
#endif

10
src/modules/RF69/RF69.cpp
View file

@ -903,6 +903,16 @@ void RF69::readBit(RADIOLIB_PIN_TYPE pin) {
updateDirectBuffer((uint8_t)digitalRead(pin));
}
int16_t RF69::setDIOMapping(RADIOLIB_PIN_TYPE pin, uint8_t value) {
if (pin > 5)
return RADIOLIB_ERR_INVALID_DIO_PIN;
if (pin < 4)
return(_mod->SPIsetRegValue(RADIOLIB_RF69_REG_DIO_MAPPING_1, value, 7 - 2 * pin, 6 - 2 * pin));
else
return(_mod->SPIsetRegValue(RADIOLIB_RF69_REG_DIO_MAPPING_2, value, 15 - 2 * pin, 14 - 2 * pin));
}
int16_t RF69::getChipVersion() {
return(_mod->SPIgetRegValue(RADIOLIB_RF69_REG_VERSION));
}

41
src/modules/RF69/RF69.h
View file

@ -295,8 +295,38 @@
#define RADIOLIB_RF69_DIO1_PACK_PLL_LOCK 0b00110000 // 5 4
#define RADIOLIB_RF69_DIO1_PACK_TIMEOUT 0b00110000 // 5 4
#define RADIOLIB_RF69_DIO2_CONT_DATA 0b00000000 // 3 2
#define RADIOLIB_RF69_DIO2_PACK_FIFO_NOT_EMPTY 0b00000000 // 3 2
#define RADIOLIB_RF69_DIO2_PACK_AUTO_MODE 0b00001100 // 3 2
#define RADIOLIB_RF69_DIO2_PACK_DATA 0b00000100 // 3 2
#define RADIOLIB_RF69_DIO3_CONT_AUTO_MODE 0b00000010 // 0 1
#define RADIOLIB_RF69_DIO3_CONT_RSSI 0b00000000 // 0 1
#define RADIOLIB_RF69_DIO3_CONT_RX_READY 0b00000001 // 0 1
#define RADIOLIB_RF69_DIO3_CONT_TIMEOUT 0b00000011 // 0 1
#define RADIOLIB_RF69_DIO3_CONT_TX_READY 0b00000001 // 0 1
#define RADIOLIB_RF69_DIO3_PACK_FIFO_FULL 0b00000000 // 0 1
#define RADIOLIB_RF69_DIO3_PACK_PLL_LOCK 0b00000011 // 0 1
#define RADIOLIB_RF69_DIO3_PACK_RSSI 0b00000001 // 0 1
#define RADIOLIB_RF69_DIO3_PACK_SYNC_ADDRESSS 0b00000010 // 0 1
#define RADIOLIB_RF69_DIO3_PACK_TX_READY 0b00000001 // 0 1
// RF69_REG_DIO_MAPPING_2
#define RADIOLIB_RF69_DIO4_CONT_PLL_LOCK 0b11000000 // 7 6
#define RADIOLIB_RF69_DIO4_CONT_TIMEOUT 0b00000000 // 7 6
#define RADIOLIB_RF69_DIO4_CONT_RX_READY 0b01000000 // 7 6
#define RADIOLIB_RF69_DIO4_CONT_SYNC_ADDRESS 0b10000000 // 7 6
#define RADIOLIB_RF69_DIO4_CONT_TX_READY 0b01000000 // 7 6
#define RADIOLIB_RF69_DIO4_PACK_PLL_LOCK 0b11000000 // 7 6
#define RADIOLIB_RF69_DIO4_PACK_TIMEOUT 0b00000000 // 7 6
#define RADIOLIB_RF69_DIO4_PACK_RSSI 0b01000000 // 7 6
#define RADIOLIB_RF69_DIO4_PACK_RX_READY 0b10000000 // 7 6
#define RADIOLIB_RF69_DIO4_PACK_MODE_READY 0b00000000 // 7 6
#define RADIOLIB_RF69_DIO4_PACK_TX_READY 0b01000000 // 7 6
#define RADIOLIB_RF69_DIO5_CONT_MODE_READY 0b00110000 // 5 4
#define RADIOLIB_RF69_DIO5_CONT_CLK_OUT 0b00000000 // 5 4
#define RADIOLIB_RF69_DIO5_CONT_RSSI 0b00010000 // 5 4
#define RADIOLIB_RF69_DIO5_PACK_MODE_READY 0b00110000 // 5 4
#define RADIOLIB_RF69_DIO5_PACK_CLK_OUT 0b00000000 // 5 4
#define RADIOLIB_RF69_DIO5_PACK_DATA 0b00010000 // 5 4
#define RADIOLIB_RF69_CLK_OUT_FXOSC 0b00000000 // 2 0 ClkOut frequency: F(XOSC)
#define RADIOLIB_RF69_CLK_OUT_FXOSC_2 0b00000001 // 2 0 F(XOSC) / 2
#define RADIOLIB_RF69_CLK_OUT_FXOSC_4 0b00000010 // 2 0 F(XOSC) / 4
@ -969,6 +999,17 @@ class RF69: public PhysicalLayer {
*/
void readBit(RADIOLIB_PIN_TYPE pin);
/*!
\brief Configure DIO pin mapping to get a given signal on a DIO pin (if available).
\param pin Pin number onto which a signal is to be placed.
\param value The value that indicates which function to place on that pin. See chip datasheet for details.
\returns \ref status_codes
*/
int16_t setDIOMapping(RADIOLIB_PIN_TYPE pin, uint8_t value);
#if !defined(RADIOLIB_GODMODE) && !defined(RADIOLIB_LOW_LEVEL)
protected:
#endif

68
src/modules/SX1231/SX1231.h
View file

@ -18,6 +18,74 @@
//SX1231_REG_TEST_OOK
#define RADIOLIB_SX1231_OOK_DELTA_THRESHOLD 0x0C
// SX1231_REG_DIO_MAPPING_1
#define RADIOLIB_SX1231_DIO0_CONT_LOW_BAT 0b10000000 // 7 6
#define RADIOLIB_SX1231_DIO0_CONT_MODE_READY 0b11000000 // 7 6
#define RADIOLIB_SX1231_DIO0_CONT_PLL_LOCK 0b00000000 // 7 6
#define RADIOLIB_SX1231_DIO0_CONT_SYNC_ADDRESS 0b00000000 // 7 6
#define RADIOLIB_SX1231_DIO0_CONT_TIMEOUT 0b01000000 // 7 6
#define RADIOLIB_SX1231_DIO0_CONT_RSSI 0b10000000 // 7 6
#define RADIOLIB_SX1231_DIO0_CONT_MODE_READY 0b11000000 // 7 6
#define RADIOLIB_SX1231_DIO0_CONT_TX_READY 0b01000000 // 7 6
#define RADIOLIB_SX1231_DIO0_PACK_LOW_BAT 0b10000000 // 7 6
#define RADIOLIB_SX1231_DIO0_PACK_PLL_LOCK 0b11000000 // 7 6
#define RADIOLIB_SX1231_DIO0_PACK_CRC_OK 0b00000000 // 7 6
#define RADIOLIB_SX1231_DIO0_PACK_PAYLOAD_READY 0b01000000 // 7 6
#define RADIOLIB_SX1231_DIO0_PACK_SYNC_ADDRESS 0b10000000 // 7 6
#define RADIOLIB_SX1231_DIO0_PACK_RSSI 0b11000000 // 7 6
#define RADIOLIB_SX1231_DIO0_PACK_PACKET_SENT 0b00000000 // 7 6
#define RADIOLIB_SX1231_DIO0_PACK_TX_READY 0b01000000 // 7 6
#define RADIOLIB_SX1231_DIO1_CONT_LOW_BAT 0b00100000 // 5 4
#define RADIOLIB_SX1231_DIO1_CONT_PLL_LOCK 0b00110000 // 5 4
#define RADIOLIB_SX1231_DIO1_CONT_DCLK 0b00000000 // 5 4
#define RADIOLIB_SX1231_DIO1_CONT_RX_READY 0b00010000 // 5 4
#define RADIOLIB_SX1231_DIO1_CONT_SYNC_ADDRESS 0b00110000 // 5 4
#define RADIOLIB_SX1231_DIO1_CONT_TX_READY 0b00010000 // 5 4
#define RADIOLIB_SX1231_DIO1_PACK_FIFO_LEVEL 0b00000000 // 5 4
#define RADIOLIB_SX1231_DIO1_PACK_FIFO_FULL 0b00010000 // 5 4
#define RADIOLIB_SX1231_DIO1_PACK_FIFO_NOT_EMPTY 0b00100000 // 5 4
#define RADIOLIB_SX1231_DIO1_PACK_PLL_LOCK 0b00110000 // 5 4
#define RADIOLIB_SX1231_DIO1_PACK_TIMEOUT 0b00110000 // 5 4
#define RADIOLIB_SX1231_DIO2_CONT_DATA 0b00000000 // 3 2
#define RADIOLIB_SX1231_DIO2_PACK_FIFO_NOT_EMPTY 0b00000000 // 3 2
#define RADIOLIB_SX1231_DIO2_PACK_LOW_BAT 0b00001000 // 3 2
#define RADIOLIB_SX1231_DIO2_PACK_AUTO_MODE 0b00001100 // 3 2
#define RADIOLIB_SX1231_DIO2_PACK_DATA 0b00000100 // 3 2
#define RADIOLIB_SX1231_DIO3_CONT_AUTO_MODE 0b00000010 // 0 1
#define RADIOLIB_SX1231_DIO3_CONT_RSSI 0b00000000 // 0 1
#define RADIOLIB_SX1231_DIO3_CONT_RX_READY 0b00000001 // 0 1
#define RADIOLIB_SX1231_DIO3_CONT_TIMEOUT 0b00000011 // 0 1
#define RADIOLIB_SX1231_DIO3_CONT_TX_READY 0b00000001 // 0 1
#define RADIOLIB_SX1231_DIO3_PACK_FIFO_FULL 0b00000000 // 0 1
#define RADIOLIB_SX1231_DIO3_PACK_LOW_BAT 0b00000010 // 0 1
#define RADIOLIB_SX1231_DIO3_PACK_PLL_LOCK 0b00000011 // 0 1
#define RADIOLIB_SX1231_DIO3_PACK_RSSI 0b00000001 // 0 1
#define RADIOLIB_SX1231_DIO3_PACK_SYNC_ADDRESSS 0b00000010 // 0 1
#define RADIOLIB_SX1231_DIO3_PACK_TX_READY 0b00000001 // 0 1
// SX1231_REG_DIO_MAPPING_2
#define RADIOLIB_SX1231_DIO4_CONT_LOW_BAT 0b10000000 // 7 6
#define RADIOLIB_SX1231_DIO4_CONT_PLL_LOCK 0b11000000 // 7 6
#define RADIOLIB_SX1231_DIO4_CONT_TIMEOUT 0b00000000 // 7 6
#define RADIOLIB_SX1231_DIO4_CONT_RX_READY 0b01000000 // 7 6
#define RADIOLIB_SX1231_DIO4_CONT_SYNC_ADDRESS 0b10000000 // 7 6
#define RADIOLIB_SX1231_DIO4_CONT_TX_READY 0b01000000 // 7 6
#define RADIOLIB_SX1231_DIO4_PACK_LOW_BAT 0b10000000 // 7 6
#define RADIOLIB_SX1231_DIO4_PACK_PLL_LOCK 0b11000000 // 7 6
#define RADIOLIB_SX1231_DIO4_PACK_TIMEOUT 0b00000000 // 7 6
#define RADIOLIB_SX1231_DIO4_PACK_RSSI 0b01000000 // 7 6
#define RADIOLIB_SX1231_DIO4_PACK_RX_READY 0b10000000 // 7 6
#define RADIOLIB_SX1231_DIO4_PACK_MODE_READY 0b00000000 // 7 6
#define RADIOLIB_SX1231_DIO4_PACK_TX_READY 0b01000000 // 7 6
#define RADIOLIB_SX1231_DIO5_CONT_LOW_BAT 0b00100000 // 5 4
#define RADIOLIB_SX1231_DIO5_CONT_MODE_READY 0b00110000 // 5 4
#define RADIOLIB_SX1231_DIO5_CONT_CLK_OUT 0b00000000 // 5 4
#define RADIOLIB_SX1231_DIO5_CONT_RSSI 0b00010000 // 5 4
#define RADIOLIB_SX1231_DIO5_PACK_LOW_BAT 0b00100000 // 5 4
#define RADIOLIB_SX1231_DIO5_PACK_MODE_READY 0b00110000 // 5 4
#define RADIOLIB_SX1231_DIO5_PACK_CLK_OUT 0b00000000 // 5 4
#define RADIOLIB_SX1231_DIO5_PACK_DATA 0b00010000 // 5 4
/*!
\class SX1231

24
src/modules/SX127x/SX127x.cpp
View file

@ -362,10 +362,10 @@ int16_t SX127x::startReceive(uint8_t len, uint8_t mode) {
if(modem == RADIOLIB_SX127X_LORA) {
// set DIO pin mapping
if(_mod->SPIgetRegValue(RADIOLIB_SX127X_REG_HOP_PERIOD) > RADIOLIB_SX127X_HOP_PERIOD_OFF) {
state = _mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_RX_DONE | RADIOLIB_SX127X_DIO1_FHSS_CHANGE_CHANNEL, 7, 4);
state = _mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_LORA_RX_DONE | RADIOLIB_SX127X_DIO1_LORA_FHSS_CHANGE_CHANNEL, 7, 4);
}
else {
state = _mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_RX_DONE | RADIOLIB_SX127X_DIO1_RX_TIMEOUT, 7, 4);
state = _mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_LORA_RX_DONE | RADIOLIB_SX127X_DIO1_LORA_RX_TIMEOUT, 7, 4);
}
// set expected packet length for SF6
@ -523,9 +523,9 @@ int16_t SX127x::startTransmit(uint8_t* data, size_t len, uint8_t addr) {
// set DIO mapping
if(_mod->SPIgetRegValue(RADIOLIB_SX127X_REG_HOP_PERIOD) > RADIOLIB_SX127X_HOP_PERIOD_OFF) {
_mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_TX_DONE | RADIOLIB_SX127X_DIO1_FHSS_CHANGE_CHANNEL, 7, 4);
_mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_LORA_TX_DONE | RADIOLIB_SX127X_DIO1_LORA_FHSS_CHANGE_CHANNEL, 7, 4);
} else {
_mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_TX_DONE, 7, 6);
_mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_LORA_TX_DONE, 7, 6);
}
// apply fixes to errata
@ -655,7 +655,7 @@ int16_t SX127x::startChannelScan() {
RADIOLIB_ASSERT(state);
// set DIO pin mapping
state = _mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_CAD_DONE | RADIOLIB_SX127X_DIO1_CAD_DETECTED, 7, 4);
state = _mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_LORA_CAD_DONE | RADIOLIB_SX127X_DIO1_LORA_CAD_DETECTED, 7, 4);
RADIOLIB_ASSERT(state);
// clear interrupt flags
@ -1522,4 +1522,18 @@ void SX127x::clearFHSSInt(void) {
}
}
int16_t SX127x::setDIOMapping(RADIOLIB_PIN_TYPE pin, uint8_t value) {
if (pin > 5)
return RADIOLIB_ERR_INVALID_DIO_PIN;
if (pin < 4)
return(_mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, value, 7 - 2 * pin, 6 - 2 * pin));
else
return(_mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_2, value, 15 - 2 * pin, 14 - 2 * pin));
}
int16_t SX127x::setDIOPreambleDetect(bool usePreambleDetect) {
return _mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_2, (usePreambleDetect) ? RADIOLIB_SX127X_DIO_MAP_PREAMBLE_DETECT : RADIOLIB_SX127X_DIO_MAP_RSSI, 0, 0);
}
#endif

78
src/modules/SX127x/SX127x.h
View file

@ -141,14 +141,6 @@
#define RADIOLIB_SX127X_HOP_PERIOD_OFF 0b00000000 // 7 0 number of periods between frequency hops; 0 = disabled
#define RADIOLIB_SX127X_HOP_PERIOD_MAX 0b11111111 // 7 0
// SX127X_REG_DIO_MAPPING_1
#define RADIOLIB_SX127X_DIO0_RX_DONE 0b00000000 // 7 6
#define RADIOLIB_SX127X_DIO0_TX_DONE 0b01000000 // 7 6
#define RADIOLIB_SX127X_DIO0_CAD_DONE 0b10000000 // 7 6
#define RADIOLIB_SX127X_DIO1_RX_TIMEOUT 0b00000000 // 5 4
#define RADIOLIB_SX127X_DIO1_FHSS_CHANGE_CHANNEL 0b00010000 // 5 4
#define RADIOLIB_SX127X_DIO1_CAD_DETECTED 0b00100000 // 5 4
// SX127X_REG_IRQ_FLAGS
#define RADIOLIB_SX127X_CLEAR_IRQ_FLAG_RX_TIMEOUT 0b10000000 // 7 7 timeout
#define RADIOLIB_SX127X_CLEAR_IRQ_FLAG_RX_DONE 0b01000000 // 6 6 packet reception complete
@ -509,20 +501,64 @@
#define RADIOLIB_SX127X_FLAG_LOW_BAT 0b00000001 // 0 0 battery voltage dropped below threshold
// SX127X_REG_DIO_MAPPING_1
#define RADIOLIB_SX127X_DIO0_LORA_RX_DONE 0b00000000 // 7 6
#define RADIOLIB_SX127X_DIO0_LORA_TX_DONE 0b01000000 // 7 6
#define RADIOLIB_SX127X_DIO0_LORA_CAD_DONE 0b10000000 // 7 6
#define RADIOLIB_SX127X_DIO0_CONT_MODE_READY 0b11000000 // 7 6
#define RADIOLIB_SX127X_DIO0_CONT_SYNC_ADDRESS 0b00000000 // 7 6
#define RADIOLIB_SX127X_DIO0_CONT_TX_READY 0b00000000 // 7 6
#define RADIOLIB_SX127X_DIO0_CONT_RSSI_RADIOLIB_PREAMBLE_DETECTED 0b01000000 // 7 6
#define RADIOLIB_SX127X_DIO0_CONT_RSSI_PREAMBLE_DETECT 0b01000000 // 7 6
#define RADIOLIB_SX127X_DIO0_CONT_RX_READY 0b10000000 // 7 6
#define RADIOLIB_SX127X_DIO0_CONT_TX_READY 0b00000000 // 7 6
#define RADIOLIB_SX127X_DIO0_PACK_PAYLOAD_READY 0b00000000 // 7 6
#define RADIOLIB_SX127X_DIO0_PACK_PACKET_SENT 0b00000000 // 7 6
#define RADIOLIB_SX127X_DIO0_PACK_CRC_OK 0b01000000 // 7 6
#define RADIOLIB_SX127X_DIO0_PACK_TEMP_CHANGE_LOW_BAT 0b11000000 // 7 6
#define RADIOLIB_SX127X_DIO1_LORA_RX_TIMEOUT 0b00000000 // 5 4
#define RADIOLIB_SX127X_DIO1_LORA_FHSS_CHANGE_CHANNEL 0b01000000 // 5 4
#define RADIOLIB_SX127X_DIO1_LORA_CAD_DETECTED 0b10000000 // 5 4
#define RADIOLIB_SX127X_DIO1_CONT_DCLK 0b00000000 // 5 4
#define RADIOLIB_SX127X_DIO1_CONT_RSSI_RADIOLIB_PREAMBLE_DETECTED 0b00010000 // 5 4
#define RADIOLIB_SX127X_DIO1_CONT_RSSI_PREAMBLE_DETECT 0b00010000 // 5 4
#define RADIOLIB_SX127X_DIO1_PACK_FIFO_LEVEL 0b00000000 // 5 4
#define RADIOLIB_SX127X_DIO1_PACK_FIFO_EMPTY 0b00010000 // 5 4
#define RADIOLIB_SX127X_DIO1_PACK_FIFO_FULL 0b00100000 // 5 4
#define RADIOLIB_SX127X_DIO2_LORA_FHSS_CHANGE_CHANNEL 0b00000000 // 3 2
#define RADIOLIB_SX127X_DIO2_CONT_DATA 0b00000000 // 3 2
#define RADIOLIB_SX127X_DIO2_PACK_FIFO_FULL 0b00000000 // 3 2
#define RADIOLIB_SX127X_DIO2_PACK_RX_READY 0b00000100 // 3 2
#define RADIOLIB_SX127X_DIO2_PACK_TIMEOUT 0b00001000 // 3 2
#define RADIOLIB_SX127X_DIO2_PACK_SYNC_ADDRESS 0b00011000 // 3 2
#define RADIOLIB_SX127X_DIO3_LORA_CAD_DONE 0b00000000 // 0 1
#define RADIOLIB_SX127X_DIO3_LORA_VALID_HEADER 0b00000001 // 0 1
#define RADIOLIB_SX127X_DIO3_LORA_PAYLOAD_CRC_ERROR 0b00000010 // 0 1
#define RADIOLIB_SX127X_DIO3_CONT_TIMEOUT 0b00000000 // 0 1
#define RADIOLIB_SX127X_DIO3_CONT_RSSI_PREAMBLE_DETECT 0b00000001 // 0 1
#define RADIOLIB_SX127X_DIO3_CONT_TEMP_CHANGE_LOW_BAT 0b00000011 // 0 1
#define RADIOLIB_SX127X_DIO3_PACK_FIFO_EMPTY 0b00000000 // 0 1
#define RADIOLIB_SX127X_DIO3_PACK_TX_READY 0b00000001 // 0 1
// SX127X_REG_DIO_MAPPING_2
#define RADIOLIB_SX127X_DIO4_LORA_CAD_DETECTED 0b10000000 // 7 6
#define RADIOLIB_SX127X_DIO4_LORA_PLL_LOCK 0b01000000 // 7 6
#define RADIOLIB_SX127X_DIO4_CONT_TEMP_CHANGE_LOW_BAT 0b00000000 // 7 6
#define RADIOLIB_SX127X_DIO4_CONT_PLL_LOCK 0b01000000 // 7 6
#define RADIOLIB_SX127X_DIO4_CONT_TIMEOUT 0b10000000 // 7 6
#define RADIOLIB_SX127X_DIO4_CONT_MODE_READY 0b11000000 // 7 6
#define RADIOLIB_SX127X_DIO4_PACK_TEMP_CHANGE_LOW_BAT 0b00000000 // 7 6
#define RADIOLIB_SX127X_DIO4_PACK_PLL_LOCK 0b01000000 // 7 6
#define RADIOLIB_SX127X_DIO4_PACK_TIMEOUT 0b10000000 // 7 6
#define RADIOLIB_SX127X_DIO4_PACK_RSSI_PREAMBLE_DETECT 0b11000000 // 7 6
#define RADIOLIB_SX127X_DIO5_LORA_MODE_READY 0b00000000 // 5 4
#define RADIOLIB_SX127X_DIO5_LORA_CLK_OUT 0b00010000 // 5 4
#define RADIOLIB_SX127X_DIO5_CONT_CLK_OUT 0b00000000 // 5 4
#define RADIOLIB_SX127X_DIO5_CONT_PLL_LOCK 0b00010000 // 5 4
#define RADIOLIB_SX127X_DIO5_CONT_RSSI_PREAMBLE_DETECT 0b00100000 // 5 4
#define RADIOLIB_SX127X_DIO5_CONT_MODE_READY 0b00110000 // 5 4
#define RADIOLIB_SX127X_DIO5_PACK_CLK_OUT 0b00000000 // 5 4
#define RADIOLIB_SX127X_DIO5_PACK_PLL_LOCK 0b00010000 // 5 4
#define RADIOLIB_SX127X_DIO5_PACK_DATA 0b00100000 // 5 4
#define RADIOLIB_SX127X_DIO5_PACK_MODE_READY 0b00110000 // 5 4
#define RADIOLIB_SX127X_DIO_MAP_PREAMBLE_DETECT 0b00000001 // 0 0
#define RADIOLIB_SX127X_DIO_MAP_RSSI 0b00000000 // 0 0
// SX1272_REG_PLL_HOP + SX1278_REG_PLL_HOP
#define RADIOLIB_SX127X_FAST_HOP_OFF 0b00000000 // 7 7 carrier frequency validated when FRF registers are written
@ -1169,6 +1205,26 @@ class SX127x: public PhysicalLayer {
*/
void clearFHSSInt(void);
/*!
\brief Configure DIO pin mapping to get a given signal on a DIO pin (if available).
\param pin Pin number onto which a signal is to be placed.
\param value The value that indicates which function to place on that pin. See chip datasheet for details.
\returns \ref status_codes
*/
int16_t setDIOMapping(RADIOLIB_PIN_TYPE pin, uint8_t value);
/*!
\brief Configure DIO mapping to use RSSI or Preamble Detect for pins that support it.
\param usePreambleDetect Whether to use PreambleDetect (true) or RSSI (false) on the pins that are mapped to this function.
\returns \ref status_codes
*/
int16_t setDIOPreambleDetect(bool usePreambleDetect);
#if !defined(RADIOLIB_GODMODE) && !defined(RADIOLIB_LOW_LEVEL)
protected:
#endif

4
src/protocols/PhysicalLayer/PhysicalLayer.cpp
View file

@ -246,3 +246,7 @@ void PhysicalLayer::updateDirectBuffer(uint8_t bit) {
}
}
}
int16_t PhysicalLayer::setDIOMapping(RADIOLIB_PIN_TYPE pin, uint8_t value) {
return(RADIOLIB_ERR_UNSUPPORTED);
}

11
src/protocols/PhysicalLayer/PhysicalLayer.h
View file

@ -300,6 +300,17 @@ class PhysicalLayer {
*/
uint8_t read();
/*!
\brief Configure DIO pin mapping to get a given signal on a DIO pin (if available).
\param pin Pin number onto which a signal is to be placed.
\param value The value that indicates which function to place on that pin. See chip datasheet for details.
\returns \ref status_codes
*/
virtual int16_t setDIOMapping(RADIOLIB_PIN_TYPE pin, uint8_t value);
protected:
void updateDirectBuffer(uint8_t bit);