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Merge pull request #651 from notsleep196/master

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[SX127x] Fix FSK Stream mode TX and RX
This commit is contained in:
Jan Gromeš 2022-12-22 17:33:26 +01:00 • committed by GitHub
commit 8d02fda5a1
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GPG key ID: 4AEE18F83AFDEB23
2 changed files with 12 additions and 23 deletions
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16
examples/Stream/Stream_Transmit/Stream_Transmit.ino
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@ -86,6 +86,8 @@ volatile bool transmittedFlag = false;
// disable interrupt when it's not needed // disable interrupt when it's not needed
volatile bool enableInterrupt = true; volatile bool enableInterrupt = true;
bool isFifoEmpty = false;
// how many bytes are there in total // how many bytes are there in total
volatile int totalLength = longPacket.length(); volatile int totalLength = longPacket.length();
@ -104,13 +106,19 @@ void fifoAdd(void) {
if(!enableInterrupt) { if(!enableInterrupt) {
return; return;
} }
isFifoEmpty = true;
// add more bytes to the transmit buffer
uint8_t* txBuffPtr = (uint8_t*)longPacket.c_str();
transmittedFlag = radio.fifoAdd(txBuffPtr, totalLength, &remLength);
} }
void loop() { void loop() {
if (isFifoEmpty) {
enableInterrupt = false;
// add more bytes to the transmit buffer
uint8_t* txBuffPtr = (uint8_t*)longPacket.c_str();
transmittedFlag = radio.fifoAdd(txBuffPtr, totalLength, &remLength);
enableInterrupt = true;
isFifoEmpty = false;
}
// check if the previous transmission finished // check if the previous transmission finished
if(transmittedFlag) { if(transmittedFlag) {
// disable the interrupt service routine while // disable the interrupt service routine while

19
src/modules/SX127x/SX127x.cpp
View file

@ -478,16 +478,9 @@ bool SX127x::fifoAdd(uint8_t* data, int totalLen, volatile int* remLen) {
len = RADIOLIB_SX127X_FIFO_THRESH - 1; len = RADIOLIB_SX127X_FIFO_THRESH - 1;
} }
// clear interrupt flags
clearIRQFlags();
// copy the bytes to the FIFO // copy the bytes to the FIFO
_mod->SPIwriteRegisterBurst(RADIOLIB_SX127X_REG_FIFO, &data[totalLen - *remLen], len); _mod->SPIwriteRegisterBurst(RADIOLIB_SX127X_REG_FIFO, &data[totalLen - *remLen], len);
// this is a hack, but it seems Rx FIFO level is getting triggered 1 byte before it should
// we just add a padding byte that we can drop without consequence
_mod->SPIwriteRegister(RADIOLIB_SX127X_REG_FIFO, '/');
// we're not done yet // we're not done yet
return(false); return(false);
} }
@ -507,12 +500,6 @@ bool SX127x::fifoGet(volatile uint8_t* data, int totalLen, volatile int* rcvLen)
_mod->SPIreadRegisterBurst(RADIOLIB_SX127X_REG_FIFO, len, dataPtr); _mod->SPIreadRegisterBurst(RADIOLIB_SX127X_REG_FIFO, len, dataPtr);
(*rcvLen) += (len); (*rcvLen) += (len);
// dump the padding byte
_mod->SPIreadRegister(RADIOLIB_SX127X_REG_FIFO);
// clear flags
clearIRQFlags();
// check if we're done // check if we're done
if(*rcvLen >= totalLen) { if(*rcvLen >= totalLen) {
return(true); return(true);
@ -582,12 +569,6 @@ int16_t SX127x::startTransmit(uint8_t* data, size_t len, uint8_t addr) {
} }
_mod->SPIwriteRegisterBurst(RADIOLIB_SX127X_REG_FIFO, data, packetLen); _mod->SPIwriteRegisterBurst(RADIOLIB_SX127X_REG_FIFO, data, packetLen);
// this is a hack, but it seems than in Stream mode, Rx FIFO level is getting triggered 1 byte before it should
// just add a padding byte that can be dropped without consequence
if((modem == RADIOLIB_SX127X_FSK_OOK) && (len > RADIOLIB_SX127X_MAX_PACKET_LENGTH_FSK)) {
_mod->SPIwriteRegister(RADIOLIB_SX127X_REG_FIFO, '/');
}
// set RF switch (if present) // set RF switch (if present)
_mod->setRfSwitchState(LOW, HIGH); _mod->setRfSwitchState(LOW, HIGH);