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[SX127x] Added FSK CRC mode configuration (#266)

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This commit is contained in:
jgromes 2021-03-14 16:07:44 +01:00
parent fea986fcf4
commit 519b34d309
4 changed files with 38 additions and 16 deletions
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21
src/modules/SX127x/SX1272.cpp
View file

@ -354,21 +354,30 @@ float SX1272::getRSSI() {
} }
} }
int16_t SX1272::setCRC(bool enableCRC) { int16_t SX1272::setCRC(bool enable, bool mode) {
if(getActiveModem() == SX127X_LORA) { if(getActiveModem() == SX127X_LORA) {
// set LoRa CRC // set LoRa CRC
SX127x::_crcEnabled = enableCRC; SX127x::_crcEnabled = enable;
if(enableCRC) { if(enable) {
return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1272_RX_CRC_MODE_ON, 2, 2)); return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1272_RX_CRC_MODE_ON, 2, 2));
} else { } else {
return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1272_RX_CRC_MODE_OFF, 2, 2)); return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1272_RX_CRC_MODE_OFF, 2, 2));
} }
} else { } else {
// set FSK CRC // set FSK CRC
if(enableCRC) { int16_t state = ERR_NONE;
return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_ON, 4, 4)); if(enable) {
state = _mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_ON, 4, 4);
} else { } else {
return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_OFF, 4, 4)); state = _mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_OFF, 4, 4);
}
RADIOLIB_ASSERT(state);
// set FSK CRC mode
if(mode) {
return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_WHITENING_TYPE_IBM, 0, 0));
} else {
return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_WHITENING_TYPE_CCITT, 0, 0));
} }
} }
} }

6
src/modules/SX127x/SX1272.h
View file

@ -247,11 +247,13 @@ class SX1272: public SX127x {
/*! /*!
\brief Enables/disables CRC check of received packets. \brief Enables/disables CRC check of received packets.
\param enableCRC Enable (true) or disable (false) CRC. \param enable Enable (true) or disable (false) CRC.
\param mode Set CRC mode to SX127X_CRC_WHITENING_TYPE_CCITT for CCITT, polynomial X16 + X12 + X5 + 1 (false) or SX127X_CRC_WHITENING_TYPE_IBM for IBM, polynomial X16 + X15 + X2 + 1 (true). Only valid in FSK mode.
\returns \ref status_codes \returns \ref status_codes
*/ */
int16_t setCRC(bool enableCRC); int16_t setCRC(bool enable, bool mode = false);
/*! /*!
\brief Forces LoRa low data rate optimization. Only available in LoRa mode. After calling this method, LDRO will always be set to \brief Forces LoRa low data rate optimization. Only available in LoRa mode. After calling this method, LDRO will always be set to

21
src/modules/SX127x/SX1278.cpp
View file

@ -432,21 +432,30 @@ float SX1278::getRSSI() {
} }
} }
int16_t SX1278::setCRC(bool enableCRC) { int16_t SX1278::setCRC(bool enable, bool mode) {
if(getActiveModem() == SX127X_LORA) { if(getActiveModem() == SX127X_LORA) {
// set LoRa CRC // set LoRa CRC
SX127x::_crcEnabled = enableCRC; SX127x::_crcEnabled = enable;
if(enableCRC) { if(enable) {
return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1278_RX_CRC_MODE_ON, 2, 2)); return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1278_RX_CRC_MODE_ON, 2, 2));
} else { } else {
return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1278_RX_CRC_MODE_OFF, 2, 2)); return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1278_RX_CRC_MODE_OFF, 2, 2));
} }
} else { } else {
// set FSK CRC // set FSK CRC
if(enableCRC) { int16_t state = ERR_NONE;
return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_ON, 4, 4)); if(enable) {
state = _mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_ON, 4, 4);
} else { } else {
return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_OFF, 4, 4)); state = _mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_OFF, 4, 4);
}
RADIOLIB_ASSERT(state);
// set FSK CRC mode
if(mode) {
return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_WHITENING_TYPE_IBM, 0, 0));
} else {
return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_WHITENING_TYPE_CCITT, 0, 0));
} }
} }
} }

6
src/modules/SX127x/SX1278.h
View file

@ -255,11 +255,13 @@ class SX1278: public SX127x {
/*! /*!
\brief Enables/disables CRC check of received packets. \brief Enables/disables CRC check of received packets.
\param enableCRC Enable (true) or disable (false) CRC. \param enable Enable (true) or disable (false) CRC.
\param mode Set CRC mode to SX127X_CRC_WHITENING_TYPE_CCITT for CCITT, polynomial X16 + X12 + X5 + 1 (false) or SX127X_CRC_WHITENING_TYPE_IBM for IBM, polynomial X16 + X15 + X2 + 1 (true). Only valid in FSK mode.
\returns \ref status_codes \returns \ref status_codes
*/ */
int16_t setCRC(bool enableCRC); int16_t setCRC(bool enable, bool mode = false);
/*! /*!
\brief Forces LoRa low data rate optimization. Only available in LoRa mode. After calling this method, LDRO will always be set to \brief Forces LoRa low data rate optimization. Only available in LoRa mode. After calling this method, LDRO will always be set to