From 519b34d309aea57fbaa34b4737b5878b92cccc24 Mon Sep 17 00:00:00 2001
From: jgromes <jan.gromes@gmail.com>
Date: Sun, 14 Mar 2021 16:07:44 +0100
Subject: [PATCH] [SX127x] Added FSK CRC mode configuration (#266)

---
 src/modules/SX127x/SX1272.cpp | 21 +++++++++++++++------
 src/modules/SX127x/SX1272.h   |  6 ++++--
 src/modules/SX127x/SX1278.cpp | 21 +++++++++++++++------
 src/modules/SX127x/SX1278.h   |  6 ++++--
 4 files changed, 38 insertions(+), 16 deletions(-)

diff --git a/src/modules/SX127x/SX1272.cpp b/src/modules/SX127x/SX1272.cpp
index 38c76c78..9e49899c 100644
--- a/src/modules/SX127x/SX1272.cpp
+++ b/src/modules/SX127x/SX1272.cpp
@@ -354,21 +354,30 @@ float SX1272::getRSSI() {
   }
 }
 
-int16_t SX1272::setCRC(bool enableCRC) {
+int16_t SX1272::setCRC(bool enable, bool mode) {
   if(getActiveModem() == SX127X_LORA) {
     // set LoRa CRC
-    SX127x::_crcEnabled = enableCRC;
-    if(enableCRC) {
+    SX127x::_crcEnabled = enable;
+    if(enable) {
       return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1272_RX_CRC_MODE_ON, 2, 2));
     } else {
       return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1272_RX_CRC_MODE_OFF, 2, 2));
     }
   } else {
     // set FSK CRC
-    if(enableCRC) {
-      return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_ON, 4, 4));
+    int16_t state = ERR_NONE;
+    if(enable) {
+      state = _mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_ON, 4, 4);
     } else {
-      return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_OFF, 4, 4));
+      state = _mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_OFF, 4, 4);
+    }
+    RADIOLIB_ASSERT(state);
+
+    // set FSK CRC mode
+    if(mode) {
+      return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_WHITENING_TYPE_IBM, 0, 0));
+    } else {
+      return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_WHITENING_TYPE_CCITT, 0, 0));
     }
   }
 }
diff --git a/src/modules/SX127x/SX1272.h b/src/modules/SX127x/SX1272.h
index b22c13a3..81b84cab 100644
--- a/src/modules/SX127x/SX1272.h
+++ b/src/modules/SX127x/SX1272.h
@@ -247,11 +247,13 @@ class SX1272: public SX127x {
     /*!
       \brief Enables/disables CRC check of received packets.
 
-      \param enableCRC Enable (true) or disable (false) CRC.
+      \param enable Enable (true) or disable (false) CRC.
+
+      \param mode Set CRC mode to SX127X_CRC_WHITENING_TYPE_CCITT for CCITT, polynomial X16 + X12 + X5 + 1 (false) or SX127X_CRC_WHITENING_TYPE_IBM for IBM, polynomial X16 + X15 + X2 + 1 (true). Only valid in FSK mode.
 
       \returns \ref status_codes
     */
-    int16_t setCRC(bool enableCRC);
+    int16_t setCRC(bool enable, bool mode = false);
 
     /*!
       \brief Forces LoRa low data rate optimization. Only available in LoRa mode. After calling this method, LDRO will always be set to
diff --git a/src/modules/SX127x/SX1278.cpp b/src/modules/SX127x/SX1278.cpp
index f33af33a..2aab6cb6 100644
--- a/src/modules/SX127x/SX1278.cpp
+++ b/src/modules/SX127x/SX1278.cpp
@@ -432,21 +432,30 @@ float SX1278::getRSSI() {
   }
 }
 
-int16_t SX1278::setCRC(bool enableCRC) {
+int16_t SX1278::setCRC(bool enable, bool mode) {
   if(getActiveModem() == SX127X_LORA) {
     // set LoRa CRC
-    SX127x::_crcEnabled = enableCRC;
-    if(enableCRC) {
+    SX127x::_crcEnabled = enable;
+    if(enable) {
       return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1278_RX_CRC_MODE_ON, 2, 2));
     } else {
       return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1278_RX_CRC_MODE_OFF, 2, 2));
     }
   } else {
     // set FSK CRC
-    if(enableCRC) {
-      return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_ON, 4, 4));
+    int16_t state = ERR_NONE;
+    if(enable) {
+      state = _mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_ON, 4, 4);
     } else {
-      return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_OFF, 4, 4));
+      state = _mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_OFF, 4, 4);
+    }
+    RADIOLIB_ASSERT(state);
+
+    // set FSK CRC mode
+    if(mode) {
+      return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_WHITENING_TYPE_IBM, 0, 0));
+    } else {
+      return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_WHITENING_TYPE_CCITT, 0, 0));
     }
   }
 }
diff --git a/src/modules/SX127x/SX1278.h b/src/modules/SX127x/SX1278.h
index d65f4164..70f06092 100644
--- a/src/modules/SX127x/SX1278.h
+++ b/src/modules/SX127x/SX1278.h
@@ -255,11 +255,13 @@ class SX1278: public SX127x {
     /*!
       \brief Enables/disables CRC check of received packets.
 
-      \param enableCRC Enable (true) or disable (false) CRC.
+      \param enable Enable (true) or disable (false) CRC.
+
+      \param mode Set CRC mode to SX127X_CRC_WHITENING_TYPE_CCITT for CCITT, polynomial X16 + X12 + X5 + 1 (false) or SX127X_CRC_WHITENING_TYPE_IBM for IBM, polynomial X16 + X15 + X2 + 1 (true). Only valid in FSK mode.
 
       \returns \ref status_codes
     */
-    int16_t setCRC(bool enableCRC);
+    int16_t setCRC(bool enable, bool mode = false);
 
     /*!
       \brief Forces LoRa low data rate optimization. Only available in LoRa mode. After calling this method, LDRO will always be set to