forks/RadioLibSmol
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

[SX127x] Sync with LoRaLib v5.2.2

Browse source
This commit is contained in:
Jan Gromeš 2018-08-22 11:17:15 +02:00
parent f4344af3c5
commit 15ee1625c2
4 changed files with 169 additions and 166 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

95
src/modules/SX1276.cpp
View file

@ -69,52 +69,55 @@ int16_t SX1276::setFrequency(float freq) {
} }
} }
// mitigation of receiver spurious response // SX1276/77/78 Errata fixes
// see SX1276/77/78 Errata, section 2.3 for details if(getActiveModem() == SX127X_LORA) {
if(abs(_bw - 7.8) <= 0.001) { // mitigation of receiver spurious response
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); // see SX1276/77/78 Errata, section 2.3 for details
_mod->SPIsetRegValue(0x2F, 0x48); if(abs(_bw - 7.8) <= 0.001) {
_mod->SPIsetRegValue(0x30, 0x00); _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
freq += 7.8; _mod->SPIsetRegValue(0x2F, 0x48);
} else if(abs(_bw - 10.4) <= 0.001) { _mod->SPIsetRegValue(0x30, 0x00);
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); freq += 7.8;
_mod->SPIsetRegValue(0x2F, 0x44); } else if(abs(_bw - 10.4) <= 0.001) {
_mod->SPIsetRegValue(0x30, 0x00); _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
freq += 10.4; _mod->SPIsetRegValue(0x2F, 0x44);
} else if(abs(_bw - 15.6) <= 0.001) { _mod->SPIsetRegValue(0x30, 0x00);
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); freq += 10.4;
_mod->SPIsetRegValue(0x2F, 0x44); } else if(abs(_bw - 15.6) <= 0.001) {
_mod->SPIsetRegValue(0x30, 0x00); _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
freq += 15.6; _mod->SPIsetRegValue(0x2F, 0x44);
} else if(abs(_bw - 20.8) <= 0.001) { _mod->SPIsetRegValue(0x30, 0x00);
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); freq += 15.6;
_mod->SPIsetRegValue(0x2F, 0x44); } else if(abs(_bw - 20.8) <= 0.001) {
_mod->SPIsetRegValue(0x30, 0x00); _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
freq += 20.8; _mod->SPIsetRegValue(0x2F, 0x44);
} else if(abs(_bw - 31.25) <= 0.001) { _mod->SPIsetRegValue(0x30, 0x00);
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); freq += 20.8;
_mod->SPIsetRegValue(0x2F, 0x44); } else if(abs(_bw - 31.25) <= 0.001) {
_mod->SPIsetRegValue(0x30, 0x00); _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
freq += 31.25; _mod->SPIsetRegValue(0x2F, 0x44);
} else if(abs(_bw - 41.7) <= 0.001) { _mod->SPIsetRegValue(0x30, 0x00);
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); freq += 31.25;
_mod->SPIsetRegValue(0x2F, 0x44); } else if(abs(_bw - 41.7) <= 0.001) {
_mod->SPIsetRegValue(0x30, 0x00); _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
freq += 41.7; _mod->SPIsetRegValue(0x2F, 0x44);
} else if(abs(_bw - 62.5) <= 0.001) { _mod->SPIsetRegValue(0x30, 0x00);
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); freq += 41.7;
_mod->SPIsetRegValue(0x2F, 0x40); } else if(abs(_bw - 62.5) <= 0.001) {
_mod->SPIsetRegValue(0x30, 0x00); _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
} else if(abs(_bw - 125.0) <= 0.001) { _mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); _mod->SPIsetRegValue(0x30, 0x00);
_mod->SPIsetRegValue(0x2F, 0x40); } else if(abs(_bw - 125.0) <= 0.001) {
_mod->SPIsetRegValue(0x30, 0x00); _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
} else if(abs(_bw - 250.0) <= 0.001) { _mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); _mod->SPIsetRegValue(0x30, 0x00);
_mod->SPIsetRegValue(0x2F, 0x40); } else if(abs(_bw - 250.0) <= 0.001) {
_mod->SPIsetRegValue(0x30, 0x00); _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
} else if(abs(_bw - 500.0) <= 0.001) { _mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x31, 0b1000000, 7, 7); _mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 500.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b1000000, 7, 7);
}
} }
// set frequency // set frequency

117
src/modules/SX1277.cpp
View file

@ -57,64 +57,67 @@ int16_t SX1277::setFrequency(float freq) {
return(ERR_INVALID_FREQUENCY); return(ERR_INVALID_FREQUENCY);
} }
// sensitivity optimization for 500kHz bandwidth // SX1276/77/78 Errata fixes
// see SX1276/77/78 Errata, section 2.1 for details if(getActiveModem() == SX127X_LORA) {
if(abs(_bw - 500.0) <= 0.001) { // sensitivity optimization for 500kHz bandwidth
if((freq >= 862.0) && (freq <= 1020.0)) { // see SX1276/77/78 Errata, section 2.1 for details
_mod->SPIwriteRegister(0x36, 0x02); if(abs(_bw - 500.0) <= 0.001) {
_mod->SPIwriteRegister(0x3a, 0x64); if((freq >= 862.0) && (freq <= 1020.0)) {
} else if((freq >= 410.0) && (freq <= 525.0)) { _mod->SPIwriteRegister(0x36, 0x02);
_mod->SPIwriteRegister(0x36, 0x03); _mod->SPIwriteRegister(0x3a, 0x64);
_mod->SPIwriteRegister(0x3a, 0x65); } else if((freq >= 410.0) && (freq <= 525.0)) {
_mod->SPIwriteRegister(0x36, 0x03);
_mod->SPIwriteRegister(0x3a, 0x65);
}
}
// mitigation of receiver spurious response
// see SX1276/77/78 Errata, section 2.3 for details
if(abs(_bw - 7.8) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x48);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 7.8;
} else if(abs(_bw - 10.4) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 10.4;
} else if(abs(_bw - 15.6) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 15.6;
} else if(abs(_bw - 20.8) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 20.8;
} else if(abs(_bw - 31.25) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 31.25;
} else if(abs(_bw - 41.7) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 41.7;
} else if(abs(_bw - 62.5) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 125.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 250.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 500.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b1000000, 7, 7);
} }
}
// mitigation of receiver spurious response
// see SX1276/77/78 Errata, section 2.3 for details
if(abs(_bw - 7.8) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x48);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 7.8;
} else if(abs(_bw - 10.4) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 10.4;
} else if(abs(_bw - 15.6) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 15.6;
} else if(abs(_bw - 20.8) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 20.8;
} else if(abs(_bw - 31.25) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 31.25;
} else if(abs(_bw - 41.7) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 41.7;
} else if(abs(_bw - 62.5) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 125.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 250.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 500.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b1000000, 7, 7);
} }
// set frequency and if successful, save the new setting // set frequency and if successful, save the new setting

117
src/modules/SX1278.cpp
View file

@ -84,64 +84,67 @@ int16_t SX1278::setFrequency(float freq) {
return(ERR_INVALID_FREQUENCY); return(ERR_INVALID_FREQUENCY);
} }
// sensitivity optimization for 500kHz bandwidth // SX1276/77/78 Errata fixes
// see SX1276/77/78 Errata, section 2.1 for details if(getActiveModem() == SX127X_LORA) {
if(abs(_bw - 500.0) <= 0.001) { // sensitivity optimization for 500kHz bandwidth
if((freq >= 862.0) && (freq <= 1020.0)) { // see SX1276/77/78 Errata, section 2.1 for details
_mod->SPIwriteRegister(0x36, 0x02); if(abs(_bw - 500.0) <= 0.001) {
_mod->SPIwriteRegister(0x3a, 0x64); if((freq >= 862.0) && (freq <= 1020.0)) {
} else if((freq >= 410.0) && (freq <= 525.0)) { _mod->SPIwriteRegister(0x36, 0x02);
_mod->SPIwriteRegister(0x36, 0x03); _mod->SPIwriteRegister(0x3a, 0x64);
_mod->SPIwriteRegister(0x3a, 0x65); } else if((freq >= 410.0) && (freq <= 525.0)) {
_mod->SPIwriteRegister(0x36, 0x03);
_mod->SPIwriteRegister(0x3a, 0x65);
}
}
// mitigation of receiver spurious response
// see SX1276/77/78 Errata, section 2.3 for details
if(abs(_bw - 7.8) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x48);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 7.8;
} else if(abs(_bw - 10.4) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 10.4;
} else if(abs(_bw - 15.6) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 15.6;
} else if(abs(_bw - 20.8) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 20.8;
} else if(abs(_bw - 31.25) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 31.25;
} else if(abs(_bw - 41.7) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 41.7;
} else if(abs(_bw - 62.5) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 125.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 250.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 500.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b1000000, 7, 7);
} }
}
// mitigation of receiver spurious response
// see SX1276/77/78 Errata, section 2.3 for details
if(abs(_bw - 7.8) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x48);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 7.8;
} else if(abs(_bw - 10.4) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 10.4;
} else if(abs(_bw - 15.6) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 15.6;
} else if(abs(_bw - 20.8) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 20.8;
} else if(abs(_bw - 31.25) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 31.25;
} else if(abs(_bw - 41.7) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x44);
_mod->SPIsetRegValue(0x30, 0x00);
freq += 41.7;
} else if(abs(_bw - 62.5) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 125.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 250.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b0000000, 7, 7);
_mod->SPIsetRegValue(0x2F, 0x40);
_mod->SPIsetRegValue(0x30, 0x00);
} else if(abs(_bw - 500.0) <= 0.001) {
_mod->SPIsetRegValue(0x31, 0b1000000, 7, 7);
} }
// set frequency // set frequency

6
src/modules/SX127x.cpp
View file

@ -1046,12 +1046,6 @@ int16_t SX127x::configFSK() {
return(state); return(state);
} }
// set frequency error to zero
// for some reason unbeknownst to man, this write always fails, yet without it, switching modems doesn't work
// literally spent 8 hours debugging this ... well played Semtech, well played
_mod->SPIsetRegValue(SX127X_REG_FEI_MSB_FSK, 0x00);
_mod->SPIsetRegValue(SX127X_REG_FEI_LSB_FSK, 0x00);
return(state); return(state);
} }