diff --git a/src/modules/SX1276.cpp b/src/modules/SX1276.cpp index cf80f399..496e32fc 100644 --- a/src/modules/SX1276.cpp +++ b/src/modules/SX1276.cpp @@ -69,52 +69,55 @@ int16_t SX1276::setFrequency(float freq) { } } - // mitigation of receiver spurious response - // see SX1276/77/78 Errata, section 2.3 for details - if(abs(_bw - 7.8) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x48); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 7.8; - } else if(abs(_bw - 10.4) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 10.4; - } else if(abs(_bw - 15.6) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 15.6; - } else if(abs(_bw - 20.8) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 20.8; - } else if(abs(_bw - 31.25) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 31.25; - } else if(abs(_bw - 41.7) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 41.7; - } else if(abs(_bw - 62.5) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x40); - _mod->SPIsetRegValue(0x30, 0x00); - } else if(abs(_bw - 125.0) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x40); - _mod->SPIsetRegValue(0x30, 0x00); - } else if(abs(_bw - 250.0) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x40); - _mod->SPIsetRegValue(0x30, 0x00); - } else if(abs(_bw - 500.0) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b1000000, 7, 7); + // SX1276/77/78 Errata fixes + if(getActiveModem() == SX127X_LORA) { + // mitigation of receiver spurious response + // see SX1276/77/78 Errata, section 2.3 for details + if(abs(_bw - 7.8) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x48); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 7.8; + } else if(abs(_bw - 10.4) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 10.4; + } else if(abs(_bw - 15.6) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 15.6; + } else if(abs(_bw - 20.8) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 20.8; + } else if(abs(_bw - 31.25) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 31.25; + } else if(abs(_bw - 41.7) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 41.7; + } else if(abs(_bw - 62.5) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x40); + _mod->SPIsetRegValue(0x30, 0x00); + } else if(abs(_bw - 125.0) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x40); + _mod->SPIsetRegValue(0x30, 0x00); + } else if(abs(_bw - 250.0) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x40); + _mod->SPIsetRegValue(0x30, 0x00); + } else if(abs(_bw - 500.0) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b1000000, 7, 7); + } } // set frequency diff --git a/src/modules/SX1277.cpp b/src/modules/SX1277.cpp index ce2d68c1..6eeac497 100644 --- a/src/modules/SX1277.cpp +++ b/src/modules/SX1277.cpp @@ -57,64 +57,67 @@ int16_t SX1277::setFrequency(float freq) { return(ERR_INVALID_FREQUENCY); } - // sensitivity optimization for 500kHz bandwidth - // see SX1276/77/78 Errata, section 2.1 for details - if(abs(_bw - 500.0) <= 0.001) { - if((freq >= 862.0) && (freq <= 1020.0)) { - _mod->SPIwriteRegister(0x36, 0x02); - _mod->SPIwriteRegister(0x3a, 0x64); - } else if((freq >= 410.0) && (freq <= 525.0)) { - _mod->SPIwriteRegister(0x36, 0x03); - _mod->SPIwriteRegister(0x3a, 0x65); + // SX1276/77/78 Errata fixes + if(getActiveModem() == SX127X_LORA) { + // sensitivity optimization for 500kHz bandwidth + // see SX1276/77/78 Errata, section 2.1 for details + if(abs(_bw - 500.0) <= 0.001) { + if((freq >= 862.0) && (freq <= 1020.0)) { + _mod->SPIwriteRegister(0x36, 0x02); + _mod->SPIwriteRegister(0x3a, 0x64); + } else if((freq >= 410.0) && (freq <= 525.0)) { + _mod->SPIwriteRegister(0x36, 0x03); + _mod->SPIwriteRegister(0x3a, 0x65); + } + } + + // mitigation of receiver spurious response + // see SX1276/77/78 Errata, section 2.3 for details + if(abs(_bw - 7.8) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x48); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 7.8; + } else if(abs(_bw - 10.4) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 10.4; + } else if(abs(_bw - 15.6) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 15.6; + } else if(abs(_bw - 20.8) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 20.8; + } else if(abs(_bw - 31.25) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 31.25; + } else if(abs(_bw - 41.7) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 41.7; + } else if(abs(_bw - 62.5) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x40); + _mod->SPIsetRegValue(0x30, 0x00); + } else if(abs(_bw - 125.0) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x40); + _mod->SPIsetRegValue(0x30, 0x00); + } else if(abs(_bw - 250.0) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x40); + _mod->SPIsetRegValue(0x30, 0x00); + } else if(abs(_bw - 500.0) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b1000000, 7, 7); } - } - - // mitigation of receiver spurious response - // see SX1276/77/78 Errata, section 2.3 for details - if(abs(_bw - 7.8) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x48); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 7.8; - } else if(abs(_bw - 10.4) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 10.4; - } else if(abs(_bw - 15.6) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 15.6; - } else if(abs(_bw - 20.8) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 20.8; - } else if(abs(_bw - 31.25) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 31.25; - } else if(abs(_bw - 41.7) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 41.7; - } else if(abs(_bw - 62.5) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x40); - _mod->SPIsetRegValue(0x30, 0x00); - } else if(abs(_bw - 125.0) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x40); - _mod->SPIsetRegValue(0x30, 0x00); - } else if(abs(_bw - 250.0) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x40); - _mod->SPIsetRegValue(0x30, 0x00); - } else if(abs(_bw - 500.0) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b1000000, 7, 7); } // set frequency and if successful, save the new setting diff --git a/src/modules/SX1278.cpp b/src/modules/SX1278.cpp index 3cfcec82..2615a015 100644 --- a/src/modules/SX1278.cpp +++ b/src/modules/SX1278.cpp @@ -84,64 +84,67 @@ int16_t SX1278::setFrequency(float freq) { return(ERR_INVALID_FREQUENCY); } - // sensitivity optimization for 500kHz bandwidth - // see SX1276/77/78 Errata, section 2.1 for details - if(abs(_bw - 500.0) <= 0.001) { - if((freq >= 862.0) && (freq <= 1020.0)) { - _mod->SPIwriteRegister(0x36, 0x02); - _mod->SPIwriteRegister(0x3a, 0x64); - } else if((freq >= 410.0) && (freq <= 525.0)) { - _mod->SPIwriteRegister(0x36, 0x03); - _mod->SPIwriteRegister(0x3a, 0x65); + // SX1276/77/78 Errata fixes + if(getActiveModem() == SX127X_LORA) { + // sensitivity optimization for 500kHz bandwidth + // see SX1276/77/78 Errata, section 2.1 for details + if(abs(_bw - 500.0) <= 0.001) { + if((freq >= 862.0) && (freq <= 1020.0)) { + _mod->SPIwriteRegister(0x36, 0x02); + _mod->SPIwriteRegister(0x3a, 0x64); + } else if((freq >= 410.0) && (freq <= 525.0)) { + _mod->SPIwriteRegister(0x36, 0x03); + _mod->SPIwriteRegister(0x3a, 0x65); + } + } + + // mitigation of receiver spurious response + // see SX1276/77/78 Errata, section 2.3 for details + if(abs(_bw - 7.8) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x48); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 7.8; + } else if(abs(_bw - 10.4) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 10.4; + } else if(abs(_bw - 15.6) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 15.6; + } else if(abs(_bw - 20.8) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 20.8; + } else if(abs(_bw - 31.25) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 31.25; + } else if(abs(_bw - 41.7) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x44); + _mod->SPIsetRegValue(0x30, 0x00); + freq += 41.7; + } else if(abs(_bw - 62.5) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x40); + _mod->SPIsetRegValue(0x30, 0x00); + } else if(abs(_bw - 125.0) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x40); + _mod->SPIsetRegValue(0x30, 0x00); + } else if(abs(_bw - 250.0) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); + _mod->SPIsetRegValue(0x2F, 0x40); + _mod->SPIsetRegValue(0x30, 0x00); + } else if(abs(_bw - 500.0) <= 0.001) { + _mod->SPIsetRegValue(0x31, 0b1000000, 7, 7); } - } - - // mitigation of receiver spurious response - // see SX1276/77/78 Errata, section 2.3 for details - if(abs(_bw - 7.8) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x48); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 7.8; - } else if(abs(_bw - 10.4) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 10.4; - } else if(abs(_bw - 15.6) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 15.6; - } else if(abs(_bw - 20.8) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 20.8; - } else if(abs(_bw - 31.25) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 31.25; - } else if(abs(_bw - 41.7) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x44); - _mod->SPIsetRegValue(0x30, 0x00); - freq += 41.7; - } else if(abs(_bw - 62.5) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x40); - _mod->SPIsetRegValue(0x30, 0x00); - } else if(abs(_bw - 125.0) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x40); - _mod->SPIsetRegValue(0x30, 0x00); - } else if(abs(_bw - 250.0) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b0000000, 7, 7); - _mod->SPIsetRegValue(0x2F, 0x40); - _mod->SPIsetRegValue(0x30, 0x00); - } else if(abs(_bw - 500.0) <= 0.001) { - _mod->SPIsetRegValue(0x31, 0b1000000, 7, 7); } // set frequency diff --git a/src/modules/SX127x.cpp b/src/modules/SX127x.cpp index 4dc03c31..3a8795b5 100644 --- a/src/modules/SX127x.cpp +++ b/src/modules/SX127x.cpp @@ -1046,12 +1046,6 @@ int16_t SX127x::configFSK() { return(state); } - // set frequency error to zero - // for some reason unbeknownst to man, this write always fails, yet without it, switching modems doesn't work - // literally spent 8 hours debugging this ... well played Semtech, well played - _mod->SPIsetRegValue(SX127X_REG_FEI_MSB_FSK, 0x00); - _mod->SPIsetRegValue(SX127X_REG_FEI_LSB_FSK, 0x00); - return(state); }