[RF69] Fixed stream mode (#651)
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18fefc0ca9
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2 changed files with 2 additions and 15 deletions
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@ -319,7 +319,7 @@ void RF69::clearFifoFullAction() {
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_mod->SPIsetRegValue(RADIOLIB_RF69_REG_DIO_MAPPING_1, 0x00, 5, 4);
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}
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bool RF69::fifoAdd(uint8_t* data, int totalLen, volatile int* remLen) {
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bool RF69::fifoAdd(uint8_t* data, int totalLen, int* remLen) {
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// subtract first (this may be the first time we get to modify the remaining length)
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*remLen -= RADIOLIB_RF69_FIFO_THRESH - 1;
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@ -335,16 +335,9 @@ bool RF69::fifoAdd(uint8_t* data, int totalLen, volatile int* remLen) {
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len = RADIOLIB_RF69_FIFO_THRESH - 1;
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}
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// clear interrupt flags
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clearIRQFlags();
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// copy the bytes to the FIFO
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_mod->SPIwriteRegisterBurst(RADIOLIB_RF69_REG_FIFO, &data[totalLen - *remLen], len);
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// this is a hack, but it seems Rx FIFO level is getting triggered 1 byte before it should
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// we just add a padding byte that we can drop without consequence
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_mod->SPIwriteRegister(RADIOLIB_RF69_REG_FIFO, '/');
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// we're not done yet
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return(false);
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}
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@ -364,12 +357,6 @@ bool RF69::fifoGet(volatile uint8_t* data, int totalLen, volatile int* rcvLen) {
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_mod->SPIreadRegisterBurst(RADIOLIB_RF69_REG_FIFO, len, dataPtr);
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(*rcvLen) += (len);
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// dump the padding byte
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_mod->SPIreadRegister(RADIOLIB_RF69_REG_FIFO);
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// clear flags
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clearIRQFlags();
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// check if we're done
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if(*rcvLen >= totalLen) {
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return(true);
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@ -670,7 +670,7 @@ class RF69: public PhysicalLayer {
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\returns True when a complete packet is sent, false if more data is needed.
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*/
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bool fifoAdd(uint8_t* data, int totalLen, volatile int* remLen);
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bool fifoAdd(uint8_t* data, int totalLen, int* remLen);
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/*!
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\brief Set interrupt service routine function to call when FIFO is sufficently full to read.
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