From 0144faf02a0f260aa6c49274d05aa1887b578404 Mon Sep 17 00:00:00 2001 From: jgromes Date: Thu, 22 Dec 2022 18:18:16 +0100 Subject: [PATCH] [RF69] Fixed stream mode (#651) --- src/modules/RF69/RF69.cpp | 15 +-------------- src/modules/RF69/RF69.h | 2 +- 2 files changed, 2 insertions(+), 15 deletions(-) diff --git a/src/modules/RF69/RF69.cpp b/src/modules/RF69/RF69.cpp index 69eb68b2..ec1f3c42 100644 --- a/src/modules/RF69/RF69.cpp +++ b/src/modules/RF69/RF69.cpp @@ -319,7 +319,7 @@ void RF69::clearFifoFullAction() { _mod->SPIsetRegValue(RADIOLIB_RF69_REG_DIO_MAPPING_1, 0x00, 5, 4); } -bool RF69::fifoAdd(uint8_t* data, int totalLen, volatile int* remLen) { +bool RF69::fifoAdd(uint8_t* data, int totalLen, int* remLen) { // subtract first (this may be the first time we get to modify the remaining length) *remLen -= RADIOLIB_RF69_FIFO_THRESH - 1; @@ -335,16 +335,9 @@ bool RF69::fifoAdd(uint8_t* data, int totalLen, volatile int* remLen) { len = RADIOLIB_RF69_FIFO_THRESH - 1; } - // clear interrupt flags - clearIRQFlags(); - // copy the bytes to the FIFO _mod->SPIwriteRegisterBurst(RADIOLIB_RF69_REG_FIFO, &data[totalLen - *remLen], len); - // this is a hack, but it seems Rx FIFO level is getting triggered 1 byte before it should - // we just add a padding byte that we can drop without consequence - _mod->SPIwriteRegister(RADIOLIB_RF69_REG_FIFO, '/'); - // we're not done yet return(false); } @@ -364,12 +357,6 @@ bool RF69::fifoGet(volatile uint8_t* data, int totalLen, volatile int* rcvLen) { _mod->SPIreadRegisterBurst(RADIOLIB_RF69_REG_FIFO, len, dataPtr); (*rcvLen) += (len); - // dump the padding byte - _mod->SPIreadRegister(RADIOLIB_RF69_REG_FIFO); - - // clear flags - clearIRQFlags(); - // check if we're done if(*rcvLen >= totalLen) { return(true); diff --git a/src/modules/RF69/RF69.h b/src/modules/RF69/RF69.h index 7cb41d90..979f4845 100644 --- a/src/modules/RF69/RF69.h +++ b/src/modules/RF69/RF69.h @@ -670,7 +670,7 @@ class RF69: public PhysicalLayer { \returns True when a complete packet is sent, false if more data is needed. */ - bool fifoAdd(uint8_t* data, int totalLen, volatile int* remLen); + bool fifoAdd(uint8_t* data, int totalLen, int* remLen); /*! \brief Set interrupt service routine function to call when FIFO is sufficently full to read.