a6654dc76d
Changelog-entry: Rename meta-resin to meta-balena in repository Signed-off-by: Florin Sarbu <florin@balena.io>
54 lines
1.4 KiB
Diff
54 lines
1.4 KiB
Diff
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
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index b36f9f42..f2973669 100644
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--- a/arch/arm/boot/dts/sun8i-h3.dtsi
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+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
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@@ -72,6 +72,49 @@
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};
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};
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+ soc {
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+ mali: gpu@1c40000 {
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+ compatible = "allwinner,sun8i-h3-mali",
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+ "allwinner,sun7i-a20-mali", "arm,mali-400";
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+ reg = <0x01c40000 0x10000>;
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+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "gp",
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+ "gpmmu",
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+ "pp0",
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+ "ppmmu0",
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+ "pp1",
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+ "ppmmu1",
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+ "pmu";
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+ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
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+ clock-names = "bus", "core";
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+ resets = <&ccu RST_BUS_GPU>;
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+ memory-region = <&cma>;
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+
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+ assigned-clocks = <&ccu CLK_GPU>;
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+ assigned-clock-rates = <384000000>;
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+ };
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+ };
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+
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+ reserved-memory {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges;
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+
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+ cma: linux,cma {
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+ compatible = "shared-dma-pool";
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+ reusable;
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+ size = <0x4000000>;
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+ alignment = <0x2000>;
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+ linux,cma-default;
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+ };
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+ };
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+
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timer {
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compatible = "arm,armv7-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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