7d5f1dbda1
Some patches were part of other linux-mainline kernel versions but are not anymore part of the current 4.19.76. Move 0001-Enable-uart3-for-NanoPi-Neo-Air-used-by-BT.patch in linux-mainline_4.19.76.bbappend to avoid error patching file arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts Hunk #2 FAILED at 162. 1 out of 2 hunks FAILED -- rejects in file arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts Place all patches from Armbian in a separate directory and do all the Balena specific operations in linux-mainline_%.bbappend only. Changelog-entry: Remove unused patches and cleanup Signed-off-by: Vicentiu Galanopulo <vicentiu@balena.io>
82 lines
2.1 KiB
Diff
82 lines
2.1 KiB
Diff
From fcf4b68c77f7ce86a1976322cbb1f861962f8a66 Mon Sep 17 00:00:00 2001
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From: Ondrej Jirman <megous@megous.com>
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Date: Tue, 14 Nov 2017 17:16:45 +0100
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Subject: [PATCH 59/82] ARM: dts: sun8i-a83t: Describe A83T thermal zones
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There are three sensors, two for CPU, one for GPU.
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Signed-off-by: Ondrej Jirman <megous@megous.com>
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---
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arch/arm/boot/dts/sun8i-a83t.dtsi | 36 +++++++++++++++++++++++++++++++
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1 file changed, 36 insertions(+)
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diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
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index c79f5a678e62..bffcee058627 100644
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--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
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+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
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@@ -50,6 +50,7 @@
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#include <dt-bindings/reset/sun8i-a83t-ccu.h>
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#include <dt-bindings/reset/sun8i-de2.h>
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#include <dt-bindings/reset/sun8i-r-ccu.h>
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+#include <dt-bindings/thermal/thermal.h>
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/ {
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interrupt-parent = <&gic>;
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@@ -69,6 +70,9 @@
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cci-control-port = <&cci_control0>;
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enable-method = "allwinner,sun8i-a83t-smp";
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reg = <0>;
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+ #cooling-cells = <2>;
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+ cooling-min-level = <0>;
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+ cooling-max-level = <7>;
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};
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cpu@1 {
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@@ -107,6 +111,9 @@
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cci-control-port = <&cci_control1>;
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enable-method = "allwinner,sun8i-a83t-smp";
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reg = <0x100>;
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+ #cooling-cells = <2>;
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+ cooling-min-level = <0>;
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+ cooling-max-level = <7>;
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};
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cpu@101 {
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@@ -1108,5 +1115,34 @@
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#address-cells = <1>;
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#size-cells = <0>;
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};
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+
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+ ths: ths@1f04000 {
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+ #thermal-sensor-cells = <1>;
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+ compatible = "allwinner,sun8i-a83t-ths";
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+ reg = <0x01f04000 0x100 0x01c14234 0x8>;
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+ reg-names = "ths", "calibration";
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+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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+ status = "disabled";
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+ };
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+ };
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+
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+ thermal-zones {
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+ cpu0_thermal: cpu0-thermal {
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+ polling-delay-passive = <330>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&ths 0>;
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+ };
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+
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+ cpu1_thermal: cpu1-thermal {
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+ polling-delay-passive = <330>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&ths 1>;
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+ };
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+
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+ gpu_thermal: gpu-thermal {
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+ polling-delay-passive = <330>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&ths 2>;
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+ };
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};
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};
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--
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2.20.1
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