From 7fe79d7ef105939f10903d87c44b8ea4da3bc4ae Mon Sep 17 00:00:00 2001 From: Ondrej Jirman Date: Sat, 30 Sep 2017 02:46:55 +0200 Subject: [PATCH 31/82] ARM: dts: sun8i-a83t: Add CSI0 node for cmos sensor interface driver Signed-off-by: Ondrej Jirman --- arch/arm/boot/dts/sun8i-a83t.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 00a02b037320..66f035ead79a 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -636,6 +636,20 @@ #reset-cells = <1>; }; + csi0: csi@01cb0000 { + compatible = "allwinner,sun8i-a83t-csi"; + reg = <0x01cb0000 0x1000>; /* manual says 0x40000 size */ + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names = "ahb", "mod", "ram"; + resets = <&ccu RST_BUS_CSI>; + status = "disabled"; + }; + pio: pinctrl@1c20800 { compatible = "allwinner,sun8i-a83t-pinctrl"; interrupts = , @@ -649,6 +663,13 @@ #interrupt-cells = <3>; #gpio-cells = <3>; + csi0_pins: csi0-pins { + pins = "PE0", "PE1", "PE2", "PE3", "PE4", + "PE5", "PE6", "PE7", "PE8", "PE9", + "PE10", "PE11", "PE12", "PE13"; + function = "csi"; + }; + emac_rgmii_pins: emac-rgmii-pins { pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD11", "PD12", "PD13", "PD14", "PD18", -- 2.20.1