From e725812b6ff85fb5f3fff8fbb760d095a0c1bd2f Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Fri, 5 Jan 2018 19:37:14 +0800 Subject: [PATCH 29/35] arm64: allwinner: h6: add basical DVFS support Add basical DVFS support for Allwinner H6 SoC. Only one lowest OPP is added, as it's under the initial voltage of AXP805's DCDCA regulator (0.9V). Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index e4ea224..4183819 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -15,6 +15,17 @@ #address-cells = <1>; #size-cells = <1>; + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-888000000 { + opp-hz = /bits/ 64 <888000000>; + opp-microvolt = <880000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -24,6 +35,11 @@ device_type = "cpu"; reg = <0>; enable-method = "psci"; + + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -31,6 +47,7 @@ device_type = "cpu"; reg = <1>; enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; }; cpu2: cpu@2 { @@ -38,6 +55,7 @@ device_type = "cpu"; reg = <2>; enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; }; cpu3: cpu@3 { @@ -45,6 +63,7 @@ device_type = "cpu"; reg = <3>; enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; }; }; -- 2.7.4