From ff4436bd3de240a1d0796d4c6f8bd676ff0925e1 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Mon, 23 Apr 2018 23:24:41 -0700
Subject: [PATCH 034/146] dts: a64 ths

---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0b44018361cb..0eb482eb58b7 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -171,6 +171,27 @@
 		};
 	};
 
+	thermal-zones {
+		cpu_thermal: cpu0-thermal {
+		       /* milliseconds */
+		       polling-delay-passive = <250>;
+		       polling-delay = <1000>;
+		       thermal-sensors = <&ths 0>;
+		};
+		gpu0_thermal: gpu0-thermal {
+		       /* milliseconds */
+		       polling-delay-passive = <250>;
+		       polling-delay = <1000>;
+		       thermal-sensors = <&ths 1>;
+		};
+		gpu1_thermal: gpu1-thermal {
+		       /* milliseconds */
+		       polling-delay-passive = <250>;
+		       polling-delay = <1000>;
+		       thermal-sensors = <&ths 2>;
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13
@@ -536,6 +557,17 @@
 			status = "disabled";
 		};
 
+		ths: thermal-sensor@1c25000 {
+			compatible = "allwinner,sun50i-a64-ths";
+			reg = <0x01c25000 0x100>;
+			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+			clock-names = "bus", "mod";
+			resets = <&ccu RST_BUS_THS>;
+			#io-channel-cells = <0>;
+			#thermal-sensor-cells = <1>;
+		};
+
 		uart0: serial@1c28000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x01c28000 0x400>;
-- 
2.17.1

