115 lines
6.6 KiB
C++
115 lines
6.6 KiB
C++
#ifndef _KITELIB_SX1272_H
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#define _KITELIB_SX1272_H
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#include "TypeDef.h"
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#include "Module.h"
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#include "SX127x.h"
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// SX1272 specific register map
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#define SX1272_REG_AGC_REF 0x43
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#define SX1272_REG_AGC_THRESH_1 0x44
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#define SX1272_REG_AGC_THRESH_2 0x45
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#define SX1272_REG_AGC_THRESH_3 0x46
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#define SX1272_REG_PLL_HOP 0x4B
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#define SX1272_REG_TCXO 0x58
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#define SX1272_REG_PA_DAC 0x5A
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#define SX1272_REG_PLL 0x5C
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#define SX1272_REG_PLL_LOW_PN 0x5E
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#define SX1272_REG_FORMER_TEMP 0x6C
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#define SX1272_REG_BIT_RATE_FRAC 0x70
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// SX1272 LoRa modem settings
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// SX1272_REG_FRF_MSB + REG_FRF_MID + REG_FRF_LSB
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#define SX1272_FRF_MSB 0xE4 // 7 0 carrier frequency setting: f_RF = (F(XOSC) * FRF)/2^19
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#define SX1272_FRF_MID 0xC0 // 7 0 where F(XOSC) = 32 MHz
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#define SX1272_FRF_LSB 0x00 // 7 0 FRF = 3 byte value of FRF registers
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// SX1272_REG_MODEM_CONFIG_1
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#define SX1272_BW_125_00_KHZ 0b00000000 // 7 6 bandwidth: 125 kHz
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#define SX1272_BW_250_00_KHZ 0b01000000 // 7 6 250 kHz
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#define SX1272_BW_500_00_KHZ 0b10000000 // 7 6 500 kHz
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#define SX1272_CR_4_5 0b00001000 // 5 3 error coding rate: 4/5
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#define SX1272_CR_4_6 0b00010000 // 5 3 4/6
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#define SX1272_CR_4_7 0b00011000 // 5 3 4/7
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#define SX1272_CR_4_8 0b00100000 // 5 3 4/8
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#define SX1272_HEADER_EXPL_MODE 0b00000000 // 2 2 explicit header mode
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#define SX1272_HEADER_IMPL_MODE 0b00000100 // 2 2 implicit header mode
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#define SX1272_RX_CRC_MODE_OFF 0b00000000 // 1 1 CRC disabled
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#define SX1272_RX_CRC_MODE_ON 0b00000010 // 1 1 CRC enabled
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#define SX1272_LOW_DATA_RATE_OPT_OFF 0b00000000 // 0 0 low data rate optimization disabled
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#define SX1272_LOW_DATA_RATE_OPT_ON 0b00000001 // 0 0 low data rate optimization enabled, mandatory for SF 11 and 12 with BW 125 kHz
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// SX1272_REG_MODEM_CONFIG_2
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#define SX1272_AGC_AUTO_OFF 0b00000000 // 2 2 LNA gain set by REG_LNA
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#define SX1272_AGC_AUTO_ON 0b00000100 // 2 2 LNA gain set by internal AGC loop
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// SX127X_REG_VERSION
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#define SX1272_CHIP_VERSION 0x22
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// SX1272 FSK modem settings
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// SX127X_REG_OP_MODE
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#define SX1272_NO_SHAPING 0b00000000 // 4 3 data shaping: no shaping (default)
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#define SX1272_FSK_GAUSSIAN_1_0 0b00001000 // 4 3 FSK modulation Gaussian filter, BT = 1.0
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#define SX1272_FSK_GAUSSIAN_0_5 0b00010000 // 4 3 FSK modulation Gaussian filter, BT = 0.5
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#define SX1272_FSK_GAUSSIAN_0_3 0b00011000 // 4 3 FSK modulation Gaussian filter, BT = 0.3
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#define SX1272_OOK_FILTER_BR 0b00001000 // 4 3 OOK modulation filter, f_cutoff = BR
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#define SX1272_OOK_FILTER_2BR 0b00010000 // 4 3 OOK modulation filter, f_cutoff = 2*BR
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// SX127X_REG_PA_RAMP
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#define SX1272_LOW_PN_TX_PLL_OFF 0b00010000 // 4 4 use standard PLL in transmit mode (default)
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#define SX1272_LOW_PN_TX_PLL_ON 0b00000000 // 4 4 use lower phase noise PLL in transmit mode
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// SX127X_REG_SYNC_CONFIG
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#define SX1272_FIFO_FILL_CONDITION_SYNC_ADDRESS 0b00000000 // 3 3 FIFO will be filled when sync address interrupt occurs (default)
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#define SX1272_FIFO_FILL_CONDITION_ALWAYS 0b00001000 // 3 3 FIFO will be filled as long as this bit is set
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// SX1272_REG_AGC_REF
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#define SX1272_AGC_REFERENCE_LEVEL 0x13 // 5 0 floor reference for AGC thresholds: AgcRef = -174 + 10*log(2*RxBw) + 8 + AGC_REFERENCE_LEVEL [dBm]
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// SX1272_REG_AGC_THRESH_1
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#define SX1272_AGC_STEP_1 0x0E // 4 0 1st AGC threshold
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// SX1272_REG_AGC_THRESH_2
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#define SX1272_AGC_STEP_2 0x50 // 7 4 2nd AGC threshold
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#define SX1272_AGC_STEP_3 0x0B // 4 0 3rd AGC threshold
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// SX1272_REG_AGC_THRESH_3
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#define SX1272_AGC_STEP_4 0xD0 // 7 4 4th AGC threshold
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#define SX1272_AGC_STEP_5 0x0B // 4 0 5th AGC threshold
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// SX1272_REG_PLL_LOW_PN
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#define SX1272_PLL_LOW_PN_BANDWIDTH_75_KHZ 0b00000000 // 7 6 low phase noise PLL bandwidth: 75 kHz
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#define SX1272_PLL_LOW_PN_BANDWIDTH_150_KHZ 0b01000000 // 7 6 150 kHz
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#define SX1272_PLL_LOW_PN_BANDWIDTH_225_KHZ 0b10000000 // 7 6 225 kHz
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#define SX1272_PLL_LOW_PN_BANDWIDTH_300_KHZ 0b11000000 // 7 6 300 kHz (default)
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class SX1272: public SX127x {
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public:
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// constructor
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SX1272(Module* mod);
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// basic methods
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int16_t begin(float freq = 915.0, float bw = 125.0, uint8_t sf = 9, uint8_t cr = 7, uint8_t syncWord = SX127X_SYNC_WORD, int8_t power = 17, uint8_t currentLimit = 100, uint16_t preambleLength = 8, uint8_t gain = 0);
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int16_t beginFSK(float freq = 434.0, float br = 48.0, float rxBw = 125.0, float freqDev = 50.0, int8_t power = 13, uint8_t currentLimit = 100);
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// configuration methods
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int16_t setFrequency(float freq);
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int16_t setBandwidth(float bw);
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int16_t setSpreadingFactor(uint8_t sf);
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int16_t setCodingRate(uint8_t cr);
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int16_t setOutputPower(int8_t power);
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int16_t setGain(uint8_t gain);
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protected:
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int16_t setBandwidthRaw(uint8_t newBandwidth);
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int16_t setSpreadingFactorRaw(uint8_t newSpreadingFactor);
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int16_t setCodingRateRaw(uint8_t newCodingRate);
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int16_t config();
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int16_t configFSK();
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private:
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};
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#endif
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