446 lines
13 KiB
C++
446 lines
13 KiB
C++
#include "SX1272.h"
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#if !defined(RADIOLIB_EXCLUDE_SX127X)
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SX1272::SX1272(Module* mod) : SX127x(mod) {
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}
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int16_t SX1272::begin(float freq, float bw, uint8_t sf, uint8_t cr, uint8_t syncWord, int8_t power, uint16_t preambleLength, uint8_t gain) {
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// execute common part
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int16_t state = SX127x::begin(SX1272_CHIP_VERSION, syncWord, preambleLength);
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RADIOLIB_ASSERT(state);
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// mitigation of receiver spurious response
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// see SX1272/73 Errata, section 2.2 for details
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state = _mod->SPIsetRegValue(0x31, 0b10000000, 7, 7);
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RADIOLIB_ASSERT(state);
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// configure publicly accessible settings
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state = setBandwidth(bw);
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RADIOLIB_ASSERT(state);
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state = setFrequency(freq);
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RADIOLIB_ASSERT(state);
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state = setSpreadingFactor(sf);
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RADIOLIB_ASSERT(state);
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state = setCodingRate(cr);
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RADIOLIB_ASSERT(state);
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state = setOutputPower(power);
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RADIOLIB_ASSERT(state);
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state = setGain(gain);
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RADIOLIB_ASSERT(state);
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return(state);
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}
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int16_t SX1272::beginFSK(float freq, float br, float rxBw, float freqDev, int8_t power, uint16_t preambleLength, bool enableOOK) {
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// execute common part
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int16_t state = SX127x::beginFSK(SX1272_CHIP_VERSION, br, rxBw, freqDev, preambleLength, enableOOK);
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RADIOLIB_ASSERT(state);
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// configure settings not accessible by API
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state = configFSK();
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RADIOLIB_ASSERT(state);
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// configure publicly accessible settings
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state = setFrequency(freq);
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RADIOLIB_ASSERT(state);
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state = setDataShaping(RADIOLIB_SHAPING_NONE);
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RADIOLIB_ASSERT(state);
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state = setOutputPower(power);
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RADIOLIB_ASSERT(state);
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return(state);
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}
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void SX1272::reset() {
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Module::pinMode(_mod->getRst(), OUTPUT);
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Module::digitalWrite(_mod->getRst(), HIGH);
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Module::delay(1);
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Module::digitalWrite(_mod->getRst(), LOW);
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Module::delay(5);
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}
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int16_t SX1272::setFrequency(float freq) {
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RADIOLIB_CHECK_RANGE(freq, 860.0, 1020.0, ERR_INVALID_FREQUENCY);
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// set frequency and if successful, save the new setting
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int16_t state = SX127x::setFrequencyRaw(freq);
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if(state == ERR_NONE) {
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SX127x::_freq = freq;
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}
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return(state);
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}
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int16_t SX1272::setBandwidth(float bw) {
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// check active modem
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if(getActiveModem() != SX127X_LORA) {
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return(ERR_WRONG_MODEM);
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}
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uint8_t newBandwidth;
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// check allowed bandwidth values
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if(abs(bw - 125.0) <= 0.001) {
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newBandwidth = SX1272_BW_125_00_KHZ;
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} else if(abs(bw - 250.0) <= 0.001) {
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newBandwidth = SX1272_BW_250_00_KHZ;
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} else if(abs(bw - 500.0) <= 0.001) {
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newBandwidth = SX1272_BW_500_00_KHZ;
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} else {
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return(ERR_INVALID_BANDWIDTH);
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}
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// set bandwidth and if successful, save the new setting
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int16_t state = SX1272::setBandwidthRaw(newBandwidth);
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if(state == ERR_NONE) {
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SX127x::_bw = bw;
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// calculate symbol length and set low data rate optimization, if auto-configuration is enabled
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if(_ldroAuto) {
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float symbolLength = (float)(uint32_t(1) << SX127x::_sf) / (float)SX127x::_bw;
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RADIOLIB_DEBUG_PRINT("Symbol length: ");
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RADIOLIB_DEBUG_PRINT(symbolLength);
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RADIOLIB_DEBUG_PRINTLN(" ms");
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if(symbolLength >= 16.0) {
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state = _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_1, SX1272_LOW_DATA_RATE_OPT_ON, 0, 0);
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} else {
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state = _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_1, SX1272_LOW_DATA_RATE_OPT_OFF, 0, 0);
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}
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}
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}
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return(state);
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}
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int16_t SX1272::setSpreadingFactor(uint8_t sf) {
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// check active modem
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if(getActiveModem() != SX127X_LORA) {
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return(ERR_WRONG_MODEM);
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}
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uint8_t newSpreadingFactor;
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// check allowed spreading factor values
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switch(sf) {
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case 6:
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newSpreadingFactor = SX127X_SF_6;
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break;
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case 7:
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newSpreadingFactor = SX127X_SF_7;
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break;
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case 8:
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newSpreadingFactor = SX127X_SF_8;
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break;
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case 9:
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newSpreadingFactor = SX127X_SF_9;
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break;
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case 10:
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newSpreadingFactor = SX127X_SF_10;
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break;
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case 11:
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newSpreadingFactor = SX127X_SF_11;
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break;
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case 12:
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newSpreadingFactor = SX127X_SF_12;
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break;
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default:
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return(ERR_INVALID_SPREADING_FACTOR);
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}
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// set spreading factor and if successful, save the new setting
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int16_t state = SX1272::setSpreadingFactorRaw(newSpreadingFactor);
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if(state == ERR_NONE) {
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SX127x::_sf = sf;
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// calculate symbol length and set low data rate optimization, if auto-configuration is enabled
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if(_ldroAuto) {
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float symbolLength = (float)(uint32_t(1) << SX127x::_sf) / (float)SX127x::_bw;
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RADIOLIB_DEBUG_PRINT("Symbol length: ");
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RADIOLIB_DEBUG_PRINT(symbolLength);
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RADIOLIB_DEBUG_PRINTLN(" ms");
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if(symbolLength >= 16.0) {
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state = _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_1, SX1272_LOW_DATA_RATE_OPT_ON, 0, 0);
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} else {
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state = _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_1, SX1272_LOW_DATA_RATE_OPT_OFF, 0, 0);
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}
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}
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}
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return(state);
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}
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int16_t SX1272::setCodingRate(uint8_t cr) {
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// check active modem
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if(getActiveModem() != SX127X_LORA) {
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return(ERR_WRONG_MODEM);
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}
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uint8_t newCodingRate;
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// check allowed coding rate values
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switch(cr) {
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case 5:
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newCodingRate = SX1272_CR_4_5;
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break;
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case 6:
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newCodingRate = SX1272_CR_4_6;
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break;
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case 7:
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newCodingRate = SX1272_CR_4_7;
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break;
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case 8:
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newCodingRate = SX1272_CR_4_8;
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break;
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default:
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return(ERR_INVALID_CODING_RATE);
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}
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// set coding rate and if successful, save the new setting
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int16_t state = SX1272::setCodingRateRaw(newCodingRate);
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if(state == ERR_NONE) {
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SX127x::_cr = cr;
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}
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return(state);
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}
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int16_t SX1272::setOutputPower(int8_t power) {
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// check allowed power range
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if(!(((power >= -1) && (power <= 17)) || (power == 20))) {
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return(ERR_INVALID_OUTPUT_POWER);
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}
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// set mode to standby
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int16_t state = SX127x::standby();
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// set output power
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if(power < 2) {
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// power is less than 2 dBm, enable PA0 on RFIO
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state |= _mod->SPIsetRegValue(SX127X_REG_PA_CONFIG, SX127X_PA_SELECT_RFO, 7, 7);
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state |= _mod->SPIsetRegValue(SX127X_REG_PA_CONFIG, (power + 1), 3, 0);
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state |= _mod->SPIsetRegValue(SX1272_REG_PA_DAC, SX127X_PA_BOOST_OFF, 2, 0);
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} else if(power <= 17) {
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// power is 2 - 17 dBm, enable PA1 + PA2 on PA_BOOST
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state |= _mod->SPIsetRegValue(SX127X_REG_PA_CONFIG, SX127X_PA_SELECT_BOOST, 7, 7);
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state |= _mod->SPIsetRegValue(SX127X_REG_PA_CONFIG, (power - 2), 3, 0);
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state |= _mod->SPIsetRegValue(SX1272_REG_PA_DAC, SX127X_PA_BOOST_OFF, 2, 0);
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} else if(power == 20) {
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// power is 20 dBm, enable PA1 + PA2 on PA_BOOST and enable high power control
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state |= _mod->SPIsetRegValue(SX127X_REG_PA_CONFIG, SX127X_PA_SELECT_BOOST, 7, 7);
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state |= _mod->SPIsetRegValue(SX127X_REG_PA_CONFIG, (power - 5), 3, 0);
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state |= _mod->SPIsetRegValue(SX1272_REG_PA_DAC, SX127X_PA_BOOST_ON, 2, 0);
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}
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return(state);
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}
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int16_t SX1272::setGain(uint8_t gain) {
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// check active modem
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if(getActiveModem() != SX127X_LORA) {
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return(ERR_WRONG_MODEM);
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}
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// check allowed range
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if(gain > 6) {
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return(ERR_INVALID_GAIN);
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}
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// set mode to standby
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int16_t state = SX127x::standby();
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// set gain
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if(gain == 0) {
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// gain set to 0, enable AGC loop
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state |= _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1272_AGC_AUTO_ON, 2, 2);
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} else {
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state |= _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1272_AGC_AUTO_OFF, 2, 2);
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state |= _mod->SPIsetRegValue(SX127X_REG_LNA, (gain << 5) | SX127X_LNA_BOOST_ON);
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}
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return(state);
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}
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int16_t SX1272::setDataShaping(uint8_t sh) {
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// check active modem
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if(getActiveModem() != SX127X_FSK_OOK) {
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return(ERR_WRONG_MODEM);
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}
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// check modulation
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if(SX127x::_ook) {
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return(ERR_INVALID_MODULATION);
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}
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// set mode to standby
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int16_t state = SX127x::standby();
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RADIOLIB_ASSERT(state);
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// set data shaping
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switch(sh) {
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case RADIOLIB_SHAPING_NONE:
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return(_mod->SPIsetRegValue(SX127X_REG_OP_MODE, SX1272_NO_SHAPING, 4, 3));
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case RADIOLIB_SHAPING_0_3:
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return(_mod->SPIsetRegValue(SX127X_REG_OP_MODE, SX1272_FSK_GAUSSIAN_0_3, 4, 3));
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case RADIOLIB_SHAPING_0_5:
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return(_mod->SPIsetRegValue(SX127X_REG_OP_MODE, SX1272_FSK_GAUSSIAN_0_5, 4, 3));
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case RADIOLIB_SHAPING_1_0:
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return(_mod->SPIsetRegValue(SX127X_REG_OP_MODE, SX1272_FSK_GAUSSIAN_1_0, 4, 3));
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default:
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return(ERR_INVALID_DATA_SHAPING);
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}
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}
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int16_t SX1272::setDataShapingOOK(uint8_t sh) {
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// check active modem
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if(getActiveModem() != SX127X_FSK_OOK) {
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return(ERR_WRONG_MODEM);
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}
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// check modulation
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if(!SX127x::_ook) {
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return(ERR_INVALID_MODULATION);
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}
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// set mode to standby
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int16_t state = SX127x::standby();
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// set data shaping
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switch(sh) {
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case 0:
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state |= _mod->SPIsetRegValue(SX127X_REG_OP_MODE, SX1272_NO_SHAPING, 4, 3);
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break;
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case 1:
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state |= _mod->SPIsetRegValue(SX127X_REG_OP_MODE, SX1272_OOK_FILTER_BR, 4, 3);
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break;
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case 2:
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state |= _mod->SPIsetRegValue(SX127X_REG_OP_MODE, SX1272_OOK_FILTER_2BR, 4, 3);
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break;
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default:
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state = ERR_INVALID_DATA_SHAPING;
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break;
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}
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return(state);
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}
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float SX1272::getRSSI() {
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if(getActiveModem() == SX127X_LORA) {
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// RSSI calculation uses different constant for low-frequency and high-frequency ports
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float lastPacketRSSI = -139 + _mod->SPIgetRegValue(SX127X_REG_PKT_RSSI_VALUE);
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// spread-spectrum modulation signal can be received below noise floor
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// check last packet SNR and if it's less than 0, add it to reported RSSI to get the correct value
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float lastPacketSNR = SX127x::getSNR();
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if(lastPacketSNR < 0.0) {
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lastPacketRSSI += lastPacketSNR;
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}
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return(lastPacketRSSI);
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} else {
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// enable listen mode
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startReceive();
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// read the value for FSK
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float rssi = (float)_mod->SPIgetRegValue(SX127X_REG_RSSI_VALUE_FSK) / -2.0;
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// set mode back to standby
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standby();
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// return the value
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return(rssi);
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}
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}
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int16_t SX1272::setCRC(bool enableCRC) {
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if(getActiveModem() == SX127X_LORA) {
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// set LoRa CRC
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SX127x::_crcEnabled = enableCRC;
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if(enableCRC) {
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return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1272_RX_CRC_MODE_ON, 2, 2));
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} else {
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return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX1272_RX_CRC_MODE_OFF, 2, 2));
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}
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} else {
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// set FSK CRC
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if(enableCRC) {
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return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_ON, 4, 4));
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} else {
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return(_mod->SPIsetRegValue(SX127X_REG_PACKET_CONFIG_1, SX127X_CRC_OFF, 4, 4));
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}
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}
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}
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int16_t SX1272::forceLDRO(bool enable) {
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if(getActiveModem() != SX127X_LORA) {
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return(ERR_WRONG_MODEM);
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}
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_ldroAuto = false;
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if(enable) {
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return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_1, SX1272_LOW_DATA_RATE_OPT_ON, 0, 0));
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} else {
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return(_mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_1, SX1272_LOW_DATA_RATE_OPT_OFF, 0, 0));
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}
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}
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int16_t SX1272::autoLDRO() {
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if(getActiveModem() != SX127X_LORA) {
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return(ERR_WRONG_MODEM);
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}
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_ldroAuto = true;
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return(ERR_NONE);
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}
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int16_t SX1272::setBandwidthRaw(uint8_t newBandwidth) {
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// set mode to standby
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int16_t state = SX127x::standby();
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// write register
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state |= _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_1, newBandwidth, 7, 6);
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return(state);
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}
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int16_t SX1272::setSpreadingFactorRaw(uint8_t newSpreadingFactor) {
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// set mode to standby
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int16_t state = SX127x::standby();
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// write registers
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if(newSpreadingFactor == SX127X_SF_6) {
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state |= _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_1, SX1272_HEADER_IMPL_MODE | (SX127x::_crcEnabled ? SX1272_RX_CRC_MODE_ON : SX1272_RX_CRC_MODE_OFF), 2, 1);
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state |= _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, SX127X_SF_6 | SX127X_TX_MODE_SINGLE, 7, 3);
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state |= _mod->SPIsetRegValue(SX127X_REG_DETECT_OPTIMIZE, SX127X_DETECT_OPTIMIZE_SF_6, 2, 0);
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state |= _mod->SPIsetRegValue(SX127X_REG_DETECTION_THRESHOLD, SX127X_DETECTION_THRESHOLD_SF_6);
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} else {
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state |= _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_1, SX1272_HEADER_EXPL_MODE | (SX127x::_crcEnabled ? SX1272_RX_CRC_MODE_ON : SX1272_RX_CRC_MODE_OFF), 2, 1);
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state |= _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_2, newSpreadingFactor | SX127X_TX_MODE_SINGLE, 7, 3);
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state |= _mod->SPIsetRegValue(SX127X_REG_DETECT_OPTIMIZE, SX127X_DETECT_OPTIMIZE_SF_7_12, 2, 0);
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state |= _mod->SPIsetRegValue(SX127X_REG_DETECTION_THRESHOLD, SX127X_DETECTION_THRESHOLD_SF_7_12);
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}
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return(state);
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}
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int16_t SX1272::setCodingRateRaw(uint8_t newCodingRate) {
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// set mode to standby
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int16_t state = SX127x::standby();
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// write register
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state |= _mod->SPIsetRegValue(SX127X_REG_MODEM_CONFIG_1, newCodingRate, 5, 3);
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return(state);
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}
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int16_t SX1272::configFSK() {
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// configure common registers
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int16_t state = SX127x::configFSK();
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RADIOLIB_ASSERT(state);
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// set fast PLL hop
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state = _mod->SPIsetRegValue(SX1272_REG_PLL_HOP, SX127X_FAST_HOP_ON, 7, 7);
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return(state);
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}
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#endif
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