1 #if !defined(_RADIOLIB_CC1101_H) && !defined(RADIOLIB_EXCLUDE_CC1101) 2 #define _RADIOLIB_CC1101_H 4 #include "../../TypeDef.h" 5 #include "../../Module.h" 7 #include "../../protocols/PhysicalLayer/PhysicalLayer.h" 10 #define CC1101_FREQUENCY_STEP_SIZE 396.7285156 11 #define CC1101_MAX_PACKET_LENGTH 63 12 #define CC1101_CRYSTAL_FREQ 26.0 13 #define CC1101_DIV_EXPONENT 16 16 #define CC1101_CMD_READ 0b10000000 17 #define CC1101_CMD_WRITE 0b00000000 18 #define CC1101_CMD_BURST 0b01000000 19 #define CC1101_CMD_ACCESS_STATUS_REG 0b01000000 20 #define CC1101_CMD_FIFO_RX 0b10000000 21 #define CC1101_CMD_FIFO_TX 0b00000000 22 #define CC1101_CMD_RESET 0x30 23 #define CC1101_CMD_FSTXON 0x31 24 #define CC1101_CMD_XOFF 0x32 25 #define CC1101_CMD_CAL 0x33 26 #define CC1101_CMD_RX 0x34 27 #define CC1101_CMD_TX 0x35 28 #define CC1101_CMD_IDLE 0x36 29 #define CC1101_CMD_WOR 0x38 30 #define CC1101_CMD_POWER_DOWN 0x39 31 #define CC1101_CMD_FLUSH_RX 0x3A 32 #define CC1101_CMD_FLUSH_TX 0x3B 33 #define CC1101_CMD_WOR_RESET 0x3C 34 #define CC1101_CMD_NOP 0x3D 37 #define CC1101_REG_IOCFG2 0x00 38 #define CC1101_REG_IOCFG1 0x01 39 #define CC1101_REG_IOCFG0 0x02 40 #define CC1101_REG_FIFOTHR 0x03 41 #define CC1101_REG_SYNC1 0x04 42 #define CC1101_REG_SYNC0 0x05 43 #define CC1101_REG_PKTLEN 0x06 44 #define CC1101_REG_PKTCTRL1 0x07 45 #define CC1101_REG_PKTCTRL0 0x08 46 #define CC1101_REG_ADDR 0x09 47 #define CC1101_REG_CHANNR 0x0A 48 #define CC1101_REG_FSCTRL1 0x0B 49 #define CC1101_REG_FSCTRL0 0x0C 50 #define CC1101_REG_FREQ2 0x0D 51 #define CC1101_REG_FREQ1 0x0E 52 #define CC1101_REG_FREQ0 0x0F 53 #define CC1101_REG_MDMCFG4 0x10 54 #define CC1101_REG_MDMCFG3 0x11 55 #define CC1101_REG_MDMCFG2 0x12 56 #define CC1101_REG_MDMCFG1 0x13 57 #define CC1101_REG_MDMCFG0 0x14 58 #define CC1101_REG_DEVIATN 0x15 59 #define CC1101_REG_MCSM2 0x16 60 #define CC1101_REG_MCSM1 0x17 61 #define CC1101_REG_MCSM0 0x18 62 #define CC1101_REG_FOCCFG 0x19 63 #define CC1101_REG_BSCFG 0x1A 64 #define CC1101_REG_AGCCTRL2 0x1B 65 #define CC1101_REG_AGCCTRL1 0x1C 66 #define CC1101_REG_AGCCTRL0 0x1D 67 #define CC1101_REG_WOREVT1 0x1E 68 #define CC1101_REG_WOREVT0 0x1F 69 #define CC1101_REG_WORCTRL 0x20 70 #define CC1101_REG_FREND1 0x21 71 #define CC1101_REG_FREND0 0x22 72 #define CC1101_REG_FSCAL3 0x23 73 #define CC1101_REG_FSCAL2 0x24 74 #define CC1101_REG_FSCAL1 0x25 75 #define CC1101_REG_FSCAL0 0x26 76 #define CC1101_REG_RCCTRL1 0x27 77 #define CC1101_REG_RCCTRL0 0x28 78 #define CC1101_REG_FSTEST 0x29 79 #define CC1101_REG_PTEST 0x2A 80 #define CC1101_REG_AGCTEST 0x2B 81 #define CC1101_REG_TEST2 0x2C 82 #define CC1101_REG_TEST1 0x2D 83 #define CC1101_REG_TEST0 0x2E 84 #define CC1101_REG_PARTNUM 0x30 85 #define CC1101_REG_VERSION 0x31 86 #define CC1101_REG_FREQEST 0x32 87 #define CC1101_REG_LQI 0x33 88 #define CC1101_REG_RSSI 0x34 89 #define CC1101_REG_MARCSTATE 0x35 90 #define CC1101_REG_WORTIME1 0x36 91 #define CC1101_REG_WORTIME0 0x37 92 #define CC1101_REG_PKTSTATUS 0x38 93 #define CC1101_REG_VCO_VC_DAC 0x39 94 #define CC1101_REG_TXBYTES 0x3A 95 #define CC1101_REG_RXBYTES 0x3B 96 #define CC1101_REG_RCCTRL1_STATUS 0x3C 97 #define CC1101_REG_RCCTRL0_STATUS 0x3D 98 #define CC1101_REG_PATABLE 0x3E 99 #define CC1101_REG_FIFO 0x3F 102 #define CC1101_GDO2_NORM 0b00000000 // 6 6 GDO2 output: active high (default) 103 #define CC1101_GDO2_INV 0b01000000 // 6 6 active low 106 #define CC1101_GDO1_DS_LOW 0b00000000 // 7 7 GDO1 output drive strength: low (default) 107 #define CC1101_GDO1_DS_HIGH 0b10000000 // 7 7 high 108 #define CC1101_GDO1_NORM 0b00000000 // 6 6 GDO1 output: active high (default) 109 #define CC1101_GDO1_INV 0b01000000 // 6 6 active low 112 #define CC1101_GDO0_TEMP_SENSOR_OFF 0b00000000 // 7 7 analog temperature sensor output: disabled (default) 113 #define CC1101_GDO0_TEMP_SENSOR_ON 0b10000000 // 7 0 enabled 114 #define CC1101_GDO0_NORM 0b00000000 // 6 6 GDO0 output: active high (default) 115 #define CC1101_GDO0_INV 0b01000000 // 6 6 active low 118 #define CC1101_GDOX_RX_FIFO_FULL 0x00 // 5 0 Rx FIFO full or above threshold 119 #define CC1101_GDOX_RX_FIFO_FULL_OR_PKT_END 0x01 // 5 0 Rx FIFO full or above threshold or reached packet end 120 #define CC1101_GDOX_TX_FIFO_ABOVE_THR 0x02 // 5 0 Tx FIFO above threshold 121 #define CC1101_GDOX_TX_FIFO_FULL 0x03 // 5 0 Tx FIFO full 122 #define CC1101_GDOX_RX_FIFO_OVERFLOW 0x04 // 5 0 Rx FIFO overflowed 123 #define CC1101_GDOX_TX_FIFO_UNDERFLOW 0x05 // 5 0 Tx FIFO underflowed 124 #define CC1101_GDOX_SYNC_WORD_SENT_OR_RECEIVED 0x06 // 5 0 sync word was sent or received 125 #define CC1101_GDOX_PKT_RECEIVED_CRC_OK 0x07 // 5 0 packet received and CRC check passed 126 #define CC1101_GDOX_PREAMBLE_QUALITY_REACHED 0x08 // 5 0 received preamble quality is above threshold 127 #define CC1101_GDOX_CHANNEL_CLEAR 0x09 // 5 0 RSSI level below threshold (channel is clear) 128 #define CC1101_GDOX_PLL_LOCKED 0x0A // 5 0 PLL is locked 129 #define CC1101_GDOX_SERIAL_CLOCK 0x0B // 5 0 serial data clock 130 #define CC1101_GDOX_SERIAL_DATA_SYNC 0x0C // 5 0 serial data output in: synchronous mode 131 #define CC1101_GDOX_SERIAL_DATA_ASYNC 0x0D // 5 0 asynchronous mode 132 #define CC1101_GDOX_CARRIER_SENSE 0x0E // 5 0 RSSI above threshold 133 #define CC1101_GDOX_CRC_OK 0x0F // 5 0 CRC check passed 134 #define CC1101_GDOX_RX_HARD_DATA1 0x16 // 5 0 direct access to demodulated data 135 #define CC1101_GDOX_RX_HARD_DATA0 0x17 // 5 0 direct access to demodulated data 136 #define CC1101_GDOX_PA_PD 0x1B // 5 0 power amplifier circuit is powered down 137 #define CC1101_GDOX_LNA_PD 0x1C // 5 0 low-noise amplifier circuit is powered down 138 #define CC1101_GDOX_RX_SYMBOL_TICK 0x1D // 5 0 direct access to symbol tick of received data 139 #define CC1101_GDOX_WOR_EVNT0 0x24 // 5 0 wake-on-radio event 0 140 #define CC1101_GDOX_WOR_EVNT1 0x25 // 5 0 wake-on-radio event 1 141 #define CC1101_GDOX_CLK_256 0x26 // 5 0 256 Hz clock 142 #define CC1101_GDOX_CLK_32K 0x27 // 5 0 32 kHz clock 143 #define CC1101_GDOX_CHIP_RDYN 0x29 // 5 0 (default for GDO2) 144 #define CC1101_GDOX_XOSC_STABLE 0x2B // 5 0 145 #define CC1101_GDOX_HIGH_Z 0x2E // 5 0 high impedance state (default for GDO1) 146 #define CC1101_GDOX_HW_TO_0 0x2F // 5 0 147 #define CC1101_GDOX_CLOCK_XOSC_1 0x30 // 5 0 crystal oscillator clock: f = f(XOSC)/1 148 #define CC1101_GDOX_CLOCK_XOSC_1_5 0x31 // 5 0 f = f(XOSC)/1.5 149 #define CC1101_GDOX_CLOCK_XOSC_2 0x32 // 5 0 f = f(XOSC)/2 150 #define CC1101_GDOX_CLOCK_XOSC_3 0x33 // 5 0 f = f(XOSC)/3 151 #define CC1101_GDOX_CLOCK_XOSC_4 0x34 // 5 0 f = f(XOSC)/4 152 #define CC1101_GDOX_CLOCK_XOSC_6 0x35 // 5 0 f = f(XOSC)/6 153 #define CC1101_GDOX_CLOCK_XOSC_8 0x36 // 5 0 f = f(XOSC)/8 154 #define CC1101_GDOX_CLOCK_XOSC_12 0x37 // 5 0 f = f(XOSC)/12 155 #define CC1101_GDOX_CLOCK_XOSC_16 0x38 // 5 0 f = f(XOSC)/16 156 #define CC1101_GDOX_CLOCK_XOSC_24 0x39 // 5 0 f = f(XOSC)/24 157 #define CC1101_GDOX_CLOCK_XOSC_32 0x3A // 5 0 f = f(XOSC)/32 158 #define CC1101_GDOX_CLOCK_XOSC_48 0x3B // 5 0 f = f(XOSC)/48 159 #define CC1101_GDOX_CLOCK_XOSC_64 0x3C // 5 0 f = f(XOSC)/64 160 #define CC1101_GDOX_CLOCK_XOSC_96 0x3D // 5 0 f = f(XOSC)/96 161 #define CC1101_GDOX_CLOCK_XOSC_128 0x3E // 5 0 f = f(XOSC)/128 162 #define CC1101_GDOX_CLOCK_XOSC_192 0x3F // 5 0 f = f(XOSC)/192 (default for GDO0) 165 #define CC1101_ADC_RETENTION_OFF 0b00000000 // 6 6 do not retain ADC settings in sleep mode (default) 166 #define CC1101_ADC_RETENTION_ON 0b01000000 // 6 6 retain ADC settings in sleep mode 167 #define CC1101_RX_ATTEN_0_DB 0b00000000 // 5 4 Rx attenuation: 0 dB (default) 168 #define CC1101_RX_ATTEN_6_DB 0b00010000 // 5 4 6 dB 169 #define CC1101_RX_ATTEN_12_DB 0b00100000 // 5 4 12 dB 170 #define CC1101_RX_ATTEN_18_DB 0b00110000 // 5 4 18 dB 171 #define CC1101_FIFO_THR 0b00000111 // 5 4 Rx FIFO threshold [bytes] = CC1101_FIFO_THR * 4; Tx FIFO threshold [bytes] = 65 - (CC1101_FIFO_THR * 4) 174 #define CC1101_SYNC_WORD_MSB 0xD3 // 7 0 sync word MSB 177 #define CC1101_SYNC_WORD_LSB 0x91 // 7 0 sync word LSB 180 #define CC1101_PACKET_LENGTH 0xFF // 7 0 packet length in bytes 183 #define CC1101_PQT 0x00 // 7 5 preamble quality threshold 184 #define CC1101_CRC_AUTOFLUSH_OFF 0b00000000 // 3 3 automatic Rx FIFO flush on CRC check fail: disabled (default) 185 #define CC1101_CRC_AUTOFLUSH_ON 0b00001000 // 3 3 enabled 186 #define CC1101_APPEND_STATUS_OFF 0b00000000 // 2 2 append 2 status bytes to packet: disabled 187 #define CC1101_APPEND_STATUS_ON 0b00000100 // 2 2 enabled (default) 188 #define CC1101_ADR_CHK_NONE 0b00000000 // 1 0 address check: none (default) 189 #define CC1101_ADR_CHK_NO_BROADCAST 0b00000001 // 1 0 without broadcast 190 #define CC1101_ADR_CHK_SINGLE_BROADCAST 0b00000010 // 1 0 broadcast address 0x00 191 #define CC1101_ADR_CHK_DOUBLE_BROADCAST 0b00000011 // 1 0 broadcast addresses 0x00 and 0xFF 194 #define CC1101_WHITE_DATA_OFF 0b00000000 // 6 6 data whitening: disabled 195 #define CC1101_WHITE_DATA_ON 0b01000000 // 6 6 enabled (default) 196 #define CC1101_PKT_FORMAT_NORMAL 0b00000000 // 5 4 packet format: normal (FIFOs) 197 #define CC1101_PKT_FORMAT_SYNCHRONOUS 0b00010000 // 5 4 synchronous serial 198 #define CC1101_PKT_FORMAT_RANDOM 0b00100000 // 5 4 random transmissions 199 #define CC1101_PKT_FORMAT_ASYNCHRONOUS 0b00110000 // 5 4 asynchronous serial 200 #define CC1101_CRC_OFF 0b00000000 // 2 2 CRC disabled 201 #define CC1101_CRC_ON 0b00000100 // 2 2 CRC enabled (default) 202 #define CC1101_LENGTH_CONFIG_FIXED 0b00000000 // 1 0 packet length: fixed 203 #define CC1101_LENGTH_CONFIG_VARIABLE 0b00000001 // 1 0 variable (default) 204 #define CC1101_LENGTH_CONFIG_INFINITE 0b00000010 // 1 0 infinite 207 #define CC1101_DEVICE_ADDR 0x00 // 7 0 device address 210 #define CC1101_CHAN 0x00 // 7 0 channel number 213 #define CC1101_FREQ_IF 0x0F // 4 0 IF frequency setting; f_IF = (f(XOSC) / 2^10) * CC1101_FREQ_IF 216 #define CC1101_FREQOFF 0x00 // 7 0 base frequency offset (2s-compliment) 219 #define CC1101_FREQ_MSB 0x1E // 5 0 base frequency setting: f_carrier = (f(XOSC) / 2^16) * FREQ 220 #define CC1101_FREQ_MID 0xC4 // 7 0 where f(XOSC) = 26 MHz 221 #define CC1101_FREQ_LSB 0xEC // 7 0 FREQ = 3-byte value of FREQ registers 224 #define CC1101_CHANBW_E 0b10000000 // 7 6 channel bandwidth: BW_channel = f(XOSC) / (8 * (4 + CHANBW_M)*2^CHANBW_E) [Hz] 225 #define CC1101_CHANBW_M 0b00000000 // 5 4 default value for 26 MHz crystal: 203 125 Hz 226 #define CC1101_DRATE_E 0x0C // 3 0 symbol rate: R_data = (((256 + DRATE_M) * 2^DRATE_E) / 2^28) * f(XOSC) [Baud] 229 #define CC1101_DRATE_M 0x22 // 7 0 default value for 26 MHz crystal: 115 051 Baud 232 #define CC1101_DEM_DCFILT_OFF 0b10000000 // 7 7 digital DC filter: disabled 233 #define CC1101_DEM_DCFILT_ON 0b00000000 // 7 7 enabled - only for data rates above 250 kBaud (default) 234 #define CC1101_MOD_FORMAT_2_FSK 0b00000000 // 6 4 modulation format: 2-FSK (default) 235 #define CC1101_MOD_FORMAT_GFSK 0b00010000 // 6 4 GFSK 236 #define CC1101_MOD_FORMAT_ASK_OOK 0b00110000 // 6 4 ASK/OOK 237 #define CC1101_MOD_FORMAT_4_FSK 0b01000000 // 6 4 4-FSK 238 #define CC1101_MOD_FORMAT_MFSK 0b01110000 // 6 4 MFSK - only for data rates above 26 kBaud 239 #define CC1101_MANCHESTER_EN_OFF 0b00000000 // 3 3 Manchester encoding: disabled (default) 240 #define CC1101_MANCHESTER_EN_ON 0b00001000 // 3 3 enabled 241 #define CC1101_SYNC_MODE_NONE 0b00000000 // 2 0 synchronization: no preamble/sync 242 #define CC1101_SYNC_MODE_15_16 0b00000001 // 2 0 15/16 sync word bits 243 #define CC1101_SYNC_MODE_16_16 0b00000010 // 2 0 16/16 sync word bits (default) 244 #define CC1101_SYNC_MODE_30_32 0b00000011 // 2 0 30/32 sync word bits 245 #define CC1101_SYNC_MODE_NONE_THR 0b00000100 // 2 0 no preamble sync, carrier sense above threshold 246 #define CC1101_SYNC_MODE_15_16_THR 0b00000101 // 2 0 15/16 sync word bits, carrier sense above threshold 247 #define CC1101_SYNC_MODE_16_16_THR 0b00000110 // 2 0 16/16 sync word bits, carrier sense above threshold 248 #define CC1101_SYNC_MODE_30_32_THR 0b00000111 // 2 0 30/32 sync word bits, carrier sense above threshold 251 #define CC1101_FEC_OFF 0b00000000 // 7 7 forward error correction: disabled (default) 252 #define CC1101_FEC_ON 0b10000000 // 7 7 enabled - only for fixed packet length 253 #define CC1101_NUM_PREAMBLE_2 0b00000000 // 6 4 number of preamble bytes: 2 254 #define CC1101_NUM_PREAMBLE_3 0b00010000 // 6 4 3 255 #define CC1101_NUM_PREAMBLE_4 0b00100000 // 6 4 4 (default) 256 #define CC1101_NUM_PREAMBLE_6 0b00110000 // 6 4 6 257 #define CC1101_NUM_PREAMBLE_8 0b01000000 // 6 4 8 258 #define CC1101_NUM_PREAMBLE_12 0b01010000 // 6 4 12 259 #define CC1101_NUM_PREAMBLE_16 0b01100000 // 6 4 16 260 #define CC1101_NUM_PREAMBLE_24 0b01110000 // 6 4 24 261 #define CC1101_CHANSPC_E 0x02 // 1 0 channel spacing: df_channel = (f(XOSC) / 2^18) * (256 + CHANSPC_M) * 2^CHANSPC_E [Hz] 264 #define CC1101_CHANSPC_M 0xF8 // 7 0 default value for 26 MHz crystal: 199 951 kHz 267 #define CC1101_DEVIATION_E 0b01000000 // 6 4 frequency deviation: f_dev = (f(XOSC) / 2^17) * (8 + DEVIATION_M) * 2^DEVIATION_E [Hz] 268 #define CC1101_DEVIATION_M 0b00000111 // 2 0 default value for 26 MHz crystal: +- 47 607 Hz 269 #define CC1101_MSK_PHASE_CHANGE_PERIOD 0x07 // 2 0 phase change symbol period fraction: 1 / (MSK_PHASE_CHANGE_PERIOD + 1) 272 #define CC1101_RX_TIMEOUT_RSSI_OFF 0b00000000 // 4 4 Rx timeout based on RSSI value: disabled (default) 273 #define CC1101_RX_TIMEOUT_RSSI_ON 0b00010000 // 4 4 enabled 274 #define CC1101_RX_TIMEOUT_QUAL_OFF 0b00000000 // 3 3 check for sync word on Rx timeout 275 #define CC1101_RX_TIMEOUT_QUAL_ON 0b00001000 // 3 3 check for PQI set on Rx timeout 276 #define CC1101_RX_TIMEOUT_OFF 0b00000111 // 2 0 Rx timeout: disabled (default) 277 #define CC1101_RX_TIMEOUT_MAX 0b00000000 // 2 0 max value (actual value depends on WOR_RES, EVENT0 and f(XOSC)) 280 #define CC1101_CCA_MODE_ALWAYS 0b00000000 // 5 4 clear channel indication: always 281 #define CC1101_CCA_MODE_RSSI_THR 0b00010000 // 5 4 RSSI below threshold 282 #define CC1101_CCA_MODE_RX_PKT 0b00100000 // 5 4 unless receiving packet 283 #define CC1101_CCA_MODE_RSSI_THR_RX_PKT 0b00110000 // 5 4 RSSI below threshold unless receiving packet (default) 284 #define CC1101_RXOFF_IDLE 0b00000000 // 3 2 next mode after packet reception: idle (default) 285 #define CC1101_RXOFF_FSTXON 0b00000100 // 3 2 FSTxOn 286 #define CC1101_RXOFF_TX 0b00001000 // 3 2 Tx 287 #define CC1101_RXOFF_RX 0b00001100 // 3 2 Rx 288 #define CC1101_TXOFF_IDLE 0b00000000 // 1 0 next mode after packet transmission: idle (default) 289 #define CC1101_TXOFF_FSTXON 0b00000001 // 1 0 FSTxOn 290 #define CC1101_TXOFF_TX 0b00000010 // 1 0 Tx 291 #define CC1101_TXOFF_RX 0b00000011 // 1 0 Rx 294 #define CC1101_FS_AUTOCAL_NEVER 0b00000000 // 5 4 automatic calibration: never (default) 295 #define CC1101_FS_AUTOCAL_IDLE_TO_RXTX 0b00010000 // 5 4 every transition from idle to Rx/Tx 296 #define CC1101_FS_AUTOCAL_RXTX_TO_IDLE 0b00100000 // 5 4 every transition from Rx/Tx to idle 297 #define CC1101_FS_AUTOCAL_RXTX_TO_IDLE_4TH 0b00110000 // 5 4 every 4th transition from Rx/Tx to idle 298 #define CC1101_PO_TIMEOUT_COUNT_1 0b00000000 // 3 2 number of counter expirations before CHP_RDYN goes low: 1 (default) 299 #define CC1101_PO_TIMEOUT_COUNT_16 0b00000100 // 3 2 16 300 #define CC1101_PO_TIMEOUT_COUNT_64 0b00001000 // 3 2 64 301 #define CC1101_PO_TIMEOUT_COUNT_256 0b00001100 // 3 2 256 302 #define CC1101_PIN_CTRL_OFF 0b00000000 // 1 1 pin radio control: disabled (default) 303 #define CC1101_PIN_CTRL_ON 0b00000010 // 1 1 enabled 304 #define CC1101_XOSC_FORCE_OFF 0b00000000 // 0 0 do not force XOSC to remain on in sleep (default) 305 #define CC1101_XOSC_FORCE_ON 0b00000001 // 0 0 force XOSC to remain on in sleep 308 #define CC1101_FOC_BS_CS_GATE_OFF 0b00000000 // 5 5 do not freeze frequency compensation until CS goes high 309 #define CC1101_FOC_BS_CS_GATE_ON 0b00100000 // 5 5 freeze frequency compensation until CS goes high (default) 310 #define CC1101_FOC_PRE_K 0b00000000 // 4 3 frequency compensation loop gain before sync word: K 311 #define CC1101_FOC_PRE_2K 0b00001000 // 4 3 2K 312 #define CC1101_FOC_PRE_3K 0b00010000 // 4 3 3K (default) 313 #define CC1101_FOC_PRE_4K 0b00011000 // 4 3 4K 314 #define CC1101_FOC_POST_K 0b00000000 // 2 2 frequency compensation loop gain after sync word: same as FOC_PRE 315 #define CC1101_FOC_POST_K_2 0b00000100 // 2 2 K/2 (default) 316 #define CC1101_FOC_LIMIT_NO_COMPENSATION 0b00000000 // 1 0 frequency compensation saturation point: no compensation - required for ASK/OOK 317 #define CC1101_FOC_LIMIT_BW_CHAN_8 0b00000001 // 1 0 +- BW_chan/8 318 #define CC1101_FOC_LIMIT_BW_CHAN_4 0b00000010 // 1 0 +- BW_chan/4 (default) 319 #define CC1101_FOC_LIMIT_BW_CHAN_2 0b00000011 // 1 0 +- BW_chan/2 322 #define CC1101_BS_PRE_KI 0b00000000 // 7 6 clock recovery integral gain before sync word: Ki 323 #define CC1101_BS_PRE_2KI 0b01000000 // 7 6 2Ki (default) 324 #define CC1101_BS_PRE_3KI 0b10000000 // 7 6 3Ki 325 #define CC1101_BS_PRE_4KI 0b11000000 // 7 6 4Ki 326 #define CC1101_BS_PRE_KP 0b00000000 // 5 4 clock recovery proportional gain before sync word: Kp 327 #define CC1101_BS_PRE_2KP 0b00010000 // 5 4 2Kp 328 #define CC1101_BS_PRE_3KP 0b00100000 // 5 4 3Kp (default) 329 #define CC1101_BS_PRE_4KP 0b00110000 // 5 4 4Kp 330 #define CC1101_BS_POST_KI 0b00000000 // 3 3 clock recovery integral gain after sync word: same as BS_PRE 331 #define CC1101_BS_POST_KI_2 0b00001000 // 3 3 Ki/2 (default) 332 #define CC1101_BS_POST_KP 0b00000000 // 2 2 clock recovery proportional gain after sync word: same as BS_PRE 333 #define CC1101_BS_POST_KP_1 0b00000100 // 2 2 Kp (default) 334 #define CC1101_BS_LIMIT_NO_COMPENSATION 0b00000000 // 1 0 data rate compensation saturation point: no compensation 335 #define CC1101_BS_LIMIT_3_125 0b00000001 // 1 0 +- 3.125 % 336 #define CC1101_BS_LIMIT_6_25 0b00000010 // 1 0 +- 6.25 % 337 #define CC1101_BS_LIMIT_12_5 0b00000011 // 1 0 +- 12.5 % 340 #define CC1101_MAX_DVGA_GAIN_0 0b00000000 // 7 6 reduce maximum available DVGA gain: no reduction (default) 341 #define CC1101_MAX_DVGA_GAIN_1 0b01000000 // 7 6 disable top gain setting 342 #define CC1101_MAX_DVGA_GAIN_2 0b10000000 // 7 6 disable top two gain setting 343 #define CC1101_MAX_DVGA_GAIN_3 0b11000000 // 7 6 disable top three gain setting 344 #define CC1101_LNA_GAIN_REDUCE_0_DB 0b00000000 // 5 3 reduce maximum LNA gain by: 0 dB (default) 345 #define CC1101_LNA_GAIN_REDUCE_2_6_DB 0b00001000 // 5 3 2.6 dB 346 #define CC1101_LNA_GAIN_REDUCE_6_1_DB 0b00010000 // 5 3 6.1 dB 347 #define CC1101_LNA_GAIN_REDUCE_7_4_DB 0b00011000 // 5 3 7.4 dB 348 #define CC1101_LNA_GAIN_REDUCE_9_2_DB 0b00100000 // 5 3 9.2 dB 349 #define CC1101_LNA_GAIN_REDUCE_11_5_DB 0b00101000 // 5 3 11.5 dB 350 #define CC1101_LNA_GAIN_REDUCE_14_6_DB 0b00110000 // 5 3 14.6 dB 351 #define CC1101_LNA_GAIN_REDUCE_17_1_DB 0b00111000 // 5 3 17.1 dB 352 #define CC1101_MAGN_TARGET_24_DB 0b00000000 // 2 0 average amplitude target for filter: 24 dB 353 #define CC1101_MAGN_TARGET_27_DB 0b00000001 // 2 0 27 dB 354 #define CC1101_MAGN_TARGET_30_DB 0b00000010 // 2 0 30 dB 355 #define CC1101_MAGN_TARGET_33_DB 0b00000011 // 2 0 33 dB (default) 356 #define CC1101_MAGN_TARGET_36_DB 0b00000100 // 2 0 36 dB 357 #define CC1101_MAGN_TARGET_38_DB 0b00000101 // 2 0 38 dB 358 #define CC1101_MAGN_TARGET_40_DB 0b00000110 // 2 0 40 dB 359 #define CC1101_MAGN_TARGET_42_DB 0b00000111 // 2 0 42 dB 362 #define CC1101_AGC_LNA_PRIORITY_LNA2 0b00000000 // 6 6 LNA priority setting: LNA2 first 363 #define CC1101_AGC_LNA_PRIORITY_LNA 0b01000000 // 6 6 LNA first (default) 364 #define CC1101_CARRIER_SENSE_REL_THR_OFF 0b00000000 // 5 4 RSSI relative change to assert carrier sense: disabled (default) 365 #define CC1101_CARRIER_SENSE_REL_THR_6_DB 0b00010000 // 5 4 6 dB 366 #define CC1101_CARRIER_SENSE_REL_THR_10_DB 0b00100000 // 5 4 10 dB 367 #define CC1101_CARRIER_SENSE_REL_THR_14_DB 0b00110000 // 5 4 14 dB 368 #define CC1101_CARRIER_SENSE_ABS_THR 0x00 // 3 0 RSSI threshold to assert carrier sense in 2s compliment, Thr = MAGN_TARGET + CARRIER_SENSE_ABS_TH [dB] 371 #define CC1101_HYST_LEVEL_NONE 0b00000000 // 7 6 AGC hysteresis level: none 372 #define CC1101_HYST_LEVEL_LOW 0b01000000 // 7 6 low 373 #define CC1101_HYST_LEVEL_MEDIUM 0b10000000 // 7 6 medium (default) 374 #define CC1101_HYST_LEVEL_HIGH 0b11000000 // 7 6 high 375 #define CC1101_WAIT_TIME_8_SAMPLES 0b00000000 // 5 4 AGC wait time: 8 samples 376 #define CC1101_WAIT_TIME_16_SAMPLES 0b00010000 // 5 4 16 samples (default) 377 #define CC1101_WAIT_TIME_24_SAMPLES 0b00100000 // 5 4 24 samples 378 #define CC1101_WAIT_TIME_32_SAMPLES 0b00110000 // 5 4 32 samples 379 #define CC1101_AGC_FREEZE_NEVER 0b00000000 // 3 2 freeze AGC gain: never (default) 380 #define CC1101_AGC_FREEZE_SYNC_WORD 0b00000100 // 3 2 when sync word is found 381 #define CC1101_AGC_FREEZE_MANUAL_A 0b00001000 // 3 2 manually freeze analog control 382 #define CC1101_AGC_FREEZE_MANUAL_AD 0b00001100 // 3 2 manually freeze analog and digital control 383 #define CC1101_FILTER_LENGTH_8 0b00000000 // 1 0 averaging length for channel filter: 8 samples 384 #define CC1101_FILTER_LENGTH_16 0b00000001 // 1 0 16 samples (default) 385 #define CC1101_FILTER_LENGTH_32 0b00000010 // 1 0 32 samples 386 #define CC1101_FILTER_LENGTH_64 0b00000011 // 1 0 64 samples 387 #define CC1101_ASK_OOK_BOUNDARY_4_DB 0b00000000 // 1 0 ASK/OOK decision boundary: 4 dB 388 #define CC1101_ASK_OOK_BOUNDARY_8_DB 0b00000001 // 1 0 8 dB (default) 389 #define CC1101_ASK_OOK_BOUNDARY_12_DB 0b00000010 // 1 0 12 dB 390 #define CC1101_ASK_OOK_BOUNDARY_16_DB 0b00000011 // 1 0 16 dB 393 #define CC1101_EVENT0_TIMEOUT_MSB 0x87 // 7 0 EVENT0 timeout: t_event0 = (750 / f(XOSC)) * EVENT0_TIMEOUT * 2^(5 * WOR_RES) [s] 394 #define CC1101_EVENT0_TIMEOUT_LSB 0x6B // 7 0 default value for 26 MHz crystal: 1.0 s 397 #define CC1101_RC_POWER_UP 0b00000000 // 7 7 power up RC oscillator 398 #define CC1101_RC_POWER_DOWN 0b10000000 // 7 7 power down RC oscillator 399 #define CC1101_EVENT1_TIMEOUT_4 0b00000000 // 6 4 EVENT1 timeout: 4 RC periods 400 #define CC1101_EVENT1_TIMEOUT_6 0b00010000 // 6 4 6 RC periods 401 #define CC1101_EVENT1_TIMEOUT_8 0b00100000 // 6 4 8 RC periods 402 #define CC1101_EVENT1_TIMEOUT_12 0b00110000 // 6 4 12 RC periods 403 #define CC1101_EVENT1_TIMEOUT_16 0b01000000 // 6 4 16 RC periods 404 #define CC1101_EVENT1_TIMEOUT_24 0b01010000 // 6 4 24 RC periods 405 #define CC1101_EVENT1_TIMEOUT_32 0b01100000 // 6 4 32 RC periods 406 #define CC1101_EVENT1_TIMEOUT_48 0b01110000 // 6 4 48 RC periods (default) 407 #define CC1101_RC_CAL_OFF 0b00000000 // 3 3 disable RC oscillator calibration 408 #define CC1101_RC_CAL_ON 0b00001000 // 3 3 enable RC oscillator calibration (default) 409 #define CC1101_WOR_RES_1 0b00000000 // 1 0 EVENT0 resolution: 1 period (default) 410 #define CC1101_WOR_RES_2_5 0b00000001 // 1 0 2^5 periods 411 #define CC1101_WOR_RES_2_10 0b00000010 // 1 0 2^10 periods 412 #define CC1101_WOR_RES_2_15 0b00000011 // 1 0 2^15 periods 415 #define CC1101_LNA_CURRENT 0x01 // 7 6 front-end LNA PTAT current output adjustment 416 #define CC1101_LNA2MIX_CURRENT 0x01 // 5 4 front-end PTAT output adjustment 417 #define CC1101_LODIV_BUF_CURRENT_RX 0x01 // 3 2 Rx LO buffer current adjustment 418 #define CC1101_MIX_CURRENT 0x02 // 1 0 mixer current adjustment 421 #define CC1101_LODIV_BUF_CURRENT_TX 0x01 // 5 4 Tx LO buffer current adjustment 422 #define CC1101_PA_POWER 0x00 // 2 0 set power amplifier power according to PATABLE 425 #define CC1101_CHP_CURR_CAL_OFF 0b00000000 // 5 4 disable charge pump calibration 426 #define CC1101_CHP_CURR_CAL_ON 0b00100000 // 5 4 enable charge pump calibration (default) 427 #define CC1101_FSCAL3 0x09 // 3 0 charge pump output current: I_out = I_0 * 2^(FSCAL3/4) [A] 430 #define CC1101_VCO_CORE_LOW 0b00000000 // 5 5 VCO: low (default) 431 #define CC1101_VCO_CORE_HIGH 0b00100000 // 5 5 high 432 #define CC1101_FSCAL2 0x0A // 4 0 VCO current result/override 435 #define CC1101_FSCAL1 0x20 // 5 0 capacitor array setting for coarse VCO tuning 438 #define CC1101_FSCAL0 0x0D // 6 0 frequency synthesizer calibration setting 441 #define CC1101_RCCTRL1 0x41 // 6 0 RC oscillator configuration 444 #define CC1101_RCCTRL0 0x00 // 6 0 RC oscillator configuration 447 #define CC1101_TEMP_SENS_IDLE_OFF 0x7F // 7 0 temperature sensor will not be available in idle mode (default) 448 #define CC1101_TEMP_SENS_IDLE_ON 0xBF // 7 0 temperature sensor will be available in idle mode 451 #define CC1101_VCO_SEL_CAL_OFF 0b00000000 // 1 1 disable VCO selection calibration stage 452 #define CC1101_VCO_SEL_CAL_ON 0b00000010 // 1 1 enable VCO selection calibration stage 455 #define CC1101_PARTNUM 0x00 458 #define CC1101_VERSION 0x14 461 #define CC1101_MARC_STATE_SLEEP 0x00 // 4 0 main radio control state: sleep 462 #define CC1101_MARC_STATE_IDLE 0x01 // 4 0 idle 463 #define CC1101_MARC_STATE_XOFF 0x02 // 4 0 XOFF 464 #define CC1101_MARC_STATE_VCOON_MC 0x03 // 4 0 VCOON_MC 465 #define CC1101_MARC_STATE_REGON_MC 0x04 // 4 0 REGON_MC 466 #define CC1101_MARC_STATE_MANCAL 0x05 // 4 0 MANCAL 467 #define CC1101_MARC_STATE_VCOON 0x06 // 4 0 VCOON 468 #define CC1101_MARC_STATE_REGON 0x07 // 4 0 REGON 469 #define CC1101_MARC_STATE_STARTCAL 0x08 // 4 0 STARTCAL 470 #define CC1101_MARC_STATE_BWBOOST 0x09 // 4 0 BWBOOST 471 #define CC1101_MARC_STATE_FS_LOCK 0x0A // 4 0 FS_LOCK 472 #define CC1101_MARC_STATE_IFADCON 0x0B // 4 0 IFADCON 473 #define CC1101_MARC_STATE_ENDCAL 0x0C // 4 0 ENDCAL 474 #define CC1101_MARC_STATE_RX 0x0D // 4 0 RX 475 #define CC1101_MARC_STATE_RX_END 0x0E // 4 0 RX_END 476 #define CC1101_MARC_STATE_RX_RST 0x0F // 4 0 RX_RST 477 #define CC1101_MARC_STATE_TXRX_SWITCH 0x10 // 4 0 TXRX_SWITCH 478 #define CC1101_MARC_STATE_RXFIFO_OVERFLOW 0x11 // 4 0 RXFIFO_OVERFLOW 479 #define CC1101_MARC_STATE_FSTXON 0x12 // 4 0 FSTXON 480 #define CC1101_MARC_STATE_TX 0x13 // 4 0 TX 481 #define CC1101_MARC_STATE_TX_END 0x14 // 4 0 TX_END 482 #define CC1101_MARC_STATE_RXTX_SWITCH 0x15 // 4 0 RXTX_SWITCH 483 #define CC1101_MARC_STATE_TXFIFO_UNDERFLOW 0x16 // 4 0 TXFIFO_UNDERFLOW 486 #define CC1101_WORTIME_MSB 0x00 // 7 0 WOR timer value 487 #define CC1101_WORTIME_LSB 0x00 // 7 0 490 #define CC1101_CRC_OK 0b10000000 // 7 7 CRC check passed 491 #define CC1101_CRC_ERROR 0b00000000 // 7 7 CRC check failed 492 #define CC1101_CS 0b01000000 // 6 6 carrier sense 493 #define CC1101_PQT_REACHED 0b00100000 // 5 5 preamble quality reached 494 #define CC1101_CCA 0b00010000 // 4 4 channel clear 495 #define CC1101_SFD 0b00001000 // 3 3 start of frame delimiter - sync word received 496 #define CC1101_GDO2_ACTIVE 0b00000100 // 2 2 GDO2 is active/asserted 497 #define CC1101_GDO0_ACTIVE 0b00000001 // 0 0 GDO0 is active/asserted 538 int16_t
begin(
float freq = 434.0,
float br = 48.0,
float freqDev = 48.0,
float rxBw = 135.0, int8_t power = 10, uint8_t preambleLength = 16);
552 int16_t
transmit(uint8_t* data,
size_t len, uint8_t addr = 0)
override;
564 int16_t
receive(uint8_t* data,
size_t len)
override;
603 void setGdo0Action(
void (*func)(
void), RADIOLIB_INTERRUPT_STATUS dir = FALLING);
617 void setGdo2Action(
void (*func)(
void), RADIOLIB_INTERRUPT_STATUS dir = FALLING);
636 int16_t
startTransmit(uint8_t* data,
size_t len, uint8_t addr = 0)
override;
654 int16_t
readData(uint8_t* data,
size_t len)
override;
716 int16_t
setSyncWord(uint8_t syncH, uint8_t syncL, uint8_t maxErrBits = 0,
bool requireCarrierSense =
false);
731 int16_t
setSyncWord(uint8_t* syncWord, uint8_t len, uint8_t maxErrBits = 0,
bool requireCarrierSense =
false);
751 int16_t
setNodeAddress(uint8_t nodeAddr, uint8_t numBroadcastAddrs = 0);
767 int16_t
setOOK(
bool enableOOK);
884 #ifndef RADIOLIB_GODMODE 890 uint8_t _rawRSSI = 0;
892 uint8_t _modulation = CC1101_MOD_FORMAT_2_FSK;
894 size_t _packetLength = 0;
895 bool _packetLengthQueried =
false;
896 uint8_t _packetLengthConfig = CC1101_LENGTH_CONFIG_VARIABLE;
898 bool _promiscuous =
false;
901 uint8_t _syncWordLength = 2;
905 int16_t directMode();
906 static void getExpMant(
float target, uint16_t mantOffset, uint8_t divExp, uint8_t expMax, uint8_t& exp, uint8_t& mant);
907 int16_t setPacketMode(uint8_t mode, uint8_t len);
910 int16_t SPIgetRegValue(uint8_t reg, uint8_t msb = 7, uint8_t lsb = 0);
911 int16_t SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb = 7, uint8_t lsb = 0, uint8_t checkInterval = 2);
912 void SPIreadRegisterBurst(uint8_t reg, uint8_t numBytes, uint8_t* inBytes);
913 uint8_t SPIreadRegister(uint8_t reg);
914 void SPIwriteRegisterBurst(uint8_t reg, uint8_t* data,
size_t len);
915 void SPIwriteRegister(uint8_t reg, uint8_t data);
917 void SPIsendCommand(uint8_t cmd);
uint8_t random()
Get one truly random byte from RSSI noise.
Definition: CC1101.cpp:735
int16_t packetMode()
Stops direct mode. It is required to call this method to switch from direct transmissions to packet-b...
Definition: CC1101.cpp:185
int16_t begin(float freq=434.0, float br=48.0, float freqDev=48.0, float rxBw=135.0, int8_t power=10, uint8_t preambleLength=16)
Initialization method.
Definition: CC1101.cpp:8
int16_t startTransmit(String &str, uint8_t addr=0)
Interrupt-driven Arduino String transmit method. Unlike the standard transmit method, this one is non-blocking. Interrupt pin will be activated when transmission finishes.
Definition: PhysicalLayer.cpp:49
int16_t enableSyncWordFiltering(uint8_t maxErrBits=0, bool requireCarrierSense=false)
Enable sync word filtering and generation.
Definition: CC1101.cpp:632
int16_t startReceive()
Interrupt-driven receive method. GDO0 will be activated when full packet is received.
Definition: CC1101.cpp:254
int16_t disableSyncWordFiltering(bool requireCarrierSense=false)
Disable preamble and sync word filtering and generation.
Definition: CC1101.cpp:647
void setGdo0Action(void(*func)(void), RADIOLIB_INTERRUPT_STATUS dir=FALLING)
Sets interrupt service routine to call when GDO0 activates.
Definition: CC1101.cpp:192
int16_t variablePacketLengthMode(uint8_t maxLen=CC1101_MAX_PACKET_LENGTH)
Set modem in variable packet length mode.
Definition: CC1101.cpp:628
size_t getPacketLength(bool update=true) override
Query modem for the packet length of received payload.
Definition: CC1101.cpp:610
int16_t setEncoding(uint8_t encoding) override
Sets transmission encoding. Allowed values are RADIOLIB_ENCODING_NRZ and RADIOLIB_ENCODING_WHITENING...
Definition: CC1101.cpp:707
void clearGdo0Action()
Clears interrupt service routine to call when GDO0 activates.
Definition: CC1101.cpp:196
Control class for CC1101 module.
Definition: CC1101.h:504
uint8_t getLQI() const
Gets LQI (Link Quality Indicator) of the last received packet.
Definition: CC1101.cpp:606
int16_t disableAddressFiltering()
Disables address filtering. Calling this method will also erase previously set addresses.
Definition: CC1101.cpp:555
void setGdo2Action(void(*func)(void), RADIOLIB_INTERRUPT_STATUS dir=FALLING)
Sets interrupt service routine to call when GDO2 activates.
Definition: CC1101.cpp:200
int16_t setRxBandwidth(float rxBw)
Sets receiver bandwidth. Allowed values range from 58.0 to 812.0 kHz.
Definition: CC1101.cpp:357
float getRSSI() const
Gets RSSI (Recorded Signal Strength Indicator) of the last received packet.
Definition: CC1101.cpp:596
int16_t setOutputPower(int8_t power)
Sets output power. Allowed values are -30, -20, -15, -10, 0, 5, 7 or 10 dBm.
Definition: CC1101.cpp:401
int16_t startTransmit(uint8_t *data, size_t len, uint8_t addr=0) override
Interrupt-driven binary transmit method. Overloads for string-based transmissions are implemented in ...
Definition: CC1101.cpp:215
int16_t standby() override
Sets the module to standby mode.
Definition: CC1101.cpp:141
void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)
Some modules contain external RF switch controlled by two pins. This function gives RadioLib control ...
Definition: CC1101.cpp:731
int16_t fixedPacketLengthMode(uint8_t len=CC1101_MAX_PACKET_LENGTH)
Set modem in fixed packet length mode.
Definition: CC1101.cpp:624
Implements all common low-level SPI/UART/I2C methods to control the wireless module. Every module class contains one private instance of this class.
Definition: Module.h:17
int16_t transmit(__FlashStringHelper *fstr, uint8_t addr=0)
Arduino Flash String transmit method.
Definition: PhysicalLayer.cpp:8
int16_t readData(uint8_t *data, size_t len) override
Reads data received after calling startReceive method.
Definition: CC1101.cpp:274
void clearGdo2Action()
Clears interrupt service routine to call when GDO0 activates.
Definition: CC1101.cpp:208
int16_t setSyncWord(uint8_t syncH, uint8_t syncL, uint8_t maxErrBits=0, bool requireCarrierSense=false)
Sets 16-bit sync word as a two byte value.
Definition: CC1101.cpp:502
int16_t receive(String &str, size_t len=0)
Arduino String receive method.
Definition: PhysicalLayer.cpp:98
int16_t transmit(uint8_t *data, size_t len, uint8_t addr=0) override
Blocking binary transmit method. Overloads for string-based transmissions are implemented in Physical...
Definition: CC1101.cpp:98
int16_t receive(uint8_t *data, size_t len) override
Blocking binary receive method. Overloads for string-based transmissions are implemented in PhysicalL...
Definition: CC1101.cpp:122
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values are in bands 300.0 to 348.0 MHz, 387.0 to 464.0 MHz and 779.0 to 928.0 MHz.
Definition: CC1101.cpp:314
int16_t setFrequencyDeviation(float freqDev) override
Sets frequency deviation. Allowed values range from 1.587 to 380.8 kHz.
Definition: CC1101.cpp:377
Provides common interface for protocols that run on LoRa/FSK modules, such as RTTY or LoRaWAN...
Definition: PhysicalLayer.h:13
int16_t setNodeAddress(uint8_t nodeAddr, uint8_t numBroadcastAddrs=0)
Sets node and broadcast addresses. Calling this method will also enable address filtering.
Definition: CC1101.cpp:544
CC1101(Module *module)
Default constructor.
Definition: CC1101.cpp:4
int16_t transmitDirect(uint32_t frf=0) override
Starts direct mode transmission.
Definition: CC1101.cpp:150
int16_t setBitRate(float br)
Sets bit rate. Allowed values range from 0.025 to 600.0 kbps.
Definition: CC1101.cpp:340
int16_t setPromiscuousMode(bool promiscuous=true)
Set modem in "sniff" mode: no packet filtering (e.g., no preamble, sync word, address, CRC).
Definition: CC1101.cpp:662
int16_t setCrcFiltering(bool crcOn=true)
Enable CRC filtering and generation.
Definition: CC1101.cpp:652
int16_t setOOK(bool enableOOK)
Enables/disables OOK modulation instead of FSK.
Definition: CC1101.cpp:565
int16_t setPreambleLength(uint8_t preambleLength)
Sets preamble length.
Definition: CC1101.cpp:507
int16_t receiveDirect() override
Starts direct mode reception.
Definition: CC1101.cpp:172
int16_t setDataShaping(uint8_t sh) override
Sets Gaussian filter bandwidth-time product that will be used for data shaping. Allowed value is RADI...
Definition: CC1101.cpp:688
int16_t readData(String &str, size_t len=0)
Reads data that was received after calling startReceive method.
Definition: PhysicalLayer.cpp:57
1.8.13