Commit graph

1103 commits

Author SHA1 Message Date
jgromes
f109fd0158 [LLCC68] Fixed set data rate for LLCC68 (#946) 2024-01-27 18:47:05 +01:00
jgromes
a642f5a8df [SX126x] Implemented data rate check 2024-01-27 18:46:22 +01:00
jgromes
a4b148d609 [SX127x] Implemented data rate check 2024-01-27 18:45:37 +01:00
jgromes
4c5321e5cb [SX1233] Fix incorrect exclude macro guard (#929) 2024-01-14 21:56:18 +01:00
jgromes
ea66037c11 [STM32WL] Fix Module pinter (CI_BUILD_ALL) 2024-01-14 16:48:32 +01:00
jgromes
d301aa6a37 [SX126x] Fix txMode made private 2024-01-14 16:48:06 +01:00
jgromes
8c1d0521c5 [SX127x] Removed extra semicolons 2024-01-14 16:29:57 +01:00
Paul Lietar
ab41bcac00 [CC1101] Correctly wait for packet end on blocking receive.
When using a blocking receive, I was getting non-sensical packet length
and garbage data, whereas IRQ mode was working fine. This was happening
despite what looked like a workaround for this in the code which would
read the length twice.

I tracked it down to the receive function trying to read the data too
early, before the packet had even been received. The receive function
would wait for the GDO0 pin to become low, then assume the packet was
ready and read off the data.

However, the GD0 pin is set by the `startReceive` as inverted and,
according to the datasheet, in a mode which "asserts when sync word has
been received, and de-asserts at the end of the packet". In other words,
taking into account the inversion, GDO0 becomes low at the start of the
packet and high at the end of it.

Therefore the receive function would actually try to read the packet
data as soon as the packet had started, rather than wait until the end,
explaining the garbage data.

I suspect that with a slow MCU and a fast transmission rate, the
previous workaround of reading the length field twice may have delayed
the data read just enough to allow the packet to be fully received, but
this does not work in the general case.

This commit updates the logic by first waiting for a low signal,
followed by a high one. This is actually the exact same logic used in
the blocking transmit implementation, but inverted to account for the
INV flag set on GDO0. The commit also removes the past workaround, since
it should not be necessary anymore.
2024-01-13 17:18:23 +00:00
jgromes
842c54849d [SX127x] Added setLowBatteryThreshold (#925) 2024-01-13 13:39:51 +01:00
jgromes
30961964c5 [CC1101] Cleanup private/protected members 2024-01-12 20:35:10 +01:00
jgromes
1575e37355 [nRF24] Cleanup private/protected members 2024-01-12 20:29:09 +01:00
jgromes
3a5d9b5c32 [RF69] Cleanup private/protected members 2024-01-12 20:26:07 +01:00
jgromes
935c316f7c [Si443x] cleanup 2024-01-12 20:14:18 +01:00
jgromes
d31b4836e1 [Si443x] Cleanup private/protected members 2024-01-12 20:12:45 +01:00
jgromes
34d80faaf0 [SX126x] Cleanup private/protected members 2024-01-12 20:00:08 +01:00
jgromes
948088c1e1 [SX128x] Moved setHeaderType to private methods 2024-01-12 19:49:17 +01:00
jgromes
b5d931ec79 [SX128x] Cleanup private/protected members 2024-01-12 19:45:41 +01:00
jgromes
bbe407b50f [SX127x] Cleanup private/protected members 2024-01-12 18:51:55 +01:00
Peter Buchegger
abfc91a9bc
Update SX127x.cpp 2024-01-11 17:52:50 +01:00
Peter Buchegger
6600860915
Update RF69.cpp 2024-01-11 17:51:39 +01:00
jgromes
bf061c655f [SX126x] Allow custom band calibration 2024-01-04 18:30:22 +01:00
jgromes
19b61739e6 [SX126x] Fixed image calibration 2024-01-04 18:23:36 +01:00
jgromes
3478d90819 [SX126x] Improved image calibration 2024-01-04 18:21:35 +01:00
jgromes
6bac59ce08 [CC1101] Fixed direct transmit (#911) 2023-12-22 15:04:19 +01:00
jgromes
a30d3da296 [SX123x] Added note about high bit rate mode for SX1233 2023-12-09 16:12:10 +01:00
jgromes
57a6a9ccc3 [SX123x] Added missing include 2023-12-09 16:00:42 +01:00
jgromes
af9073fae4 [RF69] Make setMode protected 2023-12-09 15:38:38 +01:00
jgromes
c0d8d7871e [SX123x] Added support for SX1233 (#898) 2023-12-09 15:34:56 +01:00
S5NC
14a2238ca6
Update SX128x.h 2023-11-30 12:18:13 +00:00
jgromes
379c475d5e [SX1231] Reworked macro configuration system 2023-11-27 21:15:21 +01:00
jgromes
827aac5938 [SX128x] Reworked macro configuration system 2023-11-27 21:15:07 +01:00
jgromes
34c861cfbe [SX127x] Reworked macro configuration system 2023-11-27 21:14:33 +01:00
jgromes
49feff6df2 [SX126x] Reworked macro configuration system 2023-11-27 19:43:01 +01:00
jgromes
77c9b2875d [Si443x] Reworked macro configuration system 2023-11-27 19:40:57 +01:00
jgromes
f0f9200269 [RFM2x] Reworked macro configuration system 2023-11-27 19:40:32 +01:00
jgromes
2e1ce8ce89 [RF69] Reworked macro configuration system 2023-11-27 19:40:19 +01:00
jgromes
63287ab6fd [nRF24] Reworked macro configuration system 2023-11-27 19:40:00 +01:00
jgromes
509b8204f1 [LLCC68] Reworked macro configuration system 2023-11-27 19:39:35 +01:00
jgromes
0c436e5ed8 [CC1101] Reworked macro configuration system 2023-11-27 19:39:24 +01:00
jgromes
81c59f61ff [SX127x] Fixed copy-pasted code snippet 2023-11-21 20:48:06 +01:00
jgromes
51169106c2 [SX126x] Fixed unused variable warning 2023-11-18 16:34:48 +01:00
jgromes
455c3c8dd0 [CC1101] Fixed crash in blocking receive (#839) 2023-11-18 15:11:10 +01:00
StevenCellist
82258105b7
[LoRaWAN] Rework bands, official Rx windows, support ADR, confirm frames, improve EEPROM handling, support clock drift (#867)
* [LoRaWAN] rework bands, add ADR, partial MAC support

Known problem: terribly bad at receiving downlinks
Mask-list bands (e.g. US915) untested, likely a few bugs

* [LoRaWAN] Change Rx windows from CAD to RxSingle

* [LoRaWAN] improve persistence, better Rx windows, wear leveling, confirmed frames

* [LoRaWAN] Module-independent (OTAA) Rx windows, fix confirming downlinks

* [LoRaWAN] Implement SX127x support, fix MAC uplinking, support clock drift

* [ArduinoHal] fix clock drift calculation

* [LoRaWAN] Improve band & ADR logic, allow setting ADR, DR, subband, update examples

* [LoRaWAN] Fix EU868 coding rate, improve example

* [LoRaWAN] fix unused channel index

* [LoRaWAN] fix merge issue (deleted line)

* [LoRaWAN] fix CSMA calling now incorrect function

* [LoRaWAN] fix include logic

* [LoRaWAN] fix warnings, remove duplicate function

* [LoRaWAN] improve examples, add unified sendReceive, bugfixes, add FSK

* [LoRaWAN] improve examples

* [LoRaWAN] add new keywords, add debug guard

* [SX127x] Updated startReceive interface to be more in line with SX126x

* [SX127x] Added public method to convert from bytes to symbols

* [LoRaWAN] Update start receive for SX127x

* Added note about LoRaWAN beta

* [SX127x] Fixed potential float overflow

---------

Co-authored-by: jgromes <jan.gromes@gmail.com>
2023-11-12 14:02:39 +01:00
jgromes
d262732554 [RFM9x] Added missing alias for RFM95 2023-11-07 07:13:02 +01:00
Amalinda Gamage
aca1d78a97
added functionality for LoRa Alliance TR-13 Enabling CSMA for LoRaWAN (#859)
* added functionality for LoRa Alliance TR-13 Enabling CSMA for LoRaWAN

* Addressed feedback on CSMA implementation

* symbolNumValues[6] array no longer needed as we will utilize only two symbol CAD operations for all SFs.
2023-10-29 14:19:00 +01:00
jgromes
29c891e017 [SX126x] Fixed duplicate setPaConfig 2023-10-20 19:45:50 +02:00
jgromes
f1f3336e59 [SX126x] Make setPaConfig public (#852) 2023-10-20 19:37:44 +02:00
jgromes
46bf0445fa [SX126x] Decrease startup wait to 10 ms (#850) 2023-10-17 20:14:26 +02:00
jgromes
0d43891070 [STM32WLx] Added missing interrupt actions (#844) 2023-10-14 14:05:55 +02:00
jgromes
96f90c8ee0 [Si443x] Fixed debug float print 2023-10-14 10:27:53 +02:00