16 commits

Author	SHA1	Message	Date
jgromes	c127712c5e	[SX127x] Added check for LoRa header CRC mismatch (#200)	2020-11-19 17:07:32 +01:00
jgromes	d7a620c8ea	[SX1272] Fixed incorrect FSK/OOK modulation check	2020-08-07 17:45:39 +02:00
jgromes	6ff84d7b23	[SX127x] Added Module overrides for all Arduino core functions	2020-08-01 16:34:37 +02:00
jgromes	58194483b1	[SX127x] Added methods to manually set LoRa LDRO (#162)	2020-07-08 18:52:34 +02:00
jgromes	e1141ca64c	[SX127x] Synced parameters of all LoRa modules	2020-07-06 11:48:14 +02:00
jgromes	82e4cb7f97	[SX127x] Synced parameters of all FSK modules	2020-07-06 11:13:53 +02:00
jgromes	7dc7f4d76c	[SX127x] Changed shaping datatype to uint8_t	2020-07-06 08:53:05 +02:00
jgromes	a367a3fe69	[SX127x] Fixes from cppcheck scan	2020-07-04 14:49:05 +02:00
jgromes	3dd3a471e5	[SX127x] Reworked driver exclusion	2020-06-30 10:43:56 +02:00
jgromes	274b38d556	[SX127x] Using range check macro	2020-03-30 19:29:29 +02:00
Callan Bryant	6c99486343	Swap delayMicroseconds() to delay where appropriate ... See https://github.com/jgromes/RadioLib/issues/126 for context.	2020-03-16 12:12:06 +00:00
jgromes	2cf4971c2d	[SX127x] Set default FSK BT shaping to 0.5 for SX126x FSK (#123)	2020-03-14 13:44:50 +01:00
jgromes	c1c991acc8	[SX127x] Fixed reset implementation for SX1272/73	2020-03-13 21:16:29 +01:00
jgromes	106012b323	[SX127x] Fixed incorrect OOK data shaping on SX1272 (#110)	2020-02-08 08:42:25 +01:00
jgromes	acd78cb6bb	[SX127x] Added assert macro	2020-01-13 16:37:31 +01:00
jgromes	915f3780cc	Reworked directory structure	2019-11-20 17:19:15 +01:00

Renamed from src/modules/SX1272.cpp (Browse further)