Commit graph

17 commits

Author SHA1 Message Date
jgromes
274b38d556 [SX127x] Using range check macro 2020-03-30 19:29:29 +02:00
jgromes
39c259848c Added support for Nano 33 BLE 2020-03-27 14:10:45 +01:00
jgromes
caa05f8ad8 [SX127x] Fixed typos 2020-03-22 08:13:27 +01:00
Callan Bryant
6c99486343
Swap delayMicroseconds() to delay where appropriate
See https://github.com/jgromes/RadioLib/issues/126 for context.
2020-03-16 12:12:06 +00:00
jgromes
2cf4971c2d [SX127x] Set default FSK BT shaping to 0.5 for SX126x FSK (#123) 2020-03-14 13:44:50 +01:00
jgromes
c1c991acc8 [SX127x] Fixed reset implementation for SX1272/73 2020-03-13 21:16:29 +01:00
4m1g0
4426c9174d [SX127x] Set OOK parameter before setting the bitrate to avoid reading undefined variable 2020-02-24 15:52:18 +01:00
jgromes
106012b323 [SX127x] Fixed incorrect OOK data shaping on SX1272 (#110) 2020-02-08 08:42:25 +01:00
jgromes
318de480ab Reworked PhysicalLayer to accept frequency step directly 2020-02-07 18:31:51 +01:00
Callan Bryant
c49323fa78
Prevent spurious resets on some boards
My receiver was failing to receive after a random amount of time (2 - 60
seconds). I discovered some power supply issues (DC-DC converter
related) that turned out to be another cause of the same problem but
only on some boards.

The reset procedure for most of the boards that RadioLib can drive
changes the pin mode of the reset line to an input after reset,
effectively tri-stating the output. I had seen this but dismissed it
after checking that the SX126x has a pullup on NRST meaning this was not
an issue.

The receiver I have produced uses a level converter to translate the 5v0
signals to 3v3. The level converters are not themselves pulled up or
down, which means when a pin is connected in a high-impedance input
state it will float around possibly randomly.

This can cause spurious resets on my board, and possibly others. I
remembered the reset procedure when I realised I could reproduce the
problem by rubbing the board on my shirt, probably causing some ESD to
trigger a change on the reset line.

This PR simply removes the lines that change the pinmode to input after
reset leaving it as an output which is hard-driven and the safest way. I
assume that the current behaviour was chosen to decrease the chance of a
conflict if used incorrectly.
2020-01-29 15:00:36 +00:00
jgromes
acd78cb6bb [SX127x] Added assert macro 2020-01-13 16:37:31 +01:00
jgromes
cb5c8d6313 [SX127x] Moved reset to chip detection loop 2020-01-06 17:20:51 +01:00
jgromes
9da1573df0 Renamed unused pin macro to NC 2020-01-06 17:20:18 +01:00
jgromes
d00d07fe9c [SX127x] Added methods to clear DIO actions 2019-12-29 10:36:52 +01:00
jgromes
beb160f705 [SX127x] Changed pin mapping and implemented reset 2019-12-27 13:19:54 +01:00
jgromes
05d6a1c1c8 [SX127x] Added fixed packet mode for FSK modem 2019-11-22 13:30:02 +01:00
jgromes
915f3780cc Reworked directory structure 2019-11-20 17:19:15 +01:00