diff --git a/_s_x1272_8h_source.html b/_s_x1272_8h_source.html index f6644f7d..9eb5f94c 100644 --- a/_s_x1272_8h_source.html +++ b/_s_x1272_8h_source.html @@ -86,7 +86,7 @@ $(document).ready(function(){initNavTree('_s_x1272_8h_source.html','');});
1 #if !defined(_RADIOLIB_SX1272_H)
2 #define _RADIOLIB_SX1272_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SX127X)
7 
8 #include "../../Module.h"
9 #include "SX127x.h"
10 
11 // SX1272 specific register map
12 #define SX1272_REG_AGC_REF 0x43
13 #define SX1272_REG_AGC_THRESH_1 0x44
14 #define SX1272_REG_AGC_THRESH_2 0x45
15 #define SX1272_REG_AGC_THRESH_3 0x46
16 #define SX1272_REG_PLL_HOP 0x4B
17 #define SX1272_REG_TCXO 0x58
18 #define SX1272_REG_PA_DAC 0x5A
19 #define SX1272_REG_PLL 0x5C
20 #define SX1272_REG_PLL_LOW_PN 0x5E
21 #define SX1272_REG_FORMER_TEMP 0x6C
22 #define SX1272_REG_BIT_RATE_FRAC 0x70
23 
24 // SX1272 LoRa modem settings
25 // SX1272_REG_FRF_MSB + REG_FRF_MID + REG_FRF_LSB
26 #define SX1272_FRF_MSB 0xE4 // 7 0 carrier frequency setting: f_RF = (F(XOSC) * FRF)/2^19
27 #define SX1272_FRF_MID 0xC0 // 7 0 where F(XOSC) = 32 MHz
28 #define SX1272_FRF_LSB 0x00 // 7 0 FRF = 3 byte value of FRF registers
29 
30 // SX127X_REG_MODEM_CONFIG_1
31 #define SX1272_BW_125_00_KHZ 0b00000000 // 7 6 bandwidth: 125 kHz
32 #define SX1272_BW_250_00_KHZ 0b01000000 // 7 6 250 kHz
33 #define SX1272_BW_500_00_KHZ 0b10000000 // 7 6 500 kHz
34 #define SX1272_CR_4_5 0b00001000 // 5 3 error coding rate: 4/5
35 #define SX1272_CR_4_6 0b00010000 // 5 3 4/6
36 #define SX1272_CR_4_7 0b00011000 // 5 3 4/7
37 #define SX1272_CR_4_8 0b00100000 // 5 3 4/8
38 #define SX1272_HEADER_EXPL_MODE 0b00000000 // 2 2 explicit header mode
39 #define SX1272_HEADER_IMPL_MODE 0b00000100 // 2 2 implicit header mode
40 #define SX1272_RX_CRC_MODE_OFF 0b00000000 // 1 1 CRC disabled
41 #define SX1272_RX_CRC_MODE_ON 0b00000010 // 1 1 CRC enabled
42 #define SX1272_LOW_DATA_RATE_OPT_OFF 0b00000000 // 0 0 low data rate optimization disabled
43 #define SX1272_LOW_DATA_RATE_OPT_ON 0b00000001 // 0 0 low data rate optimization enabled, mandatory for SF 11 and 12 with BW 125 kHz
44 
45 // SX127X_REG_MODEM_CONFIG_2
46 #define SX1272_AGC_AUTO_OFF 0b00000000 // 2 2 LNA gain set by REG_LNA
47 #define SX1272_AGC_AUTO_ON 0b00000100 // 2 2 LNA gain set by internal AGC loop
48 
49 // SX127X_REG_VERSION
50 #define SX1272_CHIP_VERSION 0x22
51 
52 // SX1272 FSK modem settings
53 // SX127X_REG_OP_MODE
54 #define SX1272_NO_SHAPING 0b00000000 // 4 3 data shaping: no shaping (default)
55 #define SX1272_FSK_GAUSSIAN_1_0 0b00001000 // 4 3 FSK modulation Gaussian filter, BT = 1.0
56 #define SX1272_FSK_GAUSSIAN_0_5 0b00010000 // 4 3 FSK modulation Gaussian filter, BT = 0.5
57 #define SX1272_FSK_GAUSSIAN_0_3 0b00011000 // 4 3 FSK modulation Gaussian filter, BT = 0.3
58 #define SX1272_OOK_FILTER_BR 0b00001000 // 4 3 OOK modulation filter, f_cutoff = BR
59 #define SX1272_OOK_FILTER_2BR 0b00010000 // 4 3 OOK modulation filter, f_cutoff = 2*BR
60 
61 // SX127X_REG_PA_RAMP
62 #define SX1272_LOW_PN_TX_PLL_OFF 0b00010000 // 4 4 use standard PLL in transmit mode (default)
63 #define SX1272_LOW_PN_TX_PLL_ON 0b00000000 // 4 4 use lower phase noise PLL in transmit mode
64 
65 // SX127X_REG_SYNC_CONFIG
66 #define SX1272_FIFO_FILL_CONDITION_SYNC_ADDRESS 0b00000000 // 3 3 FIFO will be filled when sync address interrupt occurs (default)
67 #define SX1272_FIFO_FILL_CONDITION_ALWAYS 0b00001000 // 3 3 FIFO will be filled as long as this bit is set
68 
69 // SX1272_REG_AGC_REF
70 #define SX1272_AGC_REFERENCE_LEVEL 0x13 // 5 0 floor reference for AGC thresholds: AgcRef = -174 + 10*log(2*RxBw) + 8 + AGC_REFERENCE_LEVEL [dBm]
71 
72 // SX1272_REG_AGC_THRESH_1
73 #define SX1272_AGC_STEP_1 0x0E // 4 0 1st AGC threshold
74 
75 // SX1272_REG_AGC_THRESH_2
76 #define SX1272_AGC_STEP_2 0x50 // 7 4 2nd AGC threshold
77 #define SX1272_AGC_STEP_3 0x0B // 4 0 3rd AGC threshold
78 
79 // SX1272_REG_AGC_THRESH_3
80 #define SX1272_AGC_STEP_4 0xD0 // 7 4 4th AGC threshold
81 #define SX1272_AGC_STEP_5 0x0B // 4 0 5th AGC threshold
82 
83 // SX1272_REG_PLL_LOW_PN
84 #define SX1272_PLL_LOW_PN_BANDWIDTH_75_KHZ 0b00000000 // 7 6 low phase noise PLL bandwidth: 75 kHz
85 #define SX1272_PLL_LOW_PN_BANDWIDTH_150_KHZ 0b01000000 // 7 6 150 kHz
86 #define SX1272_PLL_LOW_PN_BANDWIDTH_225_KHZ 0b10000000 // 7 6 225 kHz
87 #define SX1272_PLL_LOW_PN_BANDWIDTH_300_KHZ 0b11000000 // 7 6 300 kHz (default)
88 
95 class SX1272: public SX127x {
96  public:
97 
98  // constructor
99 
105  SX1272(Module* mod);
106 
107  // basic methods
108 
133  int16_t begin(float freq = 915.0, float bw = 125.0, uint8_t sf = 9, uint8_t cr = 7, uint8_t syncWord = SX127X_SYNC_WORD, int8_t power = 10, uint16_t preambleLength = 8, uint8_t gain = 0);
134 
155  int16_t beginFSK(float freq = 915.0, float br = 48.0, float rxBw = 125.0, float freqDev = 50.0, int8_t power = 10, uint16_t preambleLength = 16, bool enableOOK = false);
156 
160  void reset() override;
161 
162  // configuration methods
163 
171  int16_t setFrequency(float freq);
172 
180  int16_t setBandwidth(float bw);
181 
189  int16_t setSpreadingFactor(uint8_t sf);
190 
198  int16_t setCodingRate(uint8_t cr);
199 
207  int16_t setOutputPower(int8_t power);
208 
217  int16_t setGain(uint8_t gain);
218 
227  int16_t setDataShaping(uint8_t sh) override;
228 
238  int16_t setDataShapingOOK(uint8_t sh);
239 
245  float getRSSI();
246 
254  int16_t setCRC(bool enableCRC);
255 
264  int16_t forceLDRO(bool enable);
265 
272  int16_t autoLDRO();
273 
279  int16_t implicitHeader(size_t len);
280 
288  int16_t explicitHeader();
289 
290 #ifndef RADIOLIB_GODMODE
291  protected:
292 #endif
293  int16_t setBandwidthRaw(uint8_t newBandwidth);
294  int16_t setSpreadingFactorRaw(uint8_t newSpreadingFactor);
295  int16_t setCodingRateRaw(uint8_t newCodingRate);
296  int16_t setHeaderType(uint8_t headerType, size_t len = 0xFF);
297 
298  int16_t configFSK();
299 
300 #ifndef RADIOLIB_GODMODE
301  private:
302 #endif
303  bool _ldroAuto = true;
304  bool _ldroEnabled = false;
305 
306 };
307 
308 #endif
309 
310 #endif
SX1272
Derived class for SX1272 modules. Also used as base class for SX1273. Both modules use the same basic...
Definition: SX1272.h:95
SX1272::setFrequency
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values range from 860.0 MHz to 1020.0 MHz.
Definition: SX1272.cpp:70
-
SX127x
Base class for SX127x series. All derived classes for SX127x (e.g. SX1278 or SX1272) inherit from thi...
Definition: SX127x.h:536
+
SX127x
Base class for SX127x series. All derived classes for SX127x (e.g. SX1278 or SX1272) inherit from thi...
Definition: SX127x.h:547
SX1272::autoLDRO
int16_t autoLDRO()
Re-enables automatic LDRO configuration. Only available in LoRa mode. After calling this method...
Definition: SX1272.cpp:389
SX1272::setGain
int16_t setGain(uint8_t gain)
Sets gain of receiver LNA (low-noise amplifier). Can be set to any integer in range 1 to 6 where 1 is...
Definition: SX1272.cpp:240
SX1272::begin
int16_t begin(float freq=915.0, float bw=125.0, uint8_t sf=9, uint8_t cr=7, uint8_t syncWord=SX127X_SYNC_WORD, int8_t power=10, uint16_t preambleLength=8, uint8_t gain=0)
LoRa modem initialization method. Must be called at least once from Arduino sketch to initialize the ...
Definition: SX1272.cpp:8
diff --git a/_s_x1278_8h_source.html b/_s_x1278_8h_source.html index 3ce56bbf..f89ee7c3 100644 --- a/_s_x1278_8h_source.html +++ b/_s_x1278_8h_source.html @@ -84,7 +84,7 @@ $(document).ready(function(){initNavTree('_s_x1278_8h_source.html','');});
SX1278.h
-
1 #if !defined(_RADIOLIB_SX1278_H)
2 #define _RADIOLIB_SX1278_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SX127X)
7 
8 #include "../../Module.h"
9 #include "SX127x.h"
10 
11 // SX1278 specific register map
12 #define SX1278_REG_MODEM_CONFIG_3 0x26
13 #define SX1278_REG_PLL_HOP 0x44
14 #define SX1278_REG_TCXO 0x4B
15 #define SX1278_REG_PA_DAC 0x4D
16 #define SX1278_REG_FORMER_TEMP 0x5B
17 #define SX1278_REG_REG_BIT_RATE_FRAC 0x5D
18 #define SX1278_REG_AGC_REF 0x61
19 #define SX1278_REG_AGC_THRESH_1 0x62
20 #define SX1278_REG_AGC_THRESH_2 0x63
21 #define SX1278_REG_AGC_THRESH_3 0x64
22 #define SX1278_REG_PLL 0x70
23 
24 // SX1278 LoRa modem settings
25 // SX1278_REG_OP_MODE MSB LSB DESCRIPTION
26 #define SX1278_HIGH_FREQ 0b00000000 // 3 3 access HF test registers
27 #define SX1278_LOW_FREQ 0b00001000 // 3 3 access LF test registers
28 
29 // SX1278_REG_FRF_MSB + REG_FRF_MID + REG_FRF_LSB
30 #define SX1278_FRF_MSB 0x6C // 7 0 carrier frequency setting: f_RF = (F(XOSC) * FRF)/2^19
31 #define SX1278_FRF_MID 0x80 // 7 0 where F(XOSC) = 32 MHz
32 #define SX1278_FRF_LSB 0x00 // 7 0 FRF = 3 byte value of FRF registers
33 
34 // SX1278_REG_PA_CONFIG
35 #define SX1278_MAX_POWER 0b01110000 // 6 4 max power: P_max = 10.8 + 0.6*MAX_POWER [dBm]; P_max(MAX_POWER = 0b111) = 15 dBm
36 #define SX1278_LOW_POWER 0b00100000 // 6 4
37 
38 // SX1278_REG_LNA
39 #define SX1278_LNA_BOOST_LF_OFF 0b00000000 // 4 3 default LNA current
40 
41 // SX127X_REG_MODEM_CONFIG_1
42 #define SX1278_BW_7_80_KHZ 0b00000000 // 7 4 bandwidth: 7.80 kHz
43 #define SX1278_BW_10_40_KHZ 0b00010000 // 7 4 10.40 kHz
44 #define SX1278_BW_15_60_KHZ 0b00100000 // 7 4 15.60 kHz
45 #define SX1278_BW_20_80_KHZ 0b00110000 // 7 4 20.80 kHz
46 #define SX1278_BW_31_25_KHZ 0b01000000 // 7 4 31.25 kHz
47 #define SX1278_BW_41_70_KHZ 0b01010000 // 7 4 41.70 kHz
48 #define SX1278_BW_62_50_KHZ 0b01100000 // 7 4 62.50 kHz
49 #define SX1278_BW_125_00_KHZ 0b01110000 // 7 4 125.00 kHz
50 #define SX1278_BW_250_00_KHZ 0b10000000 // 7 4 250.00 kHz
51 #define SX1278_BW_500_00_KHZ 0b10010000 // 7 4 500.00 kHz
52 #define SX1278_CR_4_5 0b00000010 // 3 1 error coding rate: 4/5
53 #define SX1278_CR_4_6 0b00000100 // 3 1 4/6
54 #define SX1278_CR_4_7 0b00000110 // 3 1 4/7
55 #define SX1278_CR_4_8 0b00001000 // 3 1 4/8
56 #define SX1278_HEADER_EXPL_MODE 0b00000000 // 0 0 explicit header mode
57 #define SX1278_HEADER_IMPL_MODE 0b00000001 // 0 0 implicit header mode
58 
59 // SX127X_REG_MODEM_CONFIG_2
60 #define SX1278_RX_CRC_MODE_OFF 0b00000000 // 2 2 CRC disabled
61 #define SX1278_RX_CRC_MODE_ON 0b00000100 // 2 2 CRC enabled
62 
63 // SX1278_REG_MODEM_CONFIG_3
64 #define SX1278_LOW_DATA_RATE_OPT_OFF 0b00000000 // 3 3 low data rate optimization disabled
65 #define SX1278_LOW_DATA_RATE_OPT_ON 0b00001000 // 3 3 low data rate optimization enabled
66 #define SX1278_AGC_AUTO_OFF 0b00000000 // 2 2 LNA gain set by REG_LNA
67 #define SX1278_AGC_AUTO_ON 0b00000100 // 2 2 LNA gain set by internal AGC loop
68 
69 // SX127X_REG_VERSION
70 #define SX1278_CHIP_VERSION 0x12
71 
72 // SX1278 FSK modem settings
73 // SX127X_REG_PA_RAMP
74 #define SX1278_NO_SHAPING 0b00000000 // 6 5 data shaping: no shaping (default)
75 #define SX1278_FSK_GAUSSIAN_1_0 0b00100000 // 6 5 FSK modulation Gaussian filter, BT = 1.0
76 #define SX1278_FSK_GAUSSIAN_0_5 0b01000000 // 6 5 FSK modulation Gaussian filter, BT = 0.5
77 #define SX1278_FSK_GAUSSIAN_0_3 0b01100000 // 6 5 FSK modulation Gaussian filter, BT = 0.3
78 #define SX1278_OOK_FILTER_BR 0b00100000 // 6 5 OOK modulation filter, f_cutoff = BR
79 #define SX1278_OOK_FILTER_2BR 0b01000000 // 6 5 OOK modulation filter, f_cutoff = 2*BR
80 
81 // SX1278_REG_AGC_REF
82 #define SX1278_AGC_REFERENCE_LEVEL_LF 0x19 // 5 0 floor reference for AGC thresholds: AgcRef = -174 + 10*log(2*RxBw) + 8 + AGC_REFERENCE_LEVEL [dBm]: below 525 MHz
83 #define SX1278_AGC_REFERENCE_LEVEL_HF 0x1C // 5 0 above 779 MHz
84 
85 // SX1278_REG_AGC_THRESH_1
86 #define SX1278_AGC_STEP_1_LF 0x0C // 4 0 1st AGC threshold: below 525 MHz
87 #define SX1278_AGC_STEP_1_HF 0x0E // 4 0 above 779 MHz
88 
89 // SX1278_REG_AGC_THRESH_2
90 #define SX1278_AGC_STEP_2_LF 0x40 // 7 4 2nd AGC threshold: below 525 MHz
91 #define SX1278_AGC_STEP_2_HF 0x50 // 7 4 above 779 MHz
92 #define SX1278_AGC_STEP_3 0x0B // 3 0 3rd AGC threshold
93 
94 // SX1278_REG_AGC_THRESH_3
95 #define SX1278_AGC_STEP_4 0xC0 // 7 4 4th AGC threshold
96 #define SX1278_AGC_STEP_5 0x0C // 4 0 5th AGC threshold
97 
104 class SX1278: public SX127x {
105  public:
106 
107  // constructor
108 
114  SX1278(Module* mod);
115 
116  // basic methods
117 
141  int16_t begin(float freq = 434.0, float bw = 125.0, uint8_t sf = 9, uint8_t cr = 7, uint8_t syncWord = SX127X_SYNC_WORD, int8_t power = 10, uint16_t preambleLength = 8, uint8_t gain = 0);
142 
163  int16_t beginFSK(float freq = 434.0, float br = 48.0, float freqDev = 50.0, float rxBw = 125.0, int8_t power = 10, uint16_t preambleLength = 16, bool enableOOK = false);
164 
168  void reset() override;
169 
170  // configuration methods
171 
179  int16_t setFrequency(float freq);
180 
188  int16_t setBandwidth(float bw);
189 
197  int16_t setSpreadingFactor(uint8_t sf);
198 
206  int16_t setCodingRate(uint8_t cr);
207 
215  int16_t setOutputPower(int8_t power);
216 
225  int16_t setGain(uint8_t gain);
226 
235  int16_t setDataShaping(uint8_t sh) override;
236 
246  int16_t setDataShapingOOK(uint8_t sh);
247 
253  float getRSSI();
254 
262  int16_t setCRC(bool enableCRC);
263 
272  int16_t forceLDRO(bool enable);
273 
280  int16_t autoLDRO();
281 
287  int16_t implicitHeader(size_t len);
288 
296  int16_t explicitHeader();
297 
298 #ifndef RADIOLIB_GODMODE
299  protected:
300 #endif
301  int16_t setBandwidthRaw(uint8_t newBandwidth);
302  int16_t setSpreadingFactorRaw(uint8_t newSpreadingFactor);
303  int16_t setCodingRateRaw(uint8_t newCodingRate);
304  int16_t setHeaderType(uint8_t headerType, size_t len = 0xFF);
305 
306  int16_t configFSK();
307 
308 #ifndef RADIOLIB_GODMODE
309  private:
310 #endif
311  bool _ldroAuto = true;
312  bool _ldroEnabled = false;
313 
314 };
315 
316 #endif
317 
318 #endif
SX127x
Base class for SX127x series. All derived classes for SX127x (e.g. SX1278 or SX1272) inherit from thi...
Definition: SX127x.h:536
+
1 #if !defined(_RADIOLIB_SX1278_H)
2 #define _RADIOLIB_SX1278_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SX127X)
7 
8 #include "../../Module.h"
9 #include "SX127x.h"
10 
11 // SX1278 specific register map
12 #define SX1278_REG_MODEM_CONFIG_3 0x26
13 #define SX1278_REG_PLL_HOP 0x44
14 #define SX1278_REG_TCXO 0x4B
15 #define SX1278_REG_PA_DAC 0x4D
16 #define SX1278_REG_FORMER_TEMP 0x5B
17 #define SX1278_REG_REG_BIT_RATE_FRAC 0x5D
18 #define SX1278_REG_AGC_REF 0x61
19 #define SX1278_REG_AGC_THRESH_1 0x62
20 #define SX1278_REG_AGC_THRESH_2 0x63
21 #define SX1278_REG_AGC_THRESH_3 0x64
22 #define SX1278_REG_PLL 0x70
23 
24 // SX1278 LoRa modem settings
25 // SX1278_REG_OP_MODE MSB LSB DESCRIPTION
26 #define SX1278_HIGH_FREQ 0b00000000 // 3 3 access HF test registers
27 #define SX1278_LOW_FREQ 0b00001000 // 3 3 access LF test registers
28 
29 // SX1278_REG_FRF_MSB + REG_FRF_MID + REG_FRF_LSB
30 #define SX1278_FRF_MSB 0x6C // 7 0 carrier frequency setting: f_RF = (F(XOSC) * FRF)/2^19
31 #define SX1278_FRF_MID 0x80 // 7 0 where F(XOSC) = 32 MHz
32 #define SX1278_FRF_LSB 0x00 // 7 0 FRF = 3 byte value of FRF registers
33 
34 // SX1278_REG_PA_CONFIG
35 #define SX1278_MAX_POWER 0b01110000 // 6 4 max power: P_max = 10.8 + 0.6*MAX_POWER [dBm]; P_max(MAX_POWER = 0b111) = 15 dBm
36 #define SX1278_LOW_POWER 0b00100000 // 6 4
37 
38 // SX1278_REG_LNA
39 #define SX1278_LNA_BOOST_LF_OFF 0b00000000 // 4 3 default LNA current
40 
41 // SX127X_REG_MODEM_CONFIG_1
42 #define SX1278_BW_7_80_KHZ 0b00000000 // 7 4 bandwidth: 7.80 kHz
43 #define SX1278_BW_10_40_KHZ 0b00010000 // 7 4 10.40 kHz
44 #define SX1278_BW_15_60_KHZ 0b00100000 // 7 4 15.60 kHz
45 #define SX1278_BW_20_80_KHZ 0b00110000 // 7 4 20.80 kHz
46 #define SX1278_BW_31_25_KHZ 0b01000000 // 7 4 31.25 kHz
47 #define SX1278_BW_41_70_KHZ 0b01010000 // 7 4 41.70 kHz
48 #define SX1278_BW_62_50_KHZ 0b01100000 // 7 4 62.50 kHz
49 #define SX1278_BW_125_00_KHZ 0b01110000 // 7 4 125.00 kHz
50 #define SX1278_BW_250_00_KHZ 0b10000000 // 7 4 250.00 kHz
51 #define SX1278_BW_500_00_KHZ 0b10010000 // 7 4 500.00 kHz
52 #define SX1278_CR_4_5 0b00000010 // 3 1 error coding rate: 4/5
53 #define SX1278_CR_4_6 0b00000100 // 3 1 4/6
54 #define SX1278_CR_4_7 0b00000110 // 3 1 4/7
55 #define SX1278_CR_4_8 0b00001000 // 3 1 4/8
56 #define SX1278_HEADER_EXPL_MODE 0b00000000 // 0 0 explicit header mode
57 #define SX1278_HEADER_IMPL_MODE 0b00000001 // 0 0 implicit header mode
58 
59 // SX127X_REG_MODEM_CONFIG_2
60 #define SX1278_RX_CRC_MODE_OFF 0b00000000 // 2 2 CRC disabled
61 #define SX1278_RX_CRC_MODE_ON 0b00000100 // 2 2 CRC enabled
62 
63 // SX1278_REG_MODEM_CONFIG_3
64 #define SX1278_LOW_DATA_RATE_OPT_OFF 0b00000000 // 3 3 low data rate optimization disabled
65 #define SX1278_LOW_DATA_RATE_OPT_ON 0b00001000 // 3 3 low data rate optimization enabled
66 #define SX1278_AGC_AUTO_OFF 0b00000000 // 2 2 LNA gain set by REG_LNA
67 #define SX1278_AGC_AUTO_ON 0b00000100 // 2 2 LNA gain set by internal AGC loop
68 
69 // SX127X_REG_VERSION
70 #define SX1278_CHIP_VERSION 0x12
71 
72 // SX1278 FSK modem settings
73 // SX127X_REG_PA_RAMP
74 #define SX1278_NO_SHAPING 0b00000000 // 6 5 data shaping: no shaping (default)
75 #define SX1278_FSK_GAUSSIAN_1_0 0b00100000 // 6 5 FSK modulation Gaussian filter, BT = 1.0
76 #define SX1278_FSK_GAUSSIAN_0_5 0b01000000 // 6 5 FSK modulation Gaussian filter, BT = 0.5
77 #define SX1278_FSK_GAUSSIAN_0_3 0b01100000 // 6 5 FSK modulation Gaussian filter, BT = 0.3
78 #define SX1278_OOK_FILTER_BR 0b00100000 // 6 5 OOK modulation filter, f_cutoff = BR
79 #define SX1278_OOK_FILTER_2BR 0b01000000 // 6 5 OOK modulation filter, f_cutoff = 2*BR
80 
81 // SX1278_REG_AGC_REF
82 #define SX1278_AGC_REFERENCE_LEVEL_LF 0x19 // 5 0 floor reference for AGC thresholds: AgcRef = -174 + 10*log(2*RxBw) + 8 + AGC_REFERENCE_LEVEL [dBm]: below 525 MHz
83 #define SX1278_AGC_REFERENCE_LEVEL_HF 0x1C // 5 0 above 779 MHz
84 
85 // SX1278_REG_AGC_THRESH_1
86 #define SX1278_AGC_STEP_1_LF 0x0C // 4 0 1st AGC threshold: below 525 MHz
87 #define SX1278_AGC_STEP_1_HF 0x0E // 4 0 above 779 MHz
88 
89 // SX1278_REG_AGC_THRESH_2
90 #define SX1278_AGC_STEP_2_LF 0x40 // 7 4 2nd AGC threshold: below 525 MHz
91 #define SX1278_AGC_STEP_2_HF 0x50 // 7 4 above 779 MHz
92 #define SX1278_AGC_STEP_3 0x0B // 3 0 3rd AGC threshold
93 
94 // SX1278_REG_AGC_THRESH_3
95 #define SX1278_AGC_STEP_4 0xC0 // 7 4 4th AGC threshold
96 #define SX1278_AGC_STEP_5 0x0C // 4 0 5th AGC threshold
97 
104 class SX1278: public SX127x {
105  public:
106 
107  // constructor
108 
114  SX1278(Module* mod);
115 
116  // basic methods
117 
141  int16_t begin(float freq = 434.0, float bw = 125.0, uint8_t sf = 9, uint8_t cr = 7, uint8_t syncWord = SX127X_SYNC_WORD, int8_t power = 10, uint16_t preambleLength = 8, uint8_t gain = 0);
142 
163  int16_t beginFSK(float freq = 434.0, float br = 48.0, float freqDev = 50.0, float rxBw = 125.0, int8_t power = 10, uint16_t preambleLength = 16, bool enableOOK = false);
164 
168  void reset() override;
169 
170  // configuration methods
171 
179  int16_t setFrequency(float freq);
180 
188  int16_t setBandwidth(float bw);
189 
197  int16_t setSpreadingFactor(uint8_t sf);
198 
206  int16_t setCodingRate(uint8_t cr);
207 
215  int16_t setOutputPower(int8_t power);
216 
225  int16_t setGain(uint8_t gain);
226 
235  int16_t setDataShaping(uint8_t sh) override;
236 
246  int16_t setDataShapingOOK(uint8_t sh);
247 
253  float getRSSI();
254 
262  int16_t setCRC(bool enableCRC);
263 
272  int16_t forceLDRO(bool enable);
273 
280  int16_t autoLDRO();
281 
287  int16_t implicitHeader(size_t len);
288 
296  int16_t explicitHeader();
297 
298 #ifndef RADIOLIB_GODMODE
299  protected:
300 #endif
301  int16_t setBandwidthRaw(uint8_t newBandwidth);
302  int16_t setSpreadingFactorRaw(uint8_t newSpreadingFactor);
303  int16_t setCodingRateRaw(uint8_t newCodingRate);
304  int16_t setHeaderType(uint8_t headerType, size_t len = 0xFF);
305 
306  int16_t configFSK();
307 
308 #ifndef RADIOLIB_GODMODE
309  private:
310 #endif
311  bool _ldroAuto = true;
312  bool _ldroEnabled = false;
313 
314 };
315 
316 #endif
317 
318 #endif
SX127x
Base class for SX127x series. All derived classes for SX127x (e.g. SX1278 or SX1272) inherit from thi...
Definition: SX127x.h:547
SX1278::setDataShaping
int16_t setDataShaping(uint8_t sh) override
Sets Gaussian filter bandwidth-time product that will be used for data shaping. Only available in FSK...
Definition: SX1278.cpp:337
SX1278::getRSSI
float getRSSI()
Gets recorded signal strength indicator of the latest received packet for LoRa modem, or current RSSI level for FSK modem.
Definition: SX1278.cpp:399
SX1278::forceLDRO
int16_t forceLDRO(bool enable)
Forces LoRa low data rate optimization. Only available in LoRa mode. After calling this method...
Definition: SX1278.cpp:454
diff --git a/_s_x127x_8h_source.html b/_s_x127x_8h_source.html index 5427f116..88f6c029 100644 --- a/_s_x127x_8h_source.html +++ b/_s_x127x_8h_source.html @@ -84,8 +84,9 @@ $(document).ready(function(){initNavTree('_s_x127x_8h_source.html','');});
SX127x.h
-
1 #if !defined(_RADIOLIB_SX127X_H)
2 #define _RADIOLIB_SX127X_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SX127X)
7 
8 #include "../../Module.h"
9 
10 #include "../../protocols/PhysicalLayer/PhysicalLayer.h"
11 
12 // SX127x physical layer properties
13 #define SX127X_FREQUENCY_STEP_SIZE 61.03515625
14 #define SX127X_MAX_PACKET_LENGTH 255
15 #define SX127X_MAX_PACKET_LENGTH_FSK 64
16 #define SX127X_CRYSTAL_FREQ 32.0
17 #define SX127X_DIV_EXPONENT 19
18 
19 // SX127x series common LoRa registers
20 #define SX127X_REG_FIFO 0x00
21 #define SX127X_REG_OP_MODE 0x01
22 #define SX127X_REG_FRF_MSB 0x06
23 #define SX127X_REG_FRF_MID 0x07
24 #define SX127X_REG_FRF_LSB 0x08
25 #define SX127X_REG_PA_CONFIG 0x09
26 #define SX127X_REG_PA_RAMP 0x0A
27 #define SX127X_REG_OCP 0x0B
28 #define SX127X_REG_LNA 0x0C
29 #define SX127X_REG_FIFO_ADDR_PTR 0x0D
30 #define SX127X_REG_FIFO_TX_BASE_ADDR 0x0E
31 #define SX127X_REG_FIFO_RX_BASE_ADDR 0x0F
32 #define SX127X_REG_FIFO_RX_CURRENT_ADDR 0x10
33 #define SX127X_REG_IRQ_FLAGS_MASK 0x11
34 #define SX127X_REG_IRQ_FLAGS 0x12
35 #define SX127X_REG_RX_NB_BYTES 0x13
36 #define SX127X_REG_RX_HEADER_CNT_VALUE_MSB 0x14
37 #define SX127X_REG_RX_HEADER_CNT_VALUE_LSB 0x15
38 #define SX127X_REG_RX_PACKET_CNT_VALUE_MSB 0x16
39 #define SX127X_REG_RX_PACKET_CNT_VALUE_LSB 0x17
40 #define SX127X_REG_MODEM_STAT 0x18
41 #define SX127X_REG_PKT_SNR_VALUE 0x19
42 #define SX127X_REG_PKT_RSSI_VALUE 0x1A
43 #define SX127X_REG_RSSI_VALUE 0x1B
44 #define SX127X_REG_HOP_CHANNEL 0x1C
45 #define SX127X_REG_MODEM_CONFIG_1 0x1D
46 #define SX127X_REG_MODEM_CONFIG_2 0x1E
47 #define SX127X_REG_SYMB_TIMEOUT_LSB 0x1F
48 #define SX127X_REG_PREAMBLE_MSB 0x20
49 #define SX127X_REG_PREAMBLE_LSB 0x21
50 #define SX127X_REG_PAYLOAD_LENGTH 0x22
51 #define SX127X_REG_MAX_PAYLOAD_LENGTH 0x23
52 #define SX127X_REG_HOP_PERIOD 0x24
53 #define SX127X_REG_FIFO_RX_BYTE_ADDR 0x25
54 #define SX127X_REG_FEI_MSB 0x28
55 #define SX127X_REG_FEI_MID 0x29
56 #define SX127X_REG_FEI_LSB 0x2A
57 #define SX127X_REG_RSSI_WIDEBAND 0x2C
58 #define SX127X_REG_DETECT_OPTIMIZE 0x31
59 #define SX127X_REG_INVERT_IQ 0x33
60 #define SX127X_REG_DETECTION_THRESHOLD 0x37
61 #define SX127X_REG_SYNC_WORD 0x39
62 #define SX127X_REG_DIO_MAPPING_1 0x40
63 #define SX127X_REG_DIO_MAPPING_2 0x41
64 #define SX127X_REG_VERSION 0x42
65 
66 // SX127x common LoRa modem settings
67 // SX127X_REG_OP_MODE MSB LSB DESCRIPTION
68 #define SX127X_FSK_OOK 0b00000000 // 7 7 FSK/OOK mode
69 #define SX127X_LORA 0b10000000 // 7 7 LoRa mode
70 #define SX127X_ACCESS_SHARED_REG_OFF 0b00000000 // 6 6 access LoRa registers (0x0D:0x3F) in LoRa mode
71 #define SX127X_ACCESS_SHARED_REG_ON 0b01000000 // 6 6 access FSK registers (0x0D:0x3F) in LoRa mode
72 #define SX127X_SLEEP 0b00000000 // 2 0 sleep
73 #define SX127X_STANDBY 0b00000001 // 2 0 standby
74 #define SX127X_FSTX 0b00000010 // 2 0 frequency synthesis TX
75 #define SX127X_TX 0b00000011 // 2 0 transmit
76 #define SX127X_FSRX 0b00000100 // 2 0 frequency synthesis RX
77 #define SX127X_RXCONTINUOUS 0b00000101 // 2 0 receive continuous
78 #define SX127X_RXSINGLE 0b00000110 // 2 0 receive single
79 #define SX127X_CAD 0b00000111 // 2 0 channel activity detection
80 
81 // SX127X_REG_PA_CONFIG
82 #define SX127X_PA_SELECT_RFO 0b00000000 // 7 7 RFO pin output, power limited to +14 dBm
83 #define SX127X_PA_SELECT_BOOST 0b10000000 // 7 7 PA_BOOST pin output, power limited to +20 dBm
84 #define SX127X_OUTPUT_POWER 0b00001111 // 3 0 output power: P_out = 2 + OUTPUT_POWER [dBm] for PA_SELECT_BOOST
85  // P_out = -1 + OUTPUT_POWER [dBm] for PA_SELECT_RFO
86 
87 // SX127X_REG_OCP
88 #define SX127X_OCP_OFF 0b00000000 // 5 5 PA overload current protection disabled
89 #define SX127X_OCP_ON 0b00100000 // 5 5 PA overload current protection enabled
90 #define SX127X_OCP_TRIM 0b00001011 // 4 0 OCP current: I_max(OCP_TRIM = 0b1011) = 100 mA
91 
92 // SX127X_REG_LNA
93 #define SX127X_LNA_GAIN_1 0b00100000 // 7 5 LNA gain setting: max gain
94 #define SX127X_LNA_GAIN_2 0b01000000 // 7 5 .
95 #define SX127X_LNA_GAIN_3 0b01100000 // 7 5 .
96 #define SX127X_LNA_GAIN_4 0b10000000 // 7 5 .
97 #define SX127X_LNA_GAIN_5 0b10100000 // 7 5 .
98 #define SX127X_LNA_GAIN_6 0b11000000 // 7 5 min gain
99 #define SX127X_LNA_BOOST_OFF 0b00000000 // 1 0 default LNA current
100 #define SX127X_LNA_BOOST_ON 0b00000011 // 1 0 150% LNA current
101 
102 // SX127X_REG_MODEM_CONFIG_2
103 #define SX127X_SF_6 0b01100000 // 7 4 spreading factor: 64 chips/bit
104 #define SX127X_SF_7 0b01110000 // 7 4 128 chips/bit
105 #define SX127X_SF_8 0b10000000 // 7 4 256 chips/bit
106 #define SX127X_SF_9 0b10010000 // 7 4 512 chips/bit
107 #define SX127X_SF_10 0b10100000 // 7 4 1024 chips/bit
108 #define SX127X_SF_11 0b10110000 // 7 4 2048 chips/bit
109 #define SX127X_SF_12 0b11000000 // 7 4 4096 chips/bit
110 #define SX127X_TX_MODE_SINGLE 0b00000000 // 3 3 single TX
111 #define SX127X_TX_MODE_CONT 0b00001000 // 3 3 continuous TX
112 #define SX127X_RX_TIMEOUT_MSB 0b00000000 // 1 0
113 
114 // SX127X_REG_SYMB_TIMEOUT_LSB
115 #define SX127X_RX_TIMEOUT_LSB 0b01100100 // 7 0 10 bit RX operation timeout
116 
117 // SX127X_REG_PREAMBLE_MSB + REG_PREAMBLE_LSB
118 #define SX127X_PREAMBLE_LENGTH_MSB 0b00000000 // 7 0 2 byte preamble length setting: l_P = PREAMBLE_LENGTH + 4.25
119 #define SX127X_PREAMBLE_LENGTH_LSB 0b00001000 // 7 0 where l_p = preamble length
120 
121 // SX127X_REG_DETECT_OPTIMIZE
122 #define SX127X_DETECT_OPTIMIZE_SF_6 0b00000101 // 2 0 SF6 detection optimization
123 #define SX127X_DETECT_OPTIMIZE_SF_7_12 0b00000011 // 2 0 SF7 to SF12 detection optimization
124 
125 // SX127X_REG_DETECTION_THRESHOLD
126 #define SX127X_DETECTION_THRESHOLD_SF_6 0b00001100 // 7 0 SF6 detection threshold
127 #define SX127X_DETECTION_THRESHOLD_SF_7_12 0b00001010 // 7 0 SF7 to SF12 detection threshold
128 
129 // SX127X_REG_PA_DAC
130 #define SX127X_PA_BOOST_OFF 0b00000100 // 2 0 PA_BOOST disabled
131 #define SX127X_PA_BOOST_ON 0b00000111 // 2 0 +20 dBm on PA_BOOST when OUTPUT_POWER = 0b1111
132 
133 // SX127X_REG_HOP_PERIOD
134 #define SX127X_HOP_PERIOD_OFF 0b00000000 // 7 0 number of periods between frequency hops; 0 = disabled
135 #define SX127X_HOP_PERIOD_MAX 0b11111111 // 7 0
136 
137 // SX127X_REG_DIO_MAPPING_1
138 #define SX127X_DIO0_RX_DONE 0b00000000 // 7 6
139 #define SX127X_DIO0_TX_DONE 0b01000000 // 7 6
140 #define SX127X_DIO0_CAD_DONE 0b10000000 // 7 6
141 #define SX127X_DIO1_RX_TIMEOUT 0b00000000 // 5 4
142 #define SX127X_DIO1_FHSS_CHANGE_CHANNEL 0b00010000 // 5 4
143 #define SX127X_DIO1_CAD_DETECTED 0b00100000 // 5 4
144 
145 // SX127X_REG_IRQ_FLAGS
146 #define SX127X_CLEAR_IRQ_FLAG_RX_TIMEOUT 0b10000000 // 7 7 timeout
147 #define SX127X_CLEAR_IRQ_FLAG_RX_DONE 0b01000000 // 6 6 packet reception complete
148 #define SX127X_CLEAR_IRQ_FLAG_PAYLOAD_CRC_ERROR 0b00100000 // 5 5 payload CRC error
149 #define SX127X_CLEAR_IRQ_FLAG_VALID_HEADER 0b00010000 // 4 4 valid header received
150 #define SX127X_CLEAR_IRQ_FLAG_TX_DONE 0b00001000 // 3 3 payload transmission complete
151 #define SX127X_CLEAR_IRQ_FLAG_CAD_DONE 0b00000100 // 2 2 CAD complete
152 #define SX127X_CLEAR_IRQ_FLAG_FHSS_CHANGE_CHANNEL 0b00000010 // 1 1 FHSS change channel
153 #define SX127X_CLEAR_IRQ_FLAG_CAD_DETECTED 0b00000001 // 0 0 valid LoRa signal detected during CAD operation
154 
155 // SX127X_REG_IRQ_FLAGS_MASK
156 #define SX127X_MASK_IRQ_FLAG_RX_TIMEOUT 0b01111111 // 7 7 timeout
157 #define SX127X_MASK_IRQ_FLAG_RX_DONE 0b10111111 // 6 6 packet reception complete
158 #define SX127X_MASK_IRQ_FLAG_PAYLOAD_CRC_ERROR 0b11011111 // 5 5 payload CRC error
159 #define SX127X_MASK_IRQ_FLAG_VALID_HEADER 0b11101111 // 4 4 valid header received
160 #define SX127X_MASK_IRQ_FLAG_TX_DONE 0b11110111 // 3 3 payload transmission complete
161 #define SX127X_MASK_IRQ_FLAG_CAD_DONE 0b11111011 // 2 2 CAD complete
162 #define SX127X_MASK_IRQ_FLAG_FHSS_CHANGE_CHANNEL 0b11111101 // 1 1 FHSS change channel
163 #define SX127X_MASK_IRQ_FLAG_CAD_DETECTED 0b11111110 // 0 0 valid LoRa signal detected during CAD operation
164 
165 // SX127X_REG_FIFO_TX_BASE_ADDR
166 #define SX127X_FIFO_TX_BASE_ADDR_MAX 0b00000000 // 7 0 allocate the entire FIFO buffer for TX only
167 
168 // SX127X_REG_FIFO_RX_BASE_ADDR
169 #define SX127X_FIFO_RX_BASE_ADDR_MAX 0b00000000 // 7 0 allocate the entire FIFO buffer for RX only
170 
171 // SX127X_REG_SYNC_WORD
172 #define SX127X_SYNC_WORD 0x12 // 7 0 default LoRa sync word
173 #define SX127X_SYNC_WORD_LORAWAN 0x34 // 7 0 sync word reserved for LoRaWAN networks
174 
175 // SX127x series common FSK registers
176 // NOTE: FSK register names that are conflicting with LoRa registers are marked with "_FSK" suffix
177 #define SX127X_REG_BITRATE_MSB 0x02
178 #define SX127X_REG_BITRATE_LSB 0x03
179 #define SX127X_REG_FDEV_MSB 0x04
180 #define SX127X_REG_FDEV_LSB 0x05
181 #define SX127X_REG_RX_CONFIG 0x0D
182 #define SX127X_REG_RSSI_CONFIG 0x0E
183 #define SX127X_REG_RSSI_COLLISION 0x0F
184 #define SX127X_REG_RSSI_THRESH 0x10
185 #define SX127X_REG_RSSI_VALUE_FSK 0x11
186 #define SX127X_REG_RX_BW 0x12
187 #define SX127X_REG_AFC_BW 0x13
188 #define SX127X_REG_OOK_PEAK 0x14
189 #define SX127X_REG_OOK_FIX 0x15
190 #define SX127X_REG_OOK_AVG 0x16
191 #define SX127X_REG_AFC_FEI 0x1A
192 #define SX127X_REG_AFC_MSB 0x1B
193 #define SX127X_REG_AFC_LSB 0x1C
194 #define SX127X_REG_FEI_MSB_FSK 0x1D
195 #define SX127X_REG_FEI_LSB_FSK 0x1E
196 #define SX127X_REG_PREAMBLE_DETECT 0x1F
197 #define SX127X_REG_RX_TIMEOUT_1 0x20
198 #define SX127X_REG_RX_TIMEOUT_2 0x21
199 #define SX127X_REG_RX_TIMEOUT_3 0x22
200 #define SX127X_REG_RX_DELAY 0x23
201 #define SX127X_REG_OSC 0x24
202 #define SX127X_REG_PREAMBLE_MSB_FSK 0x25
203 #define SX127X_REG_PREAMBLE_LSB_FSK 0x26
204 #define SX127X_REG_SYNC_CONFIG 0x27
205 #define SX127X_REG_SYNC_VALUE_1 0x28
206 #define SX127X_REG_SYNC_VALUE_2 0x29
207 #define SX127X_REG_SYNC_VALUE_3 0x2A
208 #define SX127X_REG_SYNC_VALUE_4 0x2B
209 #define SX127X_REG_SYNC_VALUE_5 0x2C
210 #define SX127X_REG_SYNC_VALUE_6 0x2D
211 #define SX127X_REG_SYNC_VALUE_7 0x2E
212 #define SX127X_REG_SYNC_VALUE_8 0x2F
213 #define SX127X_REG_PACKET_CONFIG_1 0x30
214 #define SX127X_REG_PACKET_CONFIG_2 0x31
215 #define SX127X_REG_PAYLOAD_LENGTH_FSK 0x32
216 #define SX127X_REG_NODE_ADRS 0x33
217 #define SX127X_REG_BROADCAST_ADRS 0x34
218 #define SX127X_REG_FIFO_THRESH 0x35
219 #define SX127X_REG_SEQ_CONFIG_1 0x36
220 #define SX127X_REG_SEQ_CONFIG_2 0x37
221 #define SX127X_REG_TIMER_RESOL 0x38
222 #define SX127X_REG_TIMER1_COEF 0x39
223 #define SX127X_REG_TIMER2_COEF 0x3A
224 #define SX127X_REG_IMAGE_CAL 0x3B
225 #define SX127X_REG_TEMP 0x3C
226 #define SX127X_REG_LOW_BAT 0x3D
227 #define SX127X_REG_IRQ_FLAGS_1 0x3E
228 #define SX127X_REG_IRQ_FLAGS_2 0x3F
229 
230 // SX127x common FSK modem settings
231 // SX127X_REG_OP_MODE
232 #define SX127X_MODULATION_FSK 0b00000000 // 6 5 FSK modulation scheme
233 #define SX127X_MODULATION_OOK 0b00100000 // 6 5 OOK modulation scheme
234 #define SX127X_RX 0b00000101 // 2 0 receiver mode
235 
236 // SX127X_REG_BITRATE_MSB + SX127X_REG_BITRATE_LSB
237 #define SX127X_BITRATE_MSB 0x1A // 7 0 bit rate setting: BitRate = F(XOSC)/(BITRATE + BITRATE_FRAC/16)
238 #define SX127X_BITRATE_LSB 0x0B // 7 0 default value: 4.8 kbps
239 
240 // SX127X_REG_FDEV_MSB + SX127X_REG_FDEV_LSB
241 #define SX127X_FDEV_MSB 0x00 // 5 0 frequency deviation: Fdev = Fstep * FDEV
242 #define SX127X_FDEV_LSB 0x52 // 7 0 default value: 5 kHz
243 
244 // SX127X_REG_RX_CONFIG
245 #define SX127X_RESTART_RX_ON_COLLISION_OFF 0b00000000 // 7 7 automatic receiver restart disabled (default)
246 #define SX127X_RESTART_RX_ON_COLLISION_ON 0b10000000 // 7 7 automatically restart receiver if it gets saturated or on packet collision
247 #define SX127X_RESTART_RX_WITHOUT_PLL_LOCK 0b01000000 // 6 6 manually restart receiver without frequency change
248 #define SX127X_RESTART_RX_WITH_PLL_LOCK 0b00100000 // 5 5 manually restart receiver with frequency change
249 #define SX127X_AFC_AUTO_OFF 0b00000000 // 4 4 no AFC performed (default)
250 #define SX127X_AFC_AUTO_ON 0b00010000 // 4 4 AFC performed at each receiver startup
251 #define SX127X_AGC_AUTO_OFF 0b00000000 // 3 3 LNA gain set manually by register
252 #define SX127X_AGC_AUTO_ON 0b00001000 // 3 3 LNA gain controlled by AGC
253 #define SX127X_RX_TRIGGER_NONE 0b00000000 // 2 0 receiver startup at: none
254 #define SX127X_RX_TRIGGER_RSSI_INTERRUPT 0b00000001 // 2 0 RSSI interrupt
255 #define SX127X_RX_TRIGGER_PREAMBLE_DETECT 0b00000110 // 2 0 preamble detected
256 #define SX127X_RX_TRIGGER_BOTH 0b00000111 // 2 0 RSSI interrupt and preamble detected
257 
258 // SX127X_REG_RSSI_CONFIG
259 #define SX127X_RSSI_SMOOTHING_SAMPLES_2 0b00000000 // 2 0 number of samples for RSSI average: 2
260 #define SX127X_RSSI_SMOOTHING_SAMPLES_4 0b00000001 // 2 0 4
261 #define SX127X_RSSI_SMOOTHING_SAMPLES_8 0b00000010 // 2 0 8 (default)
262 #define SX127X_RSSI_SMOOTHING_SAMPLES_16 0b00000011 // 2 0 16
263 #define SX127X_RSSI_SMOOTHING_SAMPLES_32 0b00000100 // 2 0 32
264 #define SX127X_RSSI_SMOOTHING_SAMPLES_64 0b00000101 // 2 0 64
265 #define SX127X_RSSI_SMOOTHING_SAMPLES_128 0b00000110 // 2 0 128
266 #define SX127X_RSSI_SMOOTHING_SAMPLES_256 0b00000111 // 2 0 256
267 
268 // SX127X_REG_RSSI_COLLISION
269 #define SX127X_RSSI_COLLISION_THRESHOLD 0x0A // 7 0 RSSI threshold in dB that will be considered a collision, default value: 10 dB
270 
271 // SX127X_REG_RSSI_THRESH
272 #define SX127X_RSSI_THRESHOLD 0xFF // 7 0 RSSI threshold that will trigger RSSI interrupt, RssiThreshold = RSSI_THRESHOLD / 2 [dBm]
273 
274 // SX127X_REG_RX_BW
275 #define SX127X_RX_BW_MANT_16 0b00000000 // 4 3 channel filter bandwidth: RxBw = F(XOSC) / (RxBwMant * 2^(RxBwExp + 2)) [kHz]
276 #define SX127X_RX_BW_MANT_20 0b00001000 // 4 3
277 #define SX127X_RX_BW_MANT_24 0b00010000 // 4 3 default RxBwMant parameter
278 #define SX127X_RX_BW_EXP 0b00000101 // 2 0 default RxBwExp parameter
279 
280 // SX127X_REG_AFC_BW
281 #define SX127X_RX_BW_MANT_AFC 0b00001000 // 4 3 default RxBwMant parameter used during AFC
282 #define SX127X_RX_BW_EXP_AFC 0b00000011 // 2 0 default RxBwExp parameter used during AFC
283 
284 // SX127X_REG_OOK_PEAK
285 #define SX127X_BIT_SYNC_OFF 0b00000000 // 5 5 bit synchronizer disabled (not allowed in packet mode)
286 #define SX127X_BIT_SYNC_ON 0b00100000 // 5 5 bit synchronizer enabled (default)
287 #define SX127X_OOK_THRESH_FIXED 0b00000000 // 4 3 OOK threshold type: fixed value
288 #define SX127X_OOK_THRESH_PEAK 0b00001000 // 4 3 peak mode (default)
289 #define SX127X_OOK_THRESH_AVERAGE 0b00010000 // 4 3 average mode
290 #define SX127X_OOK_PEAK_THRESH_STEP_0_5_DB 0b00000000 // 2 0 OOK demodulator step size: 0.5 dB (default)
291 #define SX127X_OOK_PEAK_THRESH_STEP_1_0_DB 0b00000001 // 2 0 1.0 dB
292 #define SX127X_OOK_PEAK_THRESH_STEP_1_5_DB 0b00000010 // 2 0 1.5 dB
293 #define SX127X_OOK_PEAK_THRESH_STEP_2_0_DB 0b00000011 // 2 0 2.0 dB
294 #define SX127X_OOK_PEAK_THRESH_STEP_3_0_DB 0b00000100 // 2 0 3.0 dB
295 #define SX127X_OOK_PEAK_THRESH_STEP_4_0_DB 0b00000101 // 2 0 4.0 dB
296 #define SX127X_OOK_PEAK_THRESH_STEP_5_0_DB 0b00000110 // 2 0 5.0 dB
297 #define SX127X_OOK_PEAK_THRESH_STEP_6_0_DB 0b00000111 // 2 0 6.0 dB
298 
299 // SX127X_REG_OOK_FIX
300 #define SX127X_OOK_FIXED_THRESHOLD 0x0C // 7 0 default fixed threshold for OOK data slicer
301 
302 // SX127X_REG_OOK_AVG
303 #define SX127X_OOK_PEAK_THRESH_DEC_1_1_CHIP 0b00000000 // 7 5 OOK demodulator step period: once per chip (default)
304 #define SX127X_OOK_PEAK_THRESH_DEC_1_2_CHIP 0b00100000 // 7 5 once every 2 chips
305 #define SX127X_OOK_PEAK_THRESH_DEC_1_4_CHIP 0b01000000 // 7 5 once every 4 chips
306 #define SX127X_OOK_PEAK_THRESH_DEC_1_8_CHIP 0b01100000 // 7 5 once every 8 chips
307 #define SX127X_OOK_PEAK_THRESH_DEC_2_1_CHIP 0b10000000 // 7 5 2 times per chip
308 #define SX127X_OOK_PEAK_THRESH_DEC_4_1_CHIP 0b10100000 // 7 5 4 times per chip
309 #define SX127X_OOK_PEAK_THRESH_DEC_8_1_CHIP 0b11000000 // 7 5 8 times per chip
310 #define SX127X_OOK_PEAK_THRESH_DEC_16_1_CHIP 0b11100000 // 7 5 16 times per chip
311 #define SX127X_OOK_AVERAGE_OFFSET_0_DB 0b00000000 // 3 2 OOK average threshold offset: 0.0 dB (default)
312 #define SX127X_OOK_AVERAGE_OFFSET_2_DB 0b00000100 // 3 2 2.0 dB
313 #define SX127X_OOK_AVERAGE_OFFSET_4_DB 0b00001000 // 3 2 4.0 dB
314 #define SX127X_OOK_AVERAGE_OFFSET_6_DB 0b00001100 // 3 2 6.0 dB
315 #define SX127X_OOK_AVG_THRESH_FILT_32_PI 0b00000000 // 1 0 OOK average filter coefficient: chip rate / 32*pi
316 #define SX127X_OOK_AVG_THRESH_FILT_8_PI 0b00000001 // 1 0 chip rate / 8*pi
317 #define SX127X_OOK_AVG_THRESH_FILT_4_PI 0b00000010 // 1 0 chip rate / 4*pi (default)
318 #define SX127X_OOK_AVG_THRESH_FILT_2_PI 0b00000011 // 1 0 chip rate / 2*pi
319 
320 // SX127X_REG_AFC_FEI
321 #define SX127X_AGC_START 0b00010000 // 4 4 manually start AGC sequence
322 #define SX127X_AFC_CLEAR 0b00000010 // 1 1 manually clear AFC register
323 #define SX127X_AFC_AUTO_CLEAR_OFF 0b00000000 // 0 0 AFC register will not be cleared at the start of AFC (default)
324 #define SX127X_AFC_AUTO_CLEAR_ON 0b00000001 // 0 0 AFC register will be cleared at the start of AFC
325 
326 // SX127X_REG_PREAMBLE_DETECT
327 #define SX127X_PREAMBLE_DETECTOR_OFF 0b00000000 // 7 7 preamble detection disabled
328 #define SX127X_PREAMBLE_DETECTOR_ON 0b10000000 // 7 7 preamble detection enabled (default)
329 #define SX127X_PREAMBLE_DETECTOR_1_BYTE 0b00000000 // 6 5 preamble detection size: 1 byte (default)
330 #define SX127X_PREAMBLE_DETECTOR_2_BYTE 0b00100000 // 6 5 2 bytes
331 #define SX127X_PREAMBLE_DETECTOR_3_BYTE 0b01000000 // 6 5 3 bytes
332 #define SX127X_PREAMBLE_DETECTOR_TOL 0x0A // 4 0 default number of tolerated errors per chip (4 chips per bit)
333 
334 // SX127X_REG_RX_TIMEOUT_1
335 #define SX127X_TIMEOUT_RX_RSSI_OFF 0x00 // 7 0 disable receiver timeout when RSSI interrupt doesn't occur (default)
336 
337 // SX127X_REG_RX_TIMEOUT_2
338 #define SX127X_TIMEOUT_RX_PREAMBLE_OFF 0x00 // 7 0 disable receiver timeout when preamble interrupt doesn't occur (default)
339 
340 // SX127X_REG_RX_TIMEOUT_3
341 #define SX127X_TIMEOUT_SIGNAL_SYNC_OFF 0x00 // 7 0 disable receiver timeout when sync address interrupt doesn't occur (default)
342 
343 // SX127X_REG_OSC
344 #define SX127X_RC_CAL_START 0b00000000 // 3 3 manually start RC oscillator calibration
345 #define SX127X_CLK_OUT_FXOSC 0b00000000 // 2 0 ClkOut frequency: F(XOSC)
346 #define SX127X_CLK_OUT_FXOSC_2 0b00000001 // 2 0 F(XOSC) / 2
347 #define SX127X_CLK_OUT_FXOSC_4 0b00000010 // 2 0 F(XOSC) / 4
348 #define SX127X_CLK_OUT_FXOSC_8 0b00000011 // 2 0 F(XOSC) / 8
349 #define SX127X_CLK_OUT_FXOSC_16 0b00000100 // 2 0 F(XOSC) / 16
350 #define SX127X_CLK_OUT_FXOSC_32 0b00000101 // 2 0 F(XOSC) / 32
351 #define SX127X_CLK_OUT_RC 0b00000110 // 2 0 RC
352 #define SX127X_CLK_OUT_OFF 0b00000111 // 2 0 disabled (default)
353 
354 // SX127X_REG_PREAMBLE_MSB_FSK + SX127X_REG_PREAMBLE_LSB_FSK
355 #define SX127X_PREAMBLE_SIZE_MSB 0x00 // 7 0 preamble size in bytes
356 #define SX127X_PREAMBLE_SIZE_LSB 0x03 // 7 0 default value: 3 bytes
357 
358 // SX127X_REG_SYNC_CONFIG
359 #define SX127X_AUTO_RESTART_RX_MODE_OFF 0b00000000 // 7 6 Rx mode restart after packet reception: disabled
360 #define SX127X_AUTO_RESTART_RX_MODE_NO_PLL 0b01000000 // 7 6 enabled, don't wait for PLL lock
361 #define SX127X_AUTO_RESTART_RX_MODE_PLL 0b10000000 // 7 6 enabled, wait for PLL lock (default)
362 #define SX127X_PREAMBLE_POLARITY_AA 0b00000000 // 5 5 preamble polarity: 0xAA = 0b10101010 (default)
363 #define SX127X_PREAMBLE_POLARITY_55 0b00100000 // 5 5 0x55 = 0b01010101
364 #define SX127X_SYNC_OFF 0b00000000 // 4 4 sync word disabled
365 #define SX127X_SYNC_ON 0b00010000 // 4 4 sync word enabled (default)
366 #define SX127X_SYNC_SIZE 0x03 // 2 0 sync word size in bytes, SyncSize = SYNC_SIZE + 1 bytes
367 
368 // SX127X_REG_SYNC_VALUE_1 - SX127X_REG_SYNC_VALUE_8
369 #define SX127X_SYNC_VALUE_1 0x01 // 7 0 sync word: 1st byte (MSB)
370 #define SX127X_SYNC_VALUE_2 0x01 // 7 0 2nd byte
371 #define SX127X_SYNC_VALUE_3 0x01 // 7 0 3rd byte
372 #define SX127X_SYNC_VALUE_4 0x01 // 7 0 4th byte
373 #define SX127X_SYNC_VALUE_5 0x01 // 7 0 5th byte
374 #define SX127X_SYNC_VALUE_6 0x01 // 7 0 6th byte
375 #define SX127X_SYNC_VALUE_7 0x01 // 7 0 7th byte
376 #define SX127X_SYNC_VALUE_8 0x01 // 7 0 8th byte (LSB)
377 
378 // SX127X_REG_PACKET_CONFIG_1
379 #define SX127X_PACKET_FIXED 0b00000000 // 7 7 packet format: fixed length
380 #define SX127X_PACKET_VARIABLE 0b10000000 // 7 7 variable length (default)
381 #define SX127X_DC_FREE_NONE 0b00000000 // 6 5 DC-free encoding: disabled (default)
382 #define SX127X_DC_FREE_MANCHESTER 0b00100000 // 6 5 Manchester
383 #define SX127X_DC_FREE_WHITENING 0b01000000 // 6 5 Whitening
384 #define SX127X_CRC_OFF 0b00000000 // 4 4 CRC disabled
385 #define SX127X_CRC_ON 0b00010000 // 4 4 CRC enabled (default)
386 #define SX127X_CRC_AUTOCLEAR_OFF 0b00001000 // 3 3 keep FIFO on CRC mismatch, issue payload ready interrupt
387 #define SX127X_CRC_AUTOCLEAR_ON 0b00000000 // 3 3 clear FIFO on CRC mismatch, do not issue payload ready interrupt
388 #define SX127X_ADDRESS_FILTERING_OFF 0b00000000 // 2 1 address filtering: none (default)
389 #define SX127X_ADDRESS_FILTERING_NODE 0b00000010 // 2 1 node
390 #define SX127X_ADDRESS_FILTERING_NODE_BROADCAST 0b00000100 // 2 1 node or broadcast
391 #define SX127X_CRC_WHITENING_TYPE_CCITT 0b00000000 // 0 0 CRC and whitening algorithms: CCITT CRC with standard whitening (default)
392 #define SX127X_CRC_WHITENING_TYPE_IBM 0b00000001 // 0 0 IBM CRC with alternate whitening
393 
394 // SX127X_REG_PACKET_CONFIG_2
395 #define SX127X_DATA_MODE_PACKET 0b01000000 // 6 6 data mode: packet (default)
396 #define SX127X_DATA_MODE_CONTINUOUS 0b00000000 // 6 6 continuous
397 #define SX127X_IO_HOME_OFF 0b00000000 // 5 5 io-homecontrol compatibility disabled (default)
398 #define SX127X_IO_HOME_ON 0b00100000 // 5 5 io-homecontrol compatibility enabled
399 
400 // SX127X_REG_FIFO_THRESH
401 #define SX127X_TX_START_FIFO_LEVEL 0b00000000 // 7 7 start packet transmission when: number of bytes in FIFO exceeds FIFO_THRESHOLD
402 #define SX127X_TX_START_FIFO_NOT_EMPTY 0b10000000 // 7 7 at least one byte in FIFO (default)
403 #define SX127X_FIFO_THRESH 0x0F // 5 0 FIFO level threshold
404 
405 // SX127X_REG_SEQ_CONFIG_1
406 #define SX127X_SEQUENCER_START 0b10000000 // 7 7 manually start sequencer
407 #define SX127X_SEQUENCER_STOP 0b01000000 // 6 6 manually stop sequencer
408 #define SX127X_IDLE_MODE_STANDBY 0b00000000 // 5 5 chip mode during sequencer idle mode: standby (default)
409 #define SX127X_IDLE_MODE_SLEEP 0b00100000 // 5 5 sleep
410 #define SX127X_FROM_START_LP_SELECTION 0b00000000 // 4 3 mode that will be set after starting sequencer: low power selection (default)
411 #define SX127X_FROM_START_RECEIVE 0b00001000 // 4 3 receive
412 #define SX127X_FROM_START_TRANSMIT 0b00010000 // 4 3 transmit
413 #define SX127X_FROM_START_TRANSMIT_FIFO_LEVEL 0b00011000 // 4 3 transmit on a FIFO level interrupt
414 #define SX127X_LP_SELECTION_SEQ_OFF 0b00000000 // 2 2 mode that will be set after exiting low power selection: sequencer off (default)
415 #define SX127X_LP_SELECTION_IDLE 0b00000100 // 2 2 idle state
416 #define SX127X_FROM_IDLE_TRANSMIT 0b00000000 // 1 1 mode that will be set after exiting idle mode: transmit (default)
417 #define SX127X_FROM_IDLE_RECEIVE 0b00000010 // 1 1 receive
418 #define SX127X_FROM_TRANSMIT_LP_SELECTION 0b00000000 // 0 0 mode that will be set after exiting transmit mode: low power selection (default)
419 #define SX127X_FROM_TRANSMIT_RECEIVE 0b00000001 // 0 0 receive
420 
421 // SX127X_REG_SEQ_CONFIG_2
422 #define SX127X_FROM_RECEIVE_PACKET_RECEIVED_PAYLOAD 0b00100000 // 7 5 mode that will be set after exiting receive mode: packet received on payload ready interrupt (default)
423 #define SX127X_FROM_RECEIVE_LP_SELECTION 0b01000000 // 7 5 low power selection
424 #define SX127X_FROM_RECEIVE_PACKET_RECEIVED_CRC_OK 0b01100000 // 7 5 packet received on CRC OK interrupt
425 #define SX127X_FROM_RECEIVE_SEQ_OFF_RSSI 0b10000000 // 7 5 sequencer off on RSSI interrupt
426 #define SX127X_FROM_RECEIVE_SEQ_OFF_SYNC_ADDR 0b10100000 // 7 5 sequencer off on sync address interrupt
427 #define SX127X_FROM_RECEIVE_SEQ_OFF_PREAMBLE_DETECT 0b11000000 // 7 5 sequencer off on preamble detect interrupt
428 #define SX127X_FROM_RX_TIMEOUT_RECEIVE 0b00000000 // 4 3 mode that will be set after Rx timeout: receive (default)
429 #define SX127X_FROM_RX_TIMEOUT_TRANSMIT 0b00001000 // 4 3 transmit
430 #define SX127X_FROM_RX_TIMEOUT_LP_SELECTION 0b00010000 // 4 3 low power selection
431 #define SX127X_FROM_RX_TIMEOUT_SEQ_OFF 0b00011000 // 4 3 sequencer off
432 #define SX127X_FROM_PACKET_RECEIVED_SEQ_OFF 0b00000000 // 2 0 mode that will be set after packet received: sequencer off (default)
433 #define SX127X_FROM_PACKET_RECEIVED_TRANSMIT 0b00000001 // 2 0 transmit
434 #define SX127X_FROM_PACKET_RECEIVED_LP_SELECTION 0b00000010 // 2 0 low power selection
435 #define SX127X_FROM_PACKET_RECEIVED_RECEIVE_FS 0b00000011 // 2 0 receive via FS
436 #define SX127X_FROM_PACKET_RECEIVED_RECEIVE 0b00000100 // 2 0 receive
437 
438 // SX127X_REG_TIMER_RESOL
439 #define SX127X_TIMER1_OFF 0b00000000 // 3 2 timer 1 resolution: disabled (default)
440 #define SX127X_TIMER1_RESOLUTION_64_US 0b00000100 // 3 2 64 us
441 #define SX127X_TIMER1_RESOLUTION_4_1_MS 0b00001000 // 3 2 4.1 ms
442 #define SX127X_TIMER1_RESOLUTION_262_MS 0b00001100 // 3 2 262 ms
443 #define SX127X_TIMER2_OFF 0b00000000 // 3 2 timer 2 resolution: disabled (default)
444 #define SX127X_TIMER2_RESOLUTION_64_US 0b00000001 // 3 2 64 us
445 #define SX127X_TIMER2_RESOLUTION_4_1_MS 0b00000010 // 3 2 4.1 ms
446 #define SX127X_TIMER2_RESOLUTION_262_MS 0b00000011 // 3 2 262 ms
447 
448 // SX127X_REG_TIMER1_COEF
449 #define SX127X_TIMER1_COEFFICIENT 0xF5 // 7 0 multiplication coefficient for timer 1
450 
451 // SX127X_REG_TIMER2_COEF
452 #define SX127X_TIMER2_COEFFICIENT 0x20 // 7 0 multiplication coefficient for timer 2
453 
454 // SX127X_REG_IMAGE_CAL
455 #define SX127X_AUTO_IMAGE_CAL_OFF 0b00000000 // 7 7 temperature calibration disabled (default)
456 #define SX127X_AUTO_IMAGE_CAL_ON 0b10000000 // 7 7 temperature calibration enabled
457 #define SX127X_IMAGE_CAL_START 0b01000000 // 6 6 start temperature calibration
458 #define SX127X_IMAGE_CAL_RUNNING 0b00100000 // 5 5 temperature calibration is on-going
459 #define SX127X_IMAGE_CAL_COMPLETE 0b00000000 // 5 5 temperature calibration finished
460 #define SX127X_TEMP_CHANGED 0b00001000 // 3 3 temperature changed more than TEMP_THRESHOLD since last calibration
461 #define SX127X_TEMP_THRESHOLD_5_DEG_C 0b00000000 // 2 1 temperature change threshold: 5 deg. C
462 #define SX127X_TEMP_THRESHOLD_10_DEG_C 0b00000010 // 2 1 10 deg. C (default)
463 #define SX127X_TEMP_THRESHOLD_15_DEG_C 0b00000100 // 2 1 15 deg. C
464 #define SX127X_TEMP_THRESHOLD_20_DEG_C 0b00000110 // 2 1 20 deg. C
465 #define SX127X_TEMP_MONITOR_ON 0b00000000 // 0 0 temperature monitoring enabled (default)
466 #define SX127X_TEMP_MONITOR_OFF 0b00000001 // 0 0 temperature monitoring disabled
467 
468 // SX127X_REG_LOW_BAT
469 #define SX127X_LOW_BAT_OFF 0b00000000 // 3 3 low battery detector disabled
470 #define SX127X_LOW_BAT_ON 0b00001000 // 3 3 low battery detector enabled
471 #define SX127X_LOW_BAT_TRIM_1_695_V 0b00000000 // 2 0 battery voltage threshold: 1.695 V
472 #define SX127X_LOW_BAT_TRIM_1_764_V 0b00000001 // 2 0 1.764 V
473 #define SX127X_LOW_BAT_TRIM_1_835_V 0b00000010 // 2 0 1.835 V (default)
474 #define SX127X_LOW_BAT_TRIM_1_905_V 0b00000011 // 2 0 1.905 V
475 #define SX127X_LOW_BAT_TRIM_1_976_V 0b00000100 // 2 0 1.976 V
476 #define SX127X_LOW_BAT_TRIM_2_045_V 0b00000101 // 2 0 2.045 V
477 #define SX127X_LOW_BAT_TRIM_2_116_V 0b00000110 // 2 0 2.116 V
478 #define SX127X_LOW_BAT_TRIM_2_185_V 0b00000111 // 2 0 2.185 V
479 
480 // SX127X_REG_IRQ_FLAGS_1
481 #define SX127X_FLAG_MODE_READY 0b10000000 // 7 7 requested mode is ready
482 #define SX127X_FLAG_RX_READY 0b01000000 // 6 6 reception ready (after RSSI, AGC, AFC)
483 #define SX127X_FLAG_TX_READY 0b00100000 // 5 5 transmission ready (after PA ramp-up)
484 #define SX127X_FLAG_PLL_LOCK 0b00010000 // 4 4 PLL locked
485 #define SX127X_FLAG_RSSI 0b00001000 // 3 3 RSSI value exceeds RSSI threshold
486 #define SX127X_FLAG_TIMEOUT 0b00000100 // 2 2 timeout occurred
487 #define SX127X_FLAG_PREAMBLE_DETECT 0b00000010 // 1 1 valid preamble was detected
488 #define SX127X_FLAG_SYNC_ADDRESS_MATCH 0b00000001 // 0 0 sync address matched
489 
490 // SX127X_REG_IRQ_FLAGS_2
491 #define SX127X_FLAG_FIFO_FULL 0b10000000 // 7 7 FIFO is full
492 #define SX127X_FLAG_FIFO_EMPTY 0b01000000 // 6 6 FIFO is empty
493 #define SX127X_FLAG_FIFO_LEVEL 0b00100000 // 5 5 number of bytes in FIFO exceeds FIFO_THRESHOLD
494 #define SX127X_FLAG_FIFO_OVERRUN 0b00010000 // 4 4 FIFO overrun occurred
495 #define SX127X_FLAG_PACKET_SENT 0b00001000 // 3 3 packet was successfully sent
496 #define SX127X_FLAG_PAYLOAD_READY 0b00000100 // 2 2 packet was successfully received
497 #define SX127X_FLAG_CRC_OK 0b00000010 // 1 1 CRC check passed
498 #define SX127X_FLAG_LOW_BAT 0b00000001 // 0 0 battery voltage dropped below threshold
499 
500 // SX127X_REG_DIO_MAPPING_1
501 #define SX127X_DIO0_CONT_SYNC_ADDRESS 0b00000000 // 7 6
502 #define SX127X_DIO0_CONT_TX_READY 0b00000000 // 7 6
503 #define SX127X_DIO0_CONT_RSSI_PREAMBLE_DETECTED 0b01000000 // 7 6
504 #define SX127X_DIO0_CONT_RX_READY 0b10000000 // 7 6
505 #define SX127X_DIO0_PACK_PAYLOAD_READY 0b00000000 // 7 6
506 #define SX127X_DIO0_PACK_PACKET_SENT 0b00000000 // 7 6
507 #define SX127X_DIO0_PACK_CRC_OK 0b01000000 // 7 6
508 #define SX127X_DIO0_PACK_TEMP_CHANGE_LOW_BAT 0b11000000 // 7 6
509 #define SX127X_DIO1_CONT_DCLK 0b00000000 // 5 4
510 #define SX127X_DIO1_CONT_RSSI_PREAMBLE_DETECTED 0b00010000 // 5 4
511 #define SX127X_DIO1_PACK_FIFO_LEVEL 0b00000000 // 5 4
512 #define SX127X_DIO1_PACK_FIFO_EMPTY 0b00010000 // 5 4
513 #define SX127X_DIO1_PACK_FIFO_FULL 0b00100000 // 5 4
514 #define SX127X_DIO2_CONT_DATA 0b00000000 // 3 2
515 
516 // SX1272_REG_PLL_HOP + SX1278_REG_PLL_HOP
517 #define SX127X_FAST_HOP_OFF 0b00000000 // 7 7 carrier frequency validated when FRF registers are written
518 #define SX127X_FAST_HOP_ON 0b10000000 // 7 7 carrier frequency validated when FS modes are requested
519 
520 // SX1272_REG_TCXO + SX1278_REG_TCXO
521 #define SX127X_TCXO_INPUT_EXTERNAL 0b00000000 // 4 4 use external crystal oscillator
522 #define SX127X_TCXO_INPUT_EXTERNAL_CLIPPED 0b00010000 // 4 4 use external crystal oscillator clipped sine connected to XTA pin
523 
524 // SX1272_REG_PLL + SX1278_REG_PLL
525 #define SX127X_PLL_BANDWIDTH_75_KHZ 0b00000000 // 7 6 PLL bandwidth: 75 kHz
526 #define SX127X_PLL_BANDWIDTH_150_KHZ 0b01000000 // 7 6 150 kHz
527 #define SX127X_PLL_BANDWIDTH_225_KHZ 0b10000000 // 7 6 225 kHz
528 #define SX127X_PLL_BANDWIDTH_300_KHZ 0b11000000 // 7 6 300 kHz (default)
529 
536 class SX127x: public PhysicalLayer {
537  public:
538  // introduce PhysicalLayer overloads
539  using PhysicalLayer::transmit;
540  using PhysicalLayer::receive;
541  using PhysicalLayer::startTransmit;
542  using PhysicalLayer::readData;
543 
544  // constructor
545 
551  SX127x(Module* mod);
552 
553  // basic methods
554 
566  int16_t begin(uint8_t chipVersion, uint8_t syncWord, uint16_t preambleLength);
567 
571  virtual void reset() = 0;
572 
590  int16_t beginFSK(uint8_t chipVersion, float br, float freqDev, float rxBw, uint16_t preambleLength, bool enableOOK);
591 
604  int16_t transmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
605 
616  int16_t receive(uint8_t* data, size_t len) override;
617 
623  int16_t scanChannel();
624 
631  int16_t sleep();
632 
638  int16_t standby() override;
639 
648  int16_t transmitDirect(uint32_t frf = 0) override;
649 
656  int16_t receiveDirect() override;
657 
663  int16_t packetMode();
664 
665  // interrupt methods
666 
672  void setDio0Action(void (*func)(void));
673 
677  void clearDio0Action();
678 
684  void setDio1Action(void (*func)(void));
685 
689  void clearDio1Action();
690 
702  int16_t startTransmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
703 
713  int16_t startReceive(uint8_t len = 0, uint8_t mode = SX127X_RXCONTINUOUS);
714 
724  int16_t readData(uint8_t* data, size_t len) override;
725 
726 
727  // configuration methods
728 
736  int16_t setSyncWord(uint8_t syncWord);
737 
745  int16_t setCurrentLimit(uint8_t currentLimit);
746 
754  int16_t setPreambleLength(uint16_t preambleLength);
755 
763  float getFrequencyError(bool autoCorrect = false);
764 
770  float getSNR();
771 
777  float getDataRate() const;
778 
786  int16_t setBitRate(float br);
787 
795  int16_t setFrequencyDeviation(float freqDev) override;
796 
804  int16_t setRxBandwidth(float rxBw);
805 
815  int16_t setSyncWord(uint8_t* syncWord, size_t len);
816 
824  int16_t setNodeAddress(uint8_t nodeAddr);
825 
833  int16_t setBroadcastAddress(uint8_t broadAddr);
834 
840  int16_t disableAddressFiltering();
841 
849  int16_t setOOK(bool enableOOK);
850 
858  size_t getPacketLength(bool update = true) override;
859 
867  int16_t fixedPacketLengthMode(uint8_t len = SX127X_MAX_PACKET_LENGTH_FSK);
868 
876  int16_t variablePacketLengthMode(uint8_t maxLen = SX127X_MAX_PACKET_LENGTH_FSK);
877 
888  int16_t setRSSIConfig(uint8_t smoothingSamples, int8_t offset = 0);
889 
898  int16_t setEncoding(uint8_t encoding) override;
899 
907  uint16_t getIRQFlags();
908 
914  uint8_t getModemStatus();
915 
922  int8_t getTempRaw();
923 
932  void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn);
933 
939  uint8_t random();
940 
946  int16_t getChipVersion();
947 
948 #ifndef RADIOLIB_GODMODE
949  protected:
950 #endif
951  Module* _mod;
952 
953  float _freq = 0;
954  float _bw = 0;
955  uint8_t _sf = 0;
956  uint8_t _cr = 0;
957  float _br = 0;
958  float _rxBw = 0;
959  bool _ook = false;
960  bool _crcEnabled = false;
961  size_t _packetLength = 0;
962 
963  int16_t setFrequencyRaw(float newFreq);
964  int16_t config();
965  int16_t configFSK();
966  int16_t getActiveModem();
967  int16_t directMode();
968  int16_t setPacketMode(uint8_t mode, uint8_t len);
969 
970 #ifndef RADIOLIB_GODMODE
971  private:
972 #endif
973  float _dataRate = 0;
974  bool _packetLengthQueried = false; // FSK packet length is the first byte in FIFO, length can only be queried once
975  uint8_t _packetLengthConfig = SX127X_PACKET_VARIABLE;
976 
977  bool findChip(uint8_t ver);
978  int16_t setMode(uint8_t mode);
979  int16_t setActiveModem(uint8_t modem);
980  void clearIRQFlags();
981  void clearFIFO(size_t count); // used mostly to clear remaining bytes in FIFO after a packet read
982 };
983 
984 #endif
985 
986 #endif
SX127x::setRSSIConfig
int16_t setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)
Sets RSSI measurement configuration in FSK mode.
Definition: SX127x.cpp:909
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SX127x
Base class for SX127x series. All derived classes for SX127x (e.g. SX1278 or SX1272) inherit from thi...
Definition: SX127x.h:536
+
1 #if !defined(_RADIOLIB_SX127X_H)
2 #define _RADIOLIB_SX127X_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SX127X)
7 
8 #include "../../Module.h"
9 
10 #include "../../protocols/PhysicalLayer/PhysicalLayer.h"
11 
12 // SX127x physical layer properties
13 #define SX127X_FREQUENCY_STEP_SIZE 61.03515625
14 #define SX127X_MAX_PACKET_LENGTH 255
15 #define SX127X_MAX_PACKET_LENGTH_FSK 64
16 #define SX127X_CRYSTAL_FREQ 32.0
17 #define SX127X_DIV_EXPONENT 19
18 
19 // SX127x series common LoRa registers
20 #define SX127X_REG_FIFO 0x00
21 #define SX127X_REG_OP_MODE 0x01
22 #define SX127X_REG_FRF_MSB 0x06
23 #define SX127X_REG_FRF_MID 0x07
24 #define SX127X_REG_FRF_LSB 0x08
25 #define SX127X_REG_PA_CONFIG 0x09
26 #define SX127X_REG_PA_RAMP 0x0A
27 #define SX127X_REG_OCP 0x0B
28 #define SX127X_REG_LNA 0x0C
29 #define SX127X_REG_FIFO_ADDR_PTR 0x0D
30 #define SX127X_REG_FIFO_TX_BASE_ADDR 0x0E
31 #define SX127X_REG_FIFO_RX_BASE_ADDR 0x0F
32 #define SX127X_REG_FIFO_RX_CURRENT_ADDR 0x10
33 #define SX127X_REG_IRQ_FLAGS_MASK 0x11
34 #define SX127X_REG_IRQ_FLAGS 0x12
35 #define SX127X_REG_RX_NB_BYTES 0x13
36 #define SX127X_REG_RX_HEADER_CNT_VALUE_MSB 0x14
37 #define SX127X_REG_RX_HEADER_CNT_VALUE_LSB 0x15
38 #define SX127X_REG_RX_PACKET_CNT_VALUE_MSB 0x16
39 #define SX127X_REG_RX_PACKET_CNT_VALUE_LSB 0x17
40 #define SX127X_REG_MODEM_STAT 0x18
41 #define SX127X_REG_PKT_SNR_VALUE 0x19
42 #define SX127X_REG_PKT_RSSI_VALUE 0x1A
43 #define SX127X_REG_RSSI_VALUE 0x1B
44 #define SX127X_REG_HOP_CHANNEL 0x1C
45 #define SX127X_REG_MODEM_CONFIG_1 0x1D
46 #define SX127X_REG_MODEM_CONFIG_2 0x1E
47 #define SX127X_REG_SYMB_TIMEOUT_LSB 0x1F
48 #define SX127X_REG_PREAMBLE_MSB 0x20
49 #define SX127X_REG_PREAMBLE_LSB 0x21
50 #define SX127X_REG_PAYLOAD_LENGTH 0x22
51 #define SX127X_REG_MAX_PAYLOAD_LENGTH 0x23
52 #define SX127X_REG_HOP_PERIOD 0x24
53 #define SX127X_REG_FIFO_RX_BYTE_ADDR 0x25
54 #define SX127X_REG_FEI_MSB 0x28
55 #define SX127X_REG_FEI_MID 0x29
56 #define SX127X_REG_FEI_LSB 0x2A
57 #define SX127X_REG_RSSI_WIDEBAND 0x2C
58 #define SX127X_REG_DETECT_OPTIMIZE 0x31
59 #define SX127X_REG_INVERT_IQ 0x33
60 #define SX127X_REG_DETECTION_THRESHOLD 0x37
61 #define SX127X_REG_SYNC_WORD 0x39
62 #define SX127X_REG_INVERT_IQ2 0x3B
63 #define SX127X_REG_DIO_MAPPING_1 0x40
64 #define SX127X_REG_DIO_MAPPING_2 0x41
65 #define SX127X_REG_VERSION 0x42
66 
67 // SX127x common LoRa modem settings
68 // SX127X_REG_OP_MODE MSB LSB DESCRIPTION
69 #define SX127X_FSK_OOK 0b00000000 // 7 7 FSK/OOK mode
70 #define SX127X_LORA 0b10000000 // 7 7 LoRa mode
71 #define SX127X_ACCESS_SHARED_REG_OFF 0b00000000 // 6 6 access LoRa registers (0x0D:0x3F) in LoRa mode
72 #define SX127X_ACCESS_SHARED_REG_ON 0b01000000 // 6 6 access FSK registers (0x0D:0x3F) in LoRa mode
73 #define SX127X_SLEEP 0b00000000 // 2 0 sleep
74 #define SX127X_STANDBY 0b00000001 // 2 0 standby
75 #define SX127X_FSTX 0b00000010 // 2 0 frequency synthesis TX
76 #define SX127X_TX 0b00000011 // 2 0 transmit
77 #define SX127X_FSRX 0b00000100 // 2 0 frequency synthesis RX
78 #define SX127X_RXCONTINUOUS 0b00000101 // 2 0 receive continuous
79 #define SX127X_RXSINGLE 0b00000110 // 2 0 receive single
80 #define SX127X_CAD 0b00000111 // 2 0 channel activity detection
81 
82 // SX127X_REG_PA_CONFIG
83 #define SX127X_PA_SELECT_RFO 0b00000000 // 7 7 RFO pin output, power limited to +14 dBm
84 #define SX127X_PA_SELECT_BOOST 0b10000000 // 7 7 PA_BOOST pin output, power limited to +20 dBm
85 #define SX127X_OUTPUT_POWER 0b00001111 // 3 0 output power: P_out = 2 + OUTPUT_POWER [dBm] for PA_SELECT_BOOST
86  // P_out = -1 + OUTPUT_POWER [dBm] for PA_SELECT_RFO
87 
88 // SX127X_REG_OCP
89 #define SX127X_OCP_OFF 0b00000000 // 5 5 PA overload current protection disabled
90 #define SX127X_OCP_ON 0b00100000 // 5 5 PA overload current protection enabled
91 #define SX127X_OCP_TRIM 0b00001011 // 4 0 OCP current: I_max(OCP_TRIM = 0b1011) = 100 mA
92 
93 // SX127X_REG_LNA
94 #define SX127X_LNA_GAIN_1 0b00100000 // 7 5 LNA gain setting: max gain
95 #define SX127X_LNA_GAIN_2 0b01000000 // 7 5 .
96 #define SX127X_LNA_GAIN_3 0b01100000 // 7 5 .
97 #define SX127X_LNA_GAIN_4 0b10000000 // 7 5 .
98 #define SX127X_LNA_GAIN_5 0b10100000 // 7 5 .
99 #define SX127X_LNA_GAIN_6 0b11000000 // 7 5 min gain
100 #define SX127X_LNA_BOOST_OFF 0b00000000 // 1 0 default LNA current
101 #define SX127X_LNA_BOOST_ON 0b00000011 // 1 0 150% LNA current
102 
103 // SX127X_REG_MODEM_CONFIG_2
104 #define SX127X_SF_6 0b01100000 // 7 4 spreading factor: 64 chips/bit
105 #define SX127X_SF_7 0b01110000 // 7 4 128 chips/bit
106 #define SX127X_SF_8 0b10000000 // 7 4 256 chips/bit
107 #define SX127X_SF_9 0b10010000 // 7 4 512 chips/bit
108 #define SX127X_SF_10 0b10100000 // 7 4 1024 chips/bit
109 #define SX127X_SF_11 0b10110000 // 7 4 2048 chips/bit
110 #define SX127X_SF_12 0b11000000 // 7 4 4096 chips/bit
111 #define SX127X_TX_MODE_SINGLE 0b00000000 // 3 3 single TX
112 #define SX127X_TX_MODE_CONT 0b00001000 // 3 3 continuous TX
113 #define SX127X_RX_TIMEOUT_MSB 0b00000000 // 1 0
114 
115 // SX127X_REG_SYMB_TIMEOUT_LSB
116 #define SX127X_RX_TIMEOUT_LSB 0b01100100 // 7 0 10 bit RX operation timeout
117 
118 // SX127X_REG_PREAMBLE_MSB + REG_PREAMBLE_LSB
119 #define SX127X_PREAMBLE_LENGTH_MSB 0b00000000 // 7 0 2 byte preamble length setting: l_P = PREAMBLE_LENGTH + 4.25
120 #define SX127X_PREAMBLE_LENGTH_LSB 0b00001000 // 7 0 where l_p = preamble length
121 
122 // SX127X_REG_DETECT_OPTIMIZE
123 #define SX127X_DETECT_OPTIMIZE_SF_6 0b00000101 // 2 0 SF6 detection optimization
124 #define SX127X_DETECT_OPTIMIZE_SF_7_12 0b00000011 // 2 0 SF7 to SF12 detection optimization
125 
126 // SX127X_REG_INVERT_IQ
127 #define SX127X_INVERT_IQ_RXPATH_ON 0b01000000 // 6 6 I and Q signals are inverted
128 #define SX127X_INVERT_IQ_RXPATH_OFF 0b00000000 // 6 6 normal mode
129 #define SX127X_INVERT_IQ_TXPATH_ON 0b00000001 // 0 0 I and Q signals are inverted
130 #define SX127X_INVERT_IQ_TXPATH_OFF 0b00000000 // 0 0 normal mode
131 
132 // SX127X_REG_DETECTION_THRESHOLD
133 #define SX127X_DETECTION_THRESHOLD_SF_6 0b00001100 // 7 0 SF6 detection threshold
134 #define SX127X_DETECTION_THRESHOLD_SF_7_12 0b00001010 // 7 0 SF7 to SF12 detection threshold
135 
136 // SX127X_REG_PA_DAC
137 #define SX127X_PA_BOOST_OFF 0b00000100 // 2 0 PA_BOOST disabled
138 #define SX127X_PA_BOOST_ON 0b00000111 // 2 0 +20 dBm on PA_BOOST when OUTPUT_POWER = 0b1111
139 
140 // SX127X_REG_HOP_PERIOD
141 #define SX127X_HOP_PERIOD_OFF 0b00000000 // 7 0 number of periods between frequency hops; 0 = disabled
142 #define SX127X_HOP_PERIOD_MAX 0b11111111 // 7 0
143 
144 // SX127X_REG_DIO_MAPPING_1
145 #define SX127X_DIO0_RX_DONE 0b00000000 // 7 6
146 #define SX127X_DIO0_TX_DONE 0b01000000 // 7 6
147 #define SX127X_DIO0_CAD_DONE 0b10000000 // 7 6
148 #define SX127X_DIO1_RX_TIMEOUT 0b00000000 // 5 4
149 #define SX127X_DIO1_FHSS_CHANGE_CHANNEL 0b00010000 // 5 4
150 #define SX127X_DIO1_CAD_DETECTED 0b00100000 // 5 4
151 
152 // SX127X_REG_IRQ_FLAGS
153 #define SX127X_CLEAR_IRQ_FLAG_RX_TIMEOUT 0b10000000 // 7 7 timeout
154 #define SX127X_CLEAR_IRQ_FLAG_RX_DONE 0b01000000 // 6 6 packet reception complete
155 #define SX127X_CLEAR_IRQ_FLAG_PAYLOAD_CRC_ERROR 0b00100000 // 5 5 payload CRC error
156 #define SX127X_CLEAR_IRQ_FLAG_VALID_HEADER 0b00010000 // 4 4 valid header received
157 #define SX127X_CLEAR_IRQ_FLAG_TX_DONE 0b00001000 // 3 3 payload transmission complete
158 #define SX127X_CLEAR_IRQ_FLAG_CAD_DONE 0b00000100 // 2 2 CAD complete
159 #define SX127X_CLEAR_IRQ_FLAG_FHSS_CHANGE_CHANNEL 0b00000010 // 1 1 FHSS change channel
160 #define SX127X_CLEAR_IRQ_FLAG_CAD_DETECTED 0b00000001 // 0 0 valid LoRa signal detected during CAD operation
161 
162 // SX127X_REG_IRQ_FLAGS_MASK
163 #define SX127X_MASK_IRQ_FLAG_RX_TIMEOUT 0b01111111 // 7 7 timeout
164 #define SX127X_MASK_IRQ_FLAG_RX_DONE 0b10111111 // 6 6 packet reception complete
165 #define SX127X_MASK_IRQ_FLAG_PAYLOAD_CRC_ERROR 0b11011111 // 5 5 payload CRC error
166 #define SX127X_MASK_IRQ_FLAG_VALID_HEADER 0b11101111 // 4 4 valid header received
167 #define SX127X_MASK_IRQ_FLAG_TX_DONE 0b11110111 // 3 3 payload transmission complete
168 #define SX127X_MASK_IRQ_FLAG_CAD_DONE 0b11111011 // 2 2 CAD complete
169 #define SX127X_MASK_IRQ_FLAG_FHSS_CHANGE_CHANNEL 0b11111101 // 1 1 FHSS change channel
170 #define SX127X_MASK_IRQ_FLAG_CAD_DETECTED 0b11111110 // 0 0 valid LoRa signal detected during CAD operation
171 
172 // SX127X_REG_FIFO_TX_BASE_ADDR
173 #define SX127X_FIFO_TX_BASE_ADDR_MAX 0b00000000 // 7 0 allocate the entire FIFO buffer for TX only
174 
175 // SX127X_REG_FIFO_RX_BASE_ADDR
176 #define SX127X_FIFO_RX_BASE_ADDR_MAX 0b00000000 // 7 0 allocate the entire FIFO buffer for RX only
177 
178 // SX127X_REG_SYNC_WORD
179 #define SX127X_SYNC_WORD 0x12 // 7 0 default LoRa sync word
180 #define SX127X_SYNC_WORD_LORAWAN 0x34 // 7 0 sync word reserved for LoRaWAN networks
181 
182 // SX127X_REG_INVERT_IQ2
183 #define SX127X_IQ2_ENABLE 0x19 // 7 0 enable optimize for inverted IQ
184 #define SX127X_IQ2_DISABLE 0x1D // 7 0 reset optimize for inverted IQ
185 
186 // SX127x series common FSK registers
187 // NOTE: FSK register names that are conflicting with LoRa registers are marked with "_FSK" suffix
188 #define SX127X_REG_BITRATE_MSB 0x02
189 #define SX127X_REG_BITRATE_LSB 0x03
190 #define SX127X_REG_FDEV_MSB 0x04
191 #define SX127X_REG_FDEV_LSB 0x05
192 #define SX127X_REG_RX_CONFIG 0x0D
193 #define SX127X_REG_RSSI_CONFIG 0x0E
194 #define SX127X_REG_RSSI_COLLISION 0x0F
195 #define SX127X_REG_RSSI_THRESH 0x10
196 #define SX127X_REG_RSSI_VALUE_FSK 0x11
197 #define SX127X_REG_RX_BW 0x12
198 #define SX127X_REG_AFC_BW 0x13
199 #define SX127X_REG_OOK_PEAK 0x14
200 #define SX127X_REG_OOK_FIX 0x15
201 #define SX127X_REG_OOK_AVG 0x16
202 #define SX127X_REG_AFC_FEI 0x1A
203 #define SX127X_REG_AFC_MSB 0x1B
204 #define SX127X_REG_AFC_LSB 0x1C
205 #define SX127X_REG_FEI_MSB_FSK 0x1D
206 #define SX127X_REG_FEI_LSB_FSK 0x1E
207 #define SX127X_REG_PREAMBLE_DETECT 0x1F
208 #define SX127X_REG_RX_TIMEOUT_1 0x20
209 #define SX127X_REG_RX_TIMEOUT_2 0x21
210 #define SX127X_REG_RX_TIMEOUT_3 0x22
211 #define SX127X_REG_RX_DELAY 0x23
212 #define SX127X_REG_OSC 0x24
213 #define SX127X_REG_PREAMBLE_MSB_FSK 0x25
214 #define SX127X_REG_PREAMBLE_LSB_FSK 0x26
215 #define SX127X_REG_SYNC_CONFIG 0x27
216 #define SX127X_REG_SYNC_VALUE_1 0x28
217 #define SX127X_REG_SYNC_VALUE_2 0x29
218 #define SX127X_REG_SYNC_VALUE_3 0x2A
219 #define SX127X_REG_SYNC_VALUE_4 0x2B
220 #define SX127X_REG_SYNC_VALUE_5 0x2C
221 #define SX127X_REG_SYNC_VALUE_6 0x2D
222 #define SX127X_REG_SYNC_VALUE_7 0x2E
223 #define SX127X_REG_SYNC_VALUE_8 0x2F
224 #define SX127X_REG_PACKET_CONFIG_1 0x30
225 #define SX127X_REG_PACKET_CONFIG_2 0x31
226 #define SX127X_REG_PAYLOAD_LENGTH_FSK 0x32
227 #define SX127X_REG_NODE_ADRS 0x33
228 #define SX127X_REG_BROADCAST_ADRS 0x34
229 #define SX127X_REG_FIFO_THRESH 0x35
230 #define SX127X_REG_SEQ_CONFIG_1 0x36
231 #define SX127X_REG_SEQ_CONFIG_2 0x37
232 #define SX127X_REG_TIMER_RESOL 0x38
233 #define SX127X_REG_TIMER1_COEF 0x39
234 #define SX127X_REG_TIMER2_COEF 0x3A
235 #define SX127X_REG_IMAGE_CAL 0x3B
236 #define SX127X_REG_TEMP 0x3C
237 #define SX127X_REG_LOW_BAT 0x3D
238 #define SX127X_REG_IRQ_FLAGS_1 0x3E
239 #define SX127X_REG_IRQ_FLAGS_2 0x3F
240 
241 // SX127x common FSK modem settings
242 // SX127X_REG_OP_MODE
243 #define SX127X_MODULATION_FSK 0b00000000 // 6 5 FSK modulation scheme
244 #define SX127X_MODULATION_OOK 0b00100000 // 6 5 OOK modulation scheme
245 #define SX127X_RX 0b00000101 // 2 0 receiver mode
246 
247 // SX127X_REG_BITRATE_MSB + SX127X_REG_BITRATE_LSB
248 #define SX127X_BITRATE_MSB 0x1A // 7 0 bit rate setting: BitRate = F(XOSC)/(BITRATE + BITRATE_FRAC/16)
249 #define SX127X_BITRATE_LSB 0x0B // 7 0 default value: 4.8 kbps
250 
251 // SX127X_REG_FDEV_MSB + SX127X_REG_FDEV_LSB
252 #define SX127X_FDEV_MSB 0x00 // 5 0 frequency deviation: Fdev = Fstep * FDEV
253 #define SX127X_FDEV_LSB 0x52 // 7 0 default value: 5 kHz
254 
255 // SX127X_REG_RX_CONFIG
256 #define SX127X_RESTART_RX_ON_COLLISION_OFF 0b00000000 // 7 7 automatic receiver restart disabled (default)
257 #define SX127X_RESTART_RX_ON_COLLISION_ON 0b10000000 // 7 7 automatically restart receiver if it gets saturated or on packet collision
258 #define SX127X_RESTART_RX_WITHOUT_PLL_LOCK 0b01000000 // 6 6 manually restart receiver without frequency change
259 #define SX127X_RESTART_RX_WITH_PLL_LOCK 0b00100000 // 5 5 manually restart receiver with frequency change
260 #define SX127X_AFC_AUTO_OFF 0b00000000 // 4 4 no AFC performed (default)
261 #define SX127X_AFC_AUTO_ON 0b00010000 // 4 4 AFC performed at each receiver startup
262 #define SX127X_AGC_AUTO_OFF 0b00000000 // 3 3 LNA gain set manually by register
263 #define SX127X_AGC_AUTO_ON 0b00001000 // 3 3 LNA gain controlled by AGC
264 #define SX127X_RX_TRIGGER_NONE 0b00000000 // 2 0 receiver startup at: none
265 #define SX127X_RX_TRIGGER_RSSI_INTERRUPT 0b00000001 // 2 0 RSSI interrupt
266 #define SX127X_RX_TRIGGER_PREAMBLE_DETECT 0b00000110 // 2 0 preamble detected
267 #define SX127X_RX_TRIGGER_BOTH 0b00000111 // 2 0 RSSI interrupt and preamble detected
268 
269 // SX127X_REG_RSSI_CONFIG
270 #define SX127X_RSSI_SMOOTHING_SAMPLES_2 0b00000000 // 2 0 number of samples for RSSI average: 2
271 #define SX127X_RSSI_SMOOTHING_SAMPLES_4 0b00000001 // 2 0 4
272 #define SX127X_RSSI_SMOOTHING_SAMPLES_8 0b00000010 // 2 0 8 (default)
273 #define SX127X_RSSI_SMOOTHING_SAMPLES_16 0b00000011 // 2 0 16
274 #define SX127X_RSSI_SMOOTHING_SAMPLES_32 0b00000100 // 2 0 32
275 #define SX127X_RSSI_SMOOTHING_SAMPLES_64 0b00000101 // 2 0 64
276 #define SX127X_RSSI_SMOOTHING_SAMPLES_128 0b00000110 // 2 0 128
277 #define SX127X_RSSI_SMOOTHING_SAMPLES_256 0b00000111 // 2 0 256
278 
279 // SX127X_REG_RSSI_COLLISION
280 #define SX127X_RSSI_COLLISION_THRESHOLD 0x0A // 7 0 RSSI threshold in dB that will be considered a collision, default value: 10 dB
281 
282 // SX127X_REG_RSSI_THRESH
283 #define SX127X_RSSI_THRESHOLD 0xFF // 7 0 RSSI threshold that will trigger RSSI interrupt, RssiThreshold = RSSI_THRESHOLD / 2 [dBm]
284 
285 // SX127X_REG_RX_BW
286 #define SX127X_RX_BW_MANT_16 0b00000000 // 4 3 channel filter bandwidth: RxBw = F(XOSC) / (RxBwMant * 2^(RxBwExp + 2)) [kHz]
287 #define SX127X_RX_BW_MANT_20 0b00001000 // 4 3
288 #define SX127X_RX_BW_MANT_24 0b00010000 // 4 3 default RxBwMant parameter
289 #define SX127X_RX_BW_EXP 0b00000101 // 2 0 default RxBwExp parameter
290 
291 // SX127X_REG_AFC_BW
292 #define SX127X_RX_BW_MANT_AFC 0b00001000 // 4 3 default RxBwMant parameter used during AFC
293 #define SX127X_RX_BW_EXP_AFC 0b00000011 // 2 0 default RxBwExp parameter used during AFC
294 
295 // SX127X_REG_OOK_PEAK
296 #define SX127X_BIT_SYNC_OFF 0b00000000 // 5 5 bit synchronizer disabled (not allowed in packet mode)
297 #define SX127X_BIT_SYNC_ON 0b00100000 // 5 5 bit synchronizer enabled (default)
298 #define SX127X_OOK_THRESH_FIXED 0b00000000 // 4 3 OOK threshold type: fixed value
299 #define SX127X_OOK_THRESH_PEAK 0b00001000 // 4 3 peak mode (default)
300 #define SX127X_OOK_THRESH_AVERAGE 0b00010000 // 4 3 average mode
301 #define SX127X_OOK_PEAK_THRESH_STEP_0_5_DB 0b00000000 // 2 0 OOK demodulator step size: 0.5 dB (default)
302 #define SX127X_OOK_PEAK_THRESH_STEP_1_0_DB 0b00000001 // 2 0 1.0 dB
303 #define SX127X_OOK_PEAK_THRESH_STEP_1_5_DB 0b00000010 // 2 0 1.5 dB
304 #define SX127X_OOK_PEAK_THRESH_STEP_2_0_DB 0b00000011 // 2 0 2.0 dB
305 #define SX127X_OOK_PEAK_THRESH_STEP_3_0_DB 0b00000100 // 2 0 3.0 dB
306 #define SX127X_OOK_PEAK_THRESH_STEP_4_0_DB 0b00000101 // 2 0 4.0 dB
307 #define SX127X_OOK_PEAK_THRESH_STEP_5_0_DB 0b00000110 // 2 0 5.0 dB
308 #define SX127X_OOK_PEAK_THRESH_STEP_6_0_DB 0b00000111 // 2 0 6.0 dB
309 
310 // SX127X_REG_OOK_FIX
311 #define SX127X_OOK_FIXED_THRESHOLD 0x0C // 7 0 default fixed threshold for OOK data slicer
312 
313 // SX127X_REG_OOK_AVG
314 #define SX127X_OOK_PEAK_THRESH_DEC_1_1_CHIP 0b00000000 // 7 5 OOK demodulator step period: once per chip (default)
315 #define SX127X_OOK_PEAK_THRESH_DEC_1_2_CHIP 0b00100000 // 7 5 once every 2 chips
316 #define SX127X_OOK_PEAK_THRESH_DEC_1_4_CHIP 0b01000000 // 7 5 once every 4 chips
317 #define SX127X_OOK_PEAK_THRESH_DEC_1_8_CHIP 0b01100000 // 7 5 once every 8 chips
318 #define SX127X_OOK_PEAK_THRESH_DEC_2_1_CHIP 0b10000000 // 7 5 2 times per chip
319 #define SX127X_OOK_PEAK_THRESH_DEC_4_1_CHIP 0b10100000 // 7 5 4 times per chip
320 #define SX127X_OOK_PEAK_THRESH_DEC_8_1_CHIP 0b11000000 // 7 5 8 times per chip
321 #define SX127X_OOK_PEAK_THRESH_DEC_16_1_CHIP 0b11100000 // 7 5 16 times per chip
322 #define SX127X_OOK_AVERAGE_OFFSET_0_DB 0b00000000 // 3 2 OOK average threshold offset: 0.0 dB (default)
323 #define SX127X_OOK_AVERAGE_OFFSET_2_DB 0b00000100 // 3 2 2.0 dB
324 #define SX127X_OOK_AVERAGE_OFFSET_4_DB 0b00001000 // 3 2 4.0 dB
325 #define SX127X_OOK_AVERAGE_OFFSET_6_DB 0b00001100 // 3 2 6.0 dB
326 #define SX127X_OOK_AVG_THRESH_FILT_32_PI 0b00000000 // 1 0 OOK average filter coefficient: chip rate / 32*pi
327 #define SX127X_OOK_AVG_THRESH_FILT_8_PI 0b00000001 // 1 0 chip rate / 8*pi
328 #define SX127X_OOK_AVG_THRESH_FILT_4_PI 0b00000010 // 1 0 chip rate / 4*pi (default)
329 #define SX127X_OOK_AVG_THRESH_FILT_2_PI 0b00000011 // 1 0 chip rate / 2*pi
330 
331 // SX127X_REG_AFC_FEI
332 #define SX127X_AGC_START 0b00010000 // 4 4 manually start AGC sequence
333 #define SX127X_AFC_CLEAR 0b00000010 // 1 1 manually clear AFC register
334 #define SX127X_AFC_AUTO_CLEAR_OFF 0b00000000 // 0 0 AFC register will not be cleared at the start of AFC (default)
335 #define SX127X_AFC_AUTO_CLEAR_ON 0b00000001 // 0 0 AFC register will be cleared at the start of AFC
336 
337 // SX127X_REG_PREAMBLE_DETECT
338 #define SX127X_PREAMBLE_DETECTOR_OFF 0b00000000 // 7 7 preamble detection disabled
339 #define SX127X_PREAMBLE_DETECTOR_ON 0b10000000 // 7 7 preamble detection enabled (default)
340 #define SX127X_PREAMBLE_DETECTOR_1_BYTE 0b00000000 // 6 5 preamble detection size: 1 byte (default)
341 #define SX127X_PREAMBLE_DETECTOR_2_BYTE 0b00100000 // 6 5 2 bytes
342 #define SX127X_PREAMBLE_DETECTOR_3_BYTE 0b01000000 // 6 5 3 bytes
343 #define SX127X_PREAMBLE_DETECTOR_TOL 0x0A // 4 0 default number of tolerated errors per chip (4 chips per bit)
344 
345 // SX127X_REG_RX_TIMEOUT_1
346 #define SX127X_TIMEOUT_RX_RSSI_OFF 0x00 // 7 0 disable receiver timeout when RSSI interrupt doesn't occur (default)
347 
348 // SX127X_REG_RX_TIMEOUT_2
349 #define SX127X_TIMEOUT_RX_PREAMBLE_OFF 0x00 // 7 0 disable receiver timeout when preamble interrupt doesn't occur (default)
350 
351 // SX127X_REG_RX_TIMEOUT_3
352 #define SX127X_TIMEOUT_SIGNAL_SYNC_OFF 0x00 // 7 0 disable receiver timeout when sync address interrupt doesn't occur (default)
353 
354 // SX127X_REG_OSC
355 #define SX127X_RC_CAL_START 0b00000000 // 3 3 manually start RC oscillator calibration
356 #define SX127X_CLK_OUT_FXOSC 0b00000000 // 2 0 ClkOut frequency: F(XOSC)
357 #define SX127X_CLK_OUT_FXOSC_2 0b00000001 // 2 0 F(XOSC) / 2
358 #define SX127X_CLK_OUT_FXOSC_4 0b00000010 // 2 0 F(XOSC) / 4
359 #define SX127X_CLK_OUT_FXOSC_8 0b00000011 // 2 0 F(XOSC) / 8
360 #define SX127X_CLK_OUT_FXOSC_16 0b00000100 // 2 0 F(XOSC) / 16
361 #define SX127X_CLK_OUT_FXOSC_32 0b00000101 // 2 0 F(XOSC) / 32
362 #define SX127X_CLK_OUT_RC 0b00000110 // 2 0 RC
363 #define SX127X_CLK_OUT_OFF 0b00000111 // 2 0 disabled (default)
364 
365 // SX127X_REG_PREAMBLE_MSB_FSK + SX127X_REG_PREAMBLE_LSB_FSK
366 #define SX127X_PREAMBLE_SIZE_MSB 0x00 // 7 0 preamble size in bytes
367 #define SX127X_PREAMBLE_SIZE_LSB 0x03 // 7 0 default value: 3 bytes
368 
369 // SX127X_REG_SYNC_CONFIG
370 #define SX127X_AUTO_RESTART_RX_MODE_OFF 0b00000000 // 7 6 Rx mode restart after packet reception: disabled
371 #define SX127X_AUTO_RESTART_RX_MODE_NO_PLL 0b01000000 // 7 6 enabled, don't wait for PLL lock
372 #define SX127X_AUTO_RESTART_RX_MODE_PLL 0b10000000 // 7 6 enabled, wait for PLL lock (default)
373 #define SX127X_PREAMBLE_POLARITY_AA 0b00000000 // 5 5 preamble polarity: 0xAA = 0b10101010 (default)
374 #define SX127X_PREAMBLE_POLARITY_55 0b00100000 // 5 5 0x55 = 0b01010101
375 #define SX127X_SYNC_OFF 0b00000000 // 4 4 sync word disabled
376 #define SX127X_SYNC_ON 0b00010000 // 4 4 sync word enabled (default)
377 #define SX127X_SYNC_SIZE 0x03 // 2 0 sync word size in bytes, SyncSize = SYNC_SIZE + 1 bytes
378 
379 // SX127X_REG_SYNC_VALUE_1 - SX127X_REG_SYNC_VALUE_8
380 #define SX127X_SYNC_VALUE_1 0x01 // 7 0 sync word: 1st byte (MSB)
381 #define SX127X_SYNC_VALUE_2 0x01 // 7 0 2nd byte
382 #define SX127X_SYNC_VALUE_3 0x01 // 7 0 3rd byte
383 #define SX127X_SYNC_VALUE_4 0x01 // 7 0 4th byte
384 #define SX127X_SYNC_VALUE_5 0x01 // 7 0 5th byte
385 #define SX127X_SYNC_VALUE_6 0x01 // 7 0 6th byte
386 #define SX127X_SYNC_VALUE_7 0x01 // 7 0 7th byte
387 #define SX127X_SYNC_VALUE_8 0x01 // 7 0 8th byte (LSB)
388 
389 // SX127X_REG_PACKET_CONFIG_1
390 #define SX127X_PACKET_FIXED 0b00000000 // 7 7 packet format: fixed length
391 #define SX127X_PACKET_VARIABLE 0b10000000 // 7 7 variable length (default)
392 #define SX127X_DC_FREE_NONE 0b00000000 // 6 5 DC-free encoding: disabled (default)
393 #define SX127X_DC_FREE_MANCHESTER 0b00100000 // 6 5 Manchester
394 #define SX127X_DC_FREE_WHITENING 0b01000000 // 6 5 Whitening
395 #define SX127X_CRC_OFF 0b00000000 // 4 4 CRC disabled
396 #define SX127X_CRC_ON 0b00010000 // 4 4 CRC enabled (default)
397 #define SX127X_CRC_AUTOCLEAR_OFF 0b00001000 // 3 3 keep FIFO on CRC mismatch, issue payload ready interrupt
398 #define SX127X_CRC_AUTOCLEAR_ON 0b00000000 // 3 3 clear FIFO on CRC mismatch, do not issue payload ready interrupt
399 #define SX127X_ADDRESS_FILTERING_OFF 0b00000000 // 2 1 address filtering: none (default)
400 #define SX127X_ADDRESS_FILTERING_NODE 0b00000010 // 2 1 node
401 #define SX127X_ADDRESS_FILTERING_NODE_BROADCAST 0b00000100 // 2 1 node or broadcast
402 #define SX127X_CRC_WHITENING_TYPE_CCITT 0b00000000 // 0 0 CRC and whitening algorithms: CCITT CRC with standard whitening (default)
403 #define SX127X_CRC_WHITENING_TYPE_IBM 0b00000001 // 0 0 IBM CRC with alternate whitening
404 
405 // SX127X_REG_PACKET_CONFIG_2
406 #define SX127X_DATA_MODE_PACKET 0b01000000 // 6 6 data mode: packet (default)
407 #define SX127X_DATA_MODE_CONTINUOUS 0b00000000 // 6 6 continuous
408 #define SX127X_IO_HOME_OFF 0b00000000 // 5 5 io-homecontrol compatibility disabled (default)
409 #define SX127X_IO_HOME_ON 0b00100000 // 5 5 io-homecontrol compatibility enabled
410 
411 // SX127X_REG_FIFO_THRESH
412 #define SX127X_TX_START_FIFO_LEVEL 0b00000000 // 7 7 start packet transmission when: number of bytes in FIFO exceeds FIFO_THRESHOLD
413 #define SX127X_TX_START_FIFO_NOT_EMPTY 0b10000000 // 7 7 at least one byte in FIFO (default)
414 #define SX127X_FIFO_THRESH 0x0F // 5 0 FIFO level threshold
415 
416 // SX127X_REG_SEQ_CONFIG_1
417 #define SX127X_SEQUENCER_START 0b10000000 // 7 7 manually start sequencer
418 #define SX127X_SEQUENCER_STOP 0b01000000 // 6 6 manually stop sequencer
419 #define SX127X_IDLE_MODE_STANDBY 0b00000000 // 5 5 chip mode during sequencer idle mode: standby (default)
420 #define SX127X_IDLE_MODE_SLEEP 0b00100000 // 5 5 sleep
421 #define SX127X_FROM_START_LP_SELECTION 0b00000000 // 4 3 mode that will be set after starting sequencer: low power selection (default)
422 #define SX127X_FROM_START_RECEIVE 0b00001000 // 4 3 receive
423 #define SX127X_FROM_START_TRANSMIT 0b00010000 // 4 3 transmit
424 #define SX127X_FROM_START_TRANSMIT_FIFO_LEVEL 0b00011000 // 4 3 transmit on a FIFO level interrupt
425 #define SX127X_LP_SELECTION_SEQ_OFF 0b00000000 // 2 2 mode that will be set after exiting low power selection: sequencer off (default)
426 #define SX127X_LP_SELECTION_IDLE 0b00000100 // 2 2 idle state
427 #define SX127X_FROM_IDLE_TRANSMIT 0b00000000 // 1 1 mode that will be set after exiting idle mode: transmit (default)
428 #define SX127X_FROM_IDLE_RECEIVE 0b00000010 // 1 1 receive
429 #define SX127X_FROM_TRANSMIT_LP_SELECTION 0b00000000 // 0 0 mode that will be set after exiting transmit mode: low power selection (default)
430 #define SX127X_FROM_TRANSMIT_RECEIVE 0b00000001 // 0 0 receive
431 
432 // SX127X_REG_SEQ_CONFIG_2
433 #define SX127X_FROM_RECEIVE_PACKET_RECEIVED_PAYLOAD 0b00100000 // 7 5 mode that will be set after exiting receive mode: packet received on payload ready interrupt (default)
434 #define SX127X_FROM_RECEIVE_LP_SELECTION 0b01000000 // 7 5 low power selection
435 #define SX127X_FROM_RECEIVE_PACKET_RECEIVED_CRC_OK 0b01100000 // 7 5 packet received on CRC OK interrupt
436 #define SX127X_FROM_RECEIVE_SEQ_OFF_RSSI 0b10000000 // 7 5 sequencer off on RSSI interrupt
437 #define SX127X_FROM_RECEIVE_SEQ_OFF_SYNC_ADDR 0b10100000 // 7 5 sequencer off on sync address interrupt
438 #define SX127X_FROM_RECEIVE_SEQ_OFF_PREAMBLE_DETECT 0b11000000 // 7 5 sequencer off on preamble detect interrupt
439 #define SX127X_FROM_RX_TIMEOUT_RECEIVE 0b00000000 // 4 3 mode that will be set after Rx timeout: receive (default)
440 #define SX127X_FROM_RX_TIMEOUT_TRANSMIT 0b00001000 // 4 3 transmit
441 #define SX127X_FROM_RX_TIMEOUT_LP_SELECTION 0b00010000 // 4 3 low power selection
442 #define SX127X_FROM_RX_TIMEOUT_SEQ_OFF 0b00011000 // 4 3 sequencer off
443 #define SX127X_FROM_PACKET_RECEIVED_SEQ_OFF 0b00000000 // 2 0 mode that will be set after packet received: sequencer off (default)
444 #define SX127X_FROM_PACKET_RECEIVED_TRANSMIT 0b00000001 // 2 0 transmit
445 #define SX127X_FROM_PACKET_RECEIVED_LP_SELECTION 0b00000010 // 2 0 low power selection
446 #define SX127X_FROM_PACKET_RECEIVED_RECEIVE_FS 0b00000011 // 2 0 receive via FS
447 #define SX127X_FROM_PACKET_RECEIVED_RECEIVE 0b00000100 // 2 0 receive
448 
449 // SX127X_REG_TIMER_RESOL
450 #define SX127X_TIMER1_OFF 0b00000000 // 3 2 timer 1 resolution: disabled (default)
451 #define SX127X_TIMER1_RESOLUTION_64_US 0b00000100 // 3 2 64 us
452 #define SX127X_TIMER1_RESOLUTION_4_1_MS 0b00001000 // 3 2 4.1 ms
453 #define SX127X_TIMER1_RESOLUTION_262_MS 0b00001100 // 3 2 262 ms
454 #define SX127X_TIMER2_OFF 0b00000000 // 3 2 timer 2 resolution: disabled (default)
455 #define SX127X_TIMER2_RESOLUTION_64_US 0b00000001 // 3 2 64 us
456 #define SX127X_TIMER2_RESOLUTION_4_1_MS 0b00000010 // 3 2 4.1 ms
457 #define SX127X_TIMER2_RESOLUTION_262_MS 0b00000011 // 3 2 262 ms
458 
459 // SX127X_REG_TIMER1_COEF
460 #define SX127X_TIMER1_COEFFICIENT 0xF5 // 7 0 multiplication coefficient for timer 1
461 
462 // SX127X_REG_TIMER2_COEF
463 #define SX127X_TIMER2_COEFFICIENT 0x20 // 7 0 multiplication coefficient for timer 2
464 
465 // SX127X_REG_IMAGE_CAL
466 #define SX127X_AUTO_IMAGE_CAL_OFF 0b00000000 // 7 7 temperature calibration disabled (default)
467 #define SX127X_AUTO_IMAGE_CAL_ON 0b10000000 // 7 7 temperature calibration enabled
468 #define SX127X_IMAGE_CAL_START 0b01000000 // 6 6 start temperature calibration
469 #define SX127X_IMAGE_CAL_RUNNING 0b00100000 // 5 5 temperature calibration is on-going
470 #define SX127X_IMAGE_CAL_COMPLETE 0b00000000 // 5 5 temperature calibration finished
471 #define SX127X_TEMP_CHANGED 0b00001000 // 3 3 temperature changed more than TEMP_THRESHOLD since last calibration
472 #define SX127X_TEMP_THRESHOLD_5_DEG_C 0b00000000 // 2 1 temperature change threshold: 5 deg. C
473 #define SX127X_TEMP_THRESHOLD_10_DEG_C 0b00000010 // 2 1 10 deg. C (default)
474 #define SX127X_TEMP_THRESHOLD_15_DEG_C 0b00000100 // 2 1 15 deg. C
475 #define SX127X_TEMP_THRESHOLD_20_DEG_C 0b00000110 // 2 1 20 deg. C
476 #define SX127X_TEMP_MONITOR_ON 0b00000000 // 0 0 temperature monitoring enabled (default)
477 #define SX127X_TEMP_MONITOR_OFF 0b00000001 // 0 0 temperature monitoring disabled
478 
479 // SX127X_REG_LOW_BAT
480 #define SX127X_LOW_BAT_OFF 0b00000000 // 3 3 low battery detector disabled
481 #define SX127X_LOW_BAT_ON 0b00001000 // 3 3 low battery detector enabled
482 #define SX127X_LOW_BAT_TRIM_1_695_V 0b00000000 // 2 0 battery voltage threshold: 1.695 V
483 #define SX127X_LOW_BAT_TRIM_1_764_V 0b00000001 // 2 0 1.764 V
484 #define SX127X_LOW_BAT_TRIM_1_835_V 0b00000010 // 2 0 1.835 V (default)
485 #define SX127X_LOW_BAT_TRIM_1_905_V 0b00000011 // 2 0 1.905 V
486 #define SX127X_LOW_BAT_TRIM_1_976_V 0b00000100 // 2 0 1.976 V
487 #define SX127X_LOW_BAT_TRIM_2_045_V 0b00000101 // 2 0 2.045 V
488 #define SX127X_LOW_BAT_TRIM_2_116_V 0b00000110 // 2 0 2.116 V
489 #define SX127X_LOW_BAT_TRIM_2_185_V 0b00000111 // 2 0 2.185 V
490 
491 // SX127X_REG_IRQ_FLAGS_1
492 #define SX127X_FLAG_MODE_READY 0b10000000 // 7 7 requested mode is ready
493 #define SX127X_FLAG_RX_READY 0b01000000 // 6 6 reception ready (after RSSI, AGC, AFC)
494 #define SX127X_FLAG_TX_READY 0b00100000 // 5 5 transmission ready (after PA ramp-up)
495 #define SX127X_FLAG_PLL_LOCK 0b00010000 // 4 4 PLL locked
496 #define SX127X_FLAG_RSSI 0b00001000 // 3 3 RSSI value exceeds RSSI threshold
497 #define SX127X_FLAG_TIMEOUT 0b00000100 // 2 2 timeout occurred
498 #define SX127X_FLAG_PREAMBLE_DETECT 0b00000010 // 1 1 valid preamble was detected
499 #define SX127X_FLAG_SYNC_ADDRESS_MATCH 0b00000001 // 0 0 sync address matched
500 
501 // SX127X_REG_IRQ_FLAGS_2
502 #define SX127X_FLAG_FIFO_FULL 0b10000000 // 7 7 FIFO is full
503 #define SX127X_FLAG_FIFO_EMPTY 0b01000000 // 6 6 FIFO is empty
504 #define SX127X_FLAG_FIFO_LEVEL 0b00100000 // 5 5 number of bytes in FIFO exceeds FIFO_THRESHOLD
505 #define SX127X_FLAG_FIFO_OVERRUN 0b00010000 // 4 4 FIFO overrun occurred
506 #define SX127X_FLAG_PACKET_SENT 0b00001000 // 3 3 packet was successfully sent
507 #define SX127X_FLAG_PAYLOAD_READY 0b00000100 // 2 2 packet was successfully received
508 #define SX127X_FLAG_CRC_OK 0b00000010 // 1 1 CRC check passed
509 #define SX127X_FLAG_LOW_BAT 0b00000001 // 0 0 battery voltage dropped below threshold
510 
511 // SX127X_REG_DIO_MAPPING_1
512 #define SX127X_DIO0_CONT_SYNC_ADDRESS 0b00000000 // 7 6
513 #define SX127X_DIO0_CONT_TX_READY 0b00000000 // 7 6
514 #define SX127X_DIO0_CONT_RSSI_PREAMBLE_DETECTED 0b01000000 // 7 6
515 #define SX127X_DIO0_CONT_RX_READY 0b10000000 // 7 6
516 #define SX127X_DIO0_PACK_PAYLOAD_READY 0b00000000 // 7 6
517 #define SX127X_DIO0_PACK_PACKET_SENT 0b00000000 // 7 6
518 #define SX127X_DIO0_PACK_CRC_OK 0b01000000 // 7 6
519 #define SX127X_DIO0_PACK_TEMP_CHANGE_LOW_BAT 0b11000000 // 7 6
520 #define SX127X_DIO1_CONT_DCLK 0b00000000 // 5 4
521 #define SX127X_DIO1_CONT_RSSI_PREAMBLE_DETECTED 0b00010000 // 5 4
522 #define SX127X_DIO1_PACK_FIFO_LEVEL 0b00000000 // 5 4
523 #define SX127X_DIO1_PACK_FIFO_EMPTY 0b00010000 // 5 4
524 #define SX127X_DIO1_PACK_FIFO_FULL 0b00100000 // 5 4
525 #define SX127X_DIO2_CONT_DATA 0b00000000 // 3 2
526 
527 // SX1272_REG_PLL_HOP + SX1278_REG_PLL_HOP
528 #define SX127X_FAST_HOP_OFF 0b00000000 // 7 7 carrier frequency validated when FRF registers are written
529 #define SX127X_FAST_HOP_ON 0b10000000 // 7 7 carrier frequency validated when FS modes are requested
530 
531 // SX1272_REG_TCXO + SX1278_REG_TCXO
532 #define SX127X_TCXO_INPUT_EXTERNAL 0b00000000 // 4 4 use external crystal oscillator
533 #define SX127X_TCXO_INPUT_EXTERNAL_CLIPPED 0b00010000 // 4 4 use external crystal oscillator clipped sine connected to XTA pin
534 
535 // SX1272_REG_PLL + SX1278_REG_PLL
536 #define SX127X_PLL_BANDWIDTH_75_KHZ 0b00000000 // 7 6 PLL bandwidth: 75 kHz
537 #define SX127X_PLL_BANDWIDTH_150_KHZ 0b01000000 // 7 6 150 kHz
538 #define SX127X_PLL_BANDWIDTH_225_KHZ 0b10000000 // 7 6 225 kHz
539 #define SX127X_PLL_BANDWIDTH_300_KHZ 0b11000000 // 7 6 300 kHz (default)
540 
547 class SX127x: public PhysicalLayer {
548  public:
549  // introduce PhysicalLayer overloads
550  using PhysicalLayer::transmit;
551  using PhysicalLayer::receive;
552  using PhysicalLayer::startTransmit;
553  using PhysicalLayer::readData;
554 
555  // constructor
556 
562  SX127x(Module* mod);
563 
564  // basic methods
565 
577  int16_t begin(uint8_t chipVersion, uint8_t syncWord, uint16_t preambleLength);
578 
582  virtual void reset() = 0;
583 
601  int16_t beginFSK(uint8_t chipVersion, float br, float freqDev, float rxBw, uint16_t preambleLength, bool enableOOK);
602 
615  int16_t transmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
616 
627  int16_t receive(uint8_t* data, size_t len) override;
628 
634  int16_t scanChannel();
635 
642  int16_t sleep();
643 
649  int16_t standby() override;
650 
659  int16_t transmitDirect(uint32_t frf = 0) override;
660 
667  int16_t receiveDirect() override;
668 
674  int16_t packetMode();
675 
676  // interrupt methods
677 
683  void setDio0Action(void (*func)(void));
684 
688  void clearDio0Action();
689 
695  void setDio1Action(void (*func)(void));
696 
700  void clearDio1Action();
701 
713  int16_t startTransmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
714 
724  int16_t startReceive(uint8_t len = 0, uint8_t mode = SX127X_RXCONTINUOUS);
725 
735  int16_t readData(uint8_t* data, size_t len) override;
736 
737 
738  // configuration methods
739 
747  int16_t setSyncWord(uint8_t syncWord);
748 
756  int16_t setCurrentLimit(uint8_t currentLimit);
757 
765  int16_t setPreambleLength(uint16_t preambleLength);
766 
774  float getFrequencyError(bool autoCorrect = false);
775 
781  float getSNR();
782 
788  float getDataRate() const;
789 
797  int16_t setBitRate(float br);
798 
806  int16_t setFrequencyDeviation(float freqDev) override;
807 
815  int16_t setRxBandwidth(float rxBw);
816 
826  int16_t setSyncWord(uint8_t* syncWord, size_t len);
827 
835  int16_t setNodeAddress(uint8_t nodeAddr);
836 
844  int16_t setBroadcastAddress(uint8_t broadAddr);
845 
851  int16_t disableAddressFiltering();
852 
860  int16_t setOOK(bool enableOOK);
861 
869  size_t getPacketLength(bool update = true) override;
870 
878  int16_t fixedPacketLengthMode(uint8_t len = SX127X_MAX_PACKET_LENGTH_FSK);
879 
887  int16_t variablePacketLengthMode(uint8_t maxLen = SX127X_MAX_PACKET_LENGTH_FSK);
888 
899  int16_t setRSSIConfig(uint8_t smoothingSamples, int8_t offset = 0);
900 
909  int16_t setEncoding(uint8_t encoding) override;
910 
918  uint16_t getIRQFlags();
919 
925  uint8_t getModemStatus();
926 
933  int8_t getTempRaw();
934 
943  void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn);
944 
950  uint8_t random();
951 
957  int16_t getChipVersion();
958 
966  int16_t invertIQ(bool invertIQ);
967 
968 #ifndef RADIOLIB_GODMODE
969  protected:
970 #endif
971  Module* _mod;
972 
973  float _freq = 0;
974  float _bw = 0;
975  uint8_t _sf = 0;
976  uint8_t _cr = 0;
977  float _br = 0;
978  float _rxBw = 0;
979  bool _ook = false;
980  bool _crcEnabled = false;
981  size_t _packetLength = 0;
982 
983  int16_t setFrequencyRaw(float newFreq);
984  int16_t config();
985  int16_t configFSK();
986  int16_t getActiveModem();
987  int16_t directMode();
988  int16_t setPacketMode(uint8_t mode, uint8_t len);
989 
990 #ifndef RADIOLIB_GODMODE
991  private:
992 #endif
993  float _dataRate = 0;
994  bool _packetLengthQueried = false; // FSK packet length is the first byte in FIFO, length can only be queried once
995  uint8_t _packetLengthConfig = SX127X_PACKET_VARIABLE;
996 
997  bool findChip(uint8_t ver);
998  int16_t setMode(uint8_t mode);
999  int16_t setActiveModem(uint8_t modem);
1000  void clearIRQFlags();
1001  void clearFIFO(size_t count); // used mostly to clear remaining bytes in FIFO after a packet read
1002 };
1003 
1004 #endif
1005 
1006 #endif
SX127x::setRSSIConfig
int16_t setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)
Sets RSSI measurement configuration in FSK mode.
Definition: SX127x.cpp:909
+
SX127x::invertIQ
int16_t invertIQ(bool invertIQ)
Enables/disables Invert the LoRa I and Q signals.
Definition: SX127x.cpp:1193
+
SX127x
Base class for SX127x series. All derived classes for SX127x (e.g. SX1278 or SX1272) inherit from thi...
Definition: SX127x.h:547
SX127x::getPacketLength
size_t getPacketLength(bool update=true) override
Query modem for the packet length of received payload.
Definition: SX127x.cpp:873
SX127x::readData
int16_t readData(uint8_t *data, size_t len) override
Reads data that was received after calling startReceive method. This method reads len characters...
Definition: SX127x.cpp:485
SX127x::transmitDirect
int16_t transmitDirect(uint32_t frf=0) override
Enables direct transmission mode on pins DIO1 (clock) and DIO2 (data). While in direct mode...
Definition: SX127x.cpp:293
diff --git a/class_physical_layer.html b/class_physical_layer.html index 83c53439..727e8594 100644 --- a/class_physical_layer.html +++ b/class_physical_layer.html @@ -561,7 +561,7 @@ Public Member Functions
Returns
Status Codes
-

Implemented in Si443x, SX127x, CC1101, RF69, SX128x, SX126x, and nRF24.

+

Implemented in SX127x, Si443x, CC1101, RF69, SX128x, SX126x, and nRF24.

@@ -1052,7 +1052,7 @@ Public Member Functions
Returns
Status Codes
-

Implemented in Si443x, SX127x, CC1101, RF69, SX128x, SX126x, and nRF24.

+

Implemented in SX127x, Si443x, CC1101, RF69, SX128x, SX126x, and nRF24.

diff --git a/class_r_f_m95-members.html b/class_r_f_m95-members.html index 1cdb3927..6cb707c5 100644 --- a/class_r_f_m95-members.html +++ b/class_r_f_m95-members.html @@ -109,58 +109,59 @@ $(document).ready(function(){initNavTree('class_r_f_m95.html','');}); getSNR()SX127x getTempRaw()SX127x implicitHeader(size_t len)SX1278 - packetMode()SX127x - PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer - random()SX127xvirtual - PhysicalLayer::random(int32_t max)PhysicalLayer - PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer - readData(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer - receive(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer - receiveDirect() overrideSX127xvirtual - reset() overrideSX1278virtual - RFM95(Module *mod)RFM95 - scanChannel()SX127x - setBandwidth(float bw)SX1278 - setBitRate(float br)SX127x - setBroadcastAddress(uint8_t broadAddr)SX127x - setCodingRate(uint8_t cr)SX1278 - setCRC(bool enableCRC)SX1278 - setCurrentLimit(uint8_t currentLimit)SX127x - setDataShaping(uint8_t sh) overrideSX1278virtual - setDataShapingOOK(uint8_t sh)SX1278 - setDio0Action(void(*func)(void))SX127x - setDio1Action(void(*func)(void))SX127x - setEncoding(uint8_t encoding) overrideSX127xvirtual - setFrequency(float freq)RFM95 - setFrequencyDeviation(float freqDev) overrideSX127xvirtual - setGain(uint8_t gain)SX1278 - setNodeAddress(uint8_t nodeAddr)SX127x - setOOK(bool enableOOK)SX127x - setOutputPower(int8_t power)SX1278 - setPreambleLength(uint16_t preambleLength)SX127x - setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x - setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x - setRxBandwidth(float rxBw)SX127x - setSpreadingFactor(uint8_t sf)SX1278 - setSyncWord(uint8_t syncWord)SX127x - setSyncWord(uint8_t *syncWord, size_t len)SX127x - sleep()SX127x - standby() overrideSX127xvirtual - startDirect()PhysicalLayer - startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x - startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer - SX1278(Module *mod)SX1278 - SX127x(Module *mod)SX127x - transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer - transmitDirect(uint32_t frf=0) overrideSX127xvirtual - variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x + invertIQ(bool invertIQ)SX127x + packetMode()SX127x + PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer + random()SX127xvirtual + PhysicalLayer::random(int32_t max)PhysicalLayer + PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer + readData(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer + receive(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer + receiveDirect() overrideSX127xvirtual + reset() overrideSX1278virtual + RFM95(Module *mod)RFM95 + scanChannel()SX127x + setBandwidth(float bw)SX1278 + setBitRate(float br)SX127x + setBroadcastAddress(uint8_t broadAddr)SX127x + setCodingRate(uint8_t cr)SX1278 + setCRC(bool enableCRC)SX1278 + setCurrentLimit(uint8_t currentLimit)SX127x + setDataShaping(uint8_t sh) overrideSX1278virtual + setDataShapingOOK(uint8_t sh)SX1278 + setDio0Action(void(*func)(void))SX127x + setDio1Action(void(*func)(void))SX127x + setEncoding(uint8_t encoding) overrideSX127xvirtual + setFrequency(float freq)RFM95 + setFrequencyDeviation(float freqDev) overrideSX127xvirtual + setGain(uint8_t gain)SX1278 + setNodeAddress(uint8_t nodeAddr)SX127x + setOOK(bool enableOOK)SX127x + setOutputPower(int8_t power)SX1278 + setPreambleLength(uint16_t preambleLength)SX127x + setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x + setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x + setRxBandwidth(float rxBw)SX127x + setSpreadingFactor(uint8_t sf)SX1278 + setSyncWord(uint8_t syncWord)SX127x + setSyncWord(uint8_t *syncWord, size_t len)SX127x + sleep()SX127x + standby() overrideSX127xvirtual + startDirect()PhysicalLayer + startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x + startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer + SX1278(Module *mod)SX1278 + SX127x(Module *mod)SX127x + transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer + transmitDirect(uint32_t frf=0) overrideSX127xvirtual + variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x diff --git a/class_r_f_m95.html b/class_r_f_m95.html index bfec4068..49485109 100644 --- a/class_r_f_m95.html +++ b/class_r_f_m95.html @@ -304,6 +304,9 @@ void int16_t getChipVersion ()  Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if SX127x is connected and working. More...
  +int16_t invertIQ (bool invertIQ) + Enables/disables Invert the LoRa I and Q signals. More...
+  - Public Member Functions inherited from PhysicalLayer  PhysicalLayer (float freqStep, size_t maxPacketLength)  Default constructor. More...
diff --git a/class_r_f_m96-members.html b/class_r_f_m96-members.html index 5c747c82..be7a0b53 100644 --- a/class_r_f_m96-members.html +++ b/class_r_f_m96-members.html @@ -109,58 +109,59 @@ $(document).ready(function(){initNavTree('class_r_f_m96.html','');}); getSNR()SX127x getTempRaw()SX127x implicitHeader(size_t len)SX1278 - packetMode()SX127x - PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer - random()SX127xvirtual - PhysicalLayer::random(int32_t max)PhysicalLayer - PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer - readData(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer - receive(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer - receiveDirect() overrideSX127xvirtual - reset() overrideSX1278virtual - RFM96(Module *mod)RFM96 - scanChannel()SX127x - setBandwidth(float bw)SX1278 - setBitRate(float br)SX127x - setBroadcastAddress(uint8_t broadAddr)SX127x - setCodingRate(uint8_t cr)SX1278 - setCRC(bool enableCRC)SX1278 - setCurrentLimit(uint8_t currentLimit)SX127x - setDataShaping(uint8_t sh) overrideSX1278virtual - setDataShapingOOK(uint8_t sh)SX1278 - setDio0Action(void(*func)(void))SX127x - setDio1Action(void(*func)(void))SX127x - setEncoding(uint8_t encoding) overrideSX127xvirtual - setFrequency(float freq)RFM96 - setFrequencyDeviation(float freqDev) overrideSX127xvirtual - setGain(uint8_t gain)SX1278 - setNodeAddress(uint8_t nodeAddr)SX127x - setOOK(bool enableOOK)SX127x - setOutputPower(int8_t power)SX1278 - setPreambleLength(uint16_t preambleLength)SX127x - setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x - setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x - setRxBandwidth(float rxBw)SX127x - setSpreadingFactor(uint8_t sf)SX1278 - setSyncWord(uint8_t syncWord)SX127x - setSyncWord(uint8_t *syncWord, size_t len)SX127x - sleep()SX127x - standby() overrideSX127xvirtual - startDirect()PhysicalLayer - startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x - startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer - SX1278(Module *mod)SX1278 - SX127x(Module *mod)SX127x - transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer - transmitDirect(uint32_t frf=0) overrideSX127xvirtual - variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x + invertIQ(bool invertIQ)SX127x + packetMode()SX127x + PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer + random()SX127xvirtual + PhysicalLayer::random(int32_t max)PhysicalLayer + PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer + readData(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer + receive(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer + receiveDirect() overrideSX127xvirtual + reset() overrideSX1278virtual + RFM96(Module *mod)RFM96 + scanChannel()SX127x + setBandwidth(float bw)SX1278 + setBitRate(float br)SX127x + setBroadcastAddress(uint8_t broadAddr)SX127x + setCodingRate(uint8_t cr)SX1278 + setCRC(bool enableCRC)SX1278 + setCurrentLimit(uint8_t currentLimit)SX127x + setDataShaping(uint8_t sh) overrideSX1278virtual + setDataShapingOOK(uint8_t sh)SX1278 + setDio0Action(void(*func)(void))SX127x + setDio1Action(void(*func)(void))SX127x + setEncoding(uint8_t encoding) overrideSX127xvirtual + setFrequency(float freq)RFM96 + setFrequencyDeviation(float freqDev) overrideSX127xvirtual + setGain(uint8_t gain)SX1278 + setNodeAddress(uint8_t nodeAddr)SX127x + setOOK(bool enableOOK)SX127x + setOutputPower(int8_t power)SX1278 + setPreambleLength(uint16_t preambleLength)SX127x + setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x + setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x + setRxBandwidth(float rxBw)SX127x + setSpreadingFactor(uint8_t sf)SX1278 + setSyncWord(uint8_t syncWord)SX127x + setSyncWord(uint8_t *syncWord, size_t len)SX127x + sleep()SX127x + standby() overrideSX127xvirtual + startDirect()PhysicalLayer + startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x + startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer + SX1278(Module *mod)SX1278 + SX127x(Module *mod)SX127x + transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer + transmitDirect(uint32_t frf=0) overrideSX127xvirtual + variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x diff --git a/class_r_f_m96.html b/class_r_f_m96.html index f51438f8..711800c5 100644 --- a/class_r_f_m96.html +++ b/class_r_f_m96.html @@ -303,6 +303,9 @@ void int16_t getChipVersion ()  Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if SX127x is connected and working. More...
  +int16_t invertIQ (bool invertIQ) + Enables/disables Invert the LoRa I and Q signals. More...
+  - Public Member Functions inherited from PhysicalLayer  PhysicalLayer (float freqStep, size_t maxPacketLength)  Default constructor. More...
diff --git a/class_r_f_m97-members.html b/class_r_f_m97-members.html index 9bf59942..1b4e9324 100644 --- a/class_r_f_m97-members.html +++ b/class_r_f_m97-members.html @@ -109,59 +109,60 @@ $(document).ready(function(){initNavTree('class_r_f_m97.html','');}); getSNR()SX127x getTempRaw()SX127x implicitHeader(size_t len)SX1278 - packetMode()SX127x - PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer - random()SX127xvirtual - PhysicalLayer::random(int32_t max)PhysicalLayer - PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer - readData(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer - receive(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer - receiveDirect() overrideSX127xvirtual - reset() overrideSX1278virtual - RFM95(Module *mod)RFM95 - RFM97(Module *mod)RFM97 - scanChannel()SX127x - setBandwidth(float bw)SX1278 - setBitRate(float br)SX127x - setBroadcastAddress(uint8_t broadAddr)SX127x - setCodingRate(uint8_t cr)SX1278 - setCRC(bool enableCRC)SX1278 - setCurrentLimit(uint8_t currentLimit)SX127x - setDataShaping(uint8_t sh) overrideSX1278virtual - setDataShapingOOK(uint8_t sh)SX1278 - setDio0Action(void(*func)(void))SX127x - setDio1Action(void(*func)(void))SX127x - setEncoding(uint8_t encoding) overrideSX127xvirtual - setFrequency(float freq)RFM95 - setFrequencyDeviation(float freqDev) overrideSX127xvirtual - setGain(uint8_t gain)SX1278 - setNodeAddress(uint8_t nodeAddr)SX127x - setOOK(bool enableOOK)SX127x - setOutputPower(int8_t power)SX1278 - setPreambleLength(uint16_t preambleLength)SX127x - setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x - setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x - setRxBandwidth(float rxBw)SX127x - setSpreadingFactor(uint8_t sf)RFM97 - setSyncWord(uint8_t syncWord)SX127x - setSyncWord(uint8_t *syncWord, size_t len)SX127x - sleep()SX127x - standby() overrideSX127xvirtual - startDirect()PhysicalLayer - startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x - startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer - SX1278(Module *mod)SX1278 - SX127x(Module *mod)SX127x - transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer - transmitDirect(uint32_t frf=0) overrideSX127xvirtual - variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x + invertIQ(bool invertIQ)SX127x + packetMode()SX127x + PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer + random()SX127xvirtual + PhysicalLayer::random(int32_t max)PhysicalLayer + PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer + readData(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer + receive(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer + receiveDirect() overrideSX127xvirtual + reset() overrideSX1278virtual + RFM95(Module *mod)RFM95 + RFM97(Module *mod)RFM97 + scanChannel()SX127x + setBandwidth(float bw)SX1278 + setBitRate(float br)SX127x + setBroadcastAddress(uint8_t broadAddr)SX127x + setCodingRate(uint8_t cr)SX1278 + setCRC(bool enableCRC)SX1278 + setCurrentLimit(uint8_t currentLimit)SX127x + setDataShaping(uint8_t sh) overrideSX1278virtual + setDataShapingOOK(uint8_t sh)SX1278 + setDio0Action(void(*func)(void))SX127x + setDio1Action(void(*func)(void))SX127x + setEncoding(uint8_t encoding) overrideSX127xvirtual + setFrequency(float freq)RFM95 + setFrequencyDeviation(float freqDev) overrideSX127xvirtual + setGain(uint8_t gain)SX1278 + setNodeAddress(uint8_t nodeAddr)SX127x + setOOK(bool enableOOK)SX127x + setOutputPower(int8_t power)SX1278 + setPreambleLength(uint16_t preambleLength)SX127x + setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x + setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x + setRxBandwidth(float rxBw)SX127x + setSpreadingFactor(uint8_t sf)RFM97 + setSyncWord(uint8_t syncWord)SX127x + setSyncWord(uint8_t *syncWord, size_t len)SX127x + sleep()SX127x + standby() overrideSX127xvirtual + startDirect()PhysicalLayer + startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x + startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer + SX1278(Module *mod)SX1278 + SX127x(Module *mod)SX127x + transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer + transmitDirect(uint32_t frf=0) overrideSX127xvirtual + variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x diff --git a/class_r_f_m97.html b/class_r_f_m97.html index 9b4669fe..86a1ae19 100644 --- a/class_r_f_m97.html +++ b/class_r_f_m97.html @@ -311,6 +311,9 @@ void int16_t getChipVersion ()  Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if SX127x is connected and working. More...
  +int16_t invertIQ (bool invertIQ) + Enables/disables Invert the LoRa I and Q signals. More...
+  - Public Member Functions inherited from PhysicalLayer  PhysicalLayer (float freqStep, size_t maxPacketLength)  Default constructor. More...
diff --git a/class_s_x1272-members.html b/class_s_x1272-members.html index b75c8a7f..b42bd2c2 100644 --- a/class_s_x1272-members.html +++ b/class_s_x1272-members.html @@ -109,57 +109,58 @@ $(document).ready(function(){initNavTree('class_s_x1272.html','');}); getSNR()SX127x getTempRaw()SX127x implicitHeader(size_t len)SX1272 - packetMode()SX127x - PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer - random()SX127xvirtual - PhysicalLayer::random(int32_t max)PhysicalLayer - PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer - readData(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer - receive(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer - receiveDirect() overrideSX127xvirtual - reset() overrideSX1272virtual - scanChannel()SX127x - setBandwidth(float bw)SX1272 - setBitRate(float br)SX127x - setBroadcastAddress(uint8_t broadAddr)SX127x - setCodingRate(uint8_t cr)SX1272 - setCRC(bool enableCRC)SX1272 - setCurrentLimit(uint8_t currentLimit)SX127x - setDataShaping(uint8_t sh) overrideSX1272virtual - setDataShapingOOK(uint8_t sh)SX1272 - setDio0Action(void(*func)(void))SX127x - setDio1Action(void(*func)(void))SX127x - setEncoding(uint8_t encoding) overrideSX127xvirtual - setFrequency(float freq)SX1272 - setFrequencyDeviation(float freqDev) overrideSX127xvirtual - setGain(uint8_t gain)SX1272 - setNodeAddress(uint8_t nodeAddr)SX127x - setOOK(bool enableOOK)SX127x - setOutputPower(int8_t power)SX1272 - setPreambleLength(uint16_t preambleLength)SX127x - setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x - setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x - setRxBandwidth(float rxBw)SX127x - setSpreadingFactor(uint8_t sf)SX1272 - setSyncWord(uint8_t syncWord)SX127x - setSyncWord(uint8_t *syncWord, size_t len)SX127x - sleep()SX127x - standby() overrideSX127xvirtual - startDirect()PhysicalLayer - startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x - startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer - SX1272(Module *mod)SX1272 - SX127x(Module *mod)SX127x - transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer - transmitDirect(uint32_t frf=0) overrideSX127xvirtual - variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x + invertIQ(bool invertIQ)SX127x + packetMode()SX127x + PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer + random()SX127xvirtual + PhysicalLayer::random(int32_t max)PhysicalLayer + PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer + readData(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer + receive(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer + receiveDirect() overrideSX127xvirtual + reset() overrideSX1272virtual + scanChannel()SX127x + setBandwidth(float bw)SX1272 + setBitRate(float br)SX127x + setBroadcastAddress(uint8_t broadAddr)SX127x + setCodingRate(uint8_t cr)SX1272 + setCRC(bool enableCRC)SX1272 + setCurrentLimit(uint8_t currentLimit)SX127x + setDataShaping(uint8_t sh) overrideSX1272virtual + setDataShapingOOK(uint8_t sh)SX1272 + setDio0Action(void(*func)(void))SX127x + setDio1Action(void(*func)(void))SX127x + setEncoding(uint8_t encoding) overrideSX127xvirtual + setFrequency(float freq)SX1272 + setFrequencyDeviation(float freqDev) overrideSX127xvirtual + setGain(uint8_t gain)SX1272 + setNodeAddress(uint8_t nodeAddr)SX127x + setOOK(bool enableOOK)SX127x + setOutputPower(int8_t power)SX1272 + setPreambleLength(uint16_t preambleLength)SX127x + setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x + setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x + setRxBandwidth(float rxBw)SX127x + setSpreadingFactor(uint8_t sf)SX1272 + setSyncWord(uint8_t syncWord)SX127x + setSyncWord(uint8_t *syncWord, size_t len)SX127x + sleep()SX127x + standby() overrideSX127xvirtual + startDirect()PhysicalLayer + startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x + startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer + SX1272(Module *mod)SX1272 + SX127x(Module *mod)SX127x + transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer + transmitDirect(uint32_t frf=0) overrideSX127xvirtual + variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x diff --git a/class_s_x1272.html b/class_s_x1272.html index f85de0a6..19a6bcdc 100644 --- a/class_s_x1272.html +++ b/class_s_x1272.html @@ -293,6 +293,9 @@ void int16_t getChipVersion ()  Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if SX127x is connected and working. More...
  +int16_t invertIQ (bool invertIQ) + Enables/disables Invert the LoRa I and Q signals. More...
+  - Public Member Functions inherited from PhysicalLayer  PhysicalLayer (float freqStep, size_t maxPacketLength)  Default constructor. More...
diff --git a/class_s_x1273-members.html b/class_s_x1273-members.html index f656bd6a..0054d562 100644 --- a/class_s_x1273-members.html +++ b/class_s_x1273-members.html @@ -109,58 +109,59 @@ $(document).ready(function(){initNavTree('class_s_x1273.html','');}); getSNR()SX127x getTempRaw()SX127x implicitHeader(size_t len)SX1272 - packetMode()SX127x - PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer - random()SX127xvirtual - PhysicalLayer::random(int32_t max)PhysicalLayer - PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer - readData(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer - receive(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer - receiveDirect() overrideSX127xvirtual - reset() overrideSX1272virtual - scanChannel()SX127x - setBandwidth(float bw)SX1272 - setBitRate(float br)SX127x - setBroadcastAddress(uint8_t broadAddr)SX127x - setCodingRate(uint8_t cr)SX1272 - setCRC(bool enableCRC)SX1272 - setCurrentLimit(uint8_t currentLimit)SX127x - setDataShaping(uint8_t sh) overrideSX1272virtual - setDataShapingOOK(uint8_t sh)SX1272 - setDio0Action(void(*func)(void))SX127x - setDio1Action(void(*func)(void))SX127x - setEncoding(uint8_t encoding) overrideSX127xvirtual - setFrequency(float freq)SX1272 - setFrequencyDeviation(float freqDev) overrideSX127xvirtual - setGain(uint8_t gain)SX1272 - setNodeAddress(uint8_t nodeAddr)SX127x - setOOK(bool enableOOK)SX127x - setOutputPower(int8_t power)SX1272 - setPreambleLength(uint16_t preambleLength)SX127x - setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x - setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x - setRxBandwidth(float rxBw)SX127x - setSpreadingFactor(uint8_t sf)SX1273 - setSyncWord(uint8_t syncWord)SX127x - setSyncWord(uint8_t *syncWord, size_t len)SX127x - sleep()SX127x - standby() overrideSX127xvirtual - startDirect()PhysicalLayer - startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x - startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer - SX1272(Module *mod)SX1272 - SX1273(Module *mod)SX1273 - SX127x(Module *mod)SX127x - transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer - transmitDirect(uint32_t frf=0) overrideSX127xvirtual - variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x + invertIQ(bool invertIQ)SX127x + packetMode()SX127x + PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer + random()SX127xvirtual + PhysicalLayer::random(int32_t max)PhysicalLayer + PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer + readData(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer + receive(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer + receiveDirect() overrideSX127xvirtual + reset() overrideSX1272virtual + scanChannel()SX127x + setBandwidth(float bw)SX1272 + setBitRate(float br)SX127x + setBroadcastAddress(uint8_t broadAddr)SX127x + setCodingRate(uint8_t cr)SX1272 + setCRC(bool enableCRC)SX1272 + setCurrentLimit(uint8_t currentLimit)SX127x + setDataShaping(uint8_t sh) overrideSX1272virtual + setDataShapingOOK(uint8_t sh)SX1272 + setDio0Action(void(*func)(void))SX127x + setDio1Action(void(*func)(void))SX127x + setEncoding(uint8_t encoding) overrideSX127xvirtual + setFrequency(float freq)SX1272 + setFrequencyDeviation(float freqDev) overrideSX127xvirtual + setGain(uint8_t gain)SX1272 + setNodeAddress(uint8_t nodeAddr)SX127x + setOOK(bool enableOOK)SX127x + setOutputPower(int8_t power)SX1272 + setPreambleLength(uint16_t preambleLength)SX127x + setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x + setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x + setRxBandwidth(float rxBw)SX127x + setSpreadingFactor(uint8_t sf)SX1273 + setSyncWord(uint8_t syncWord)SX127x + setSyncWord(uint8_t *syncWord, size_t len)SX127x + sleep()SX127x + standby() overrideSX127xvirtual + startDirect()PhysicalLayer + startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x + startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer + SX1272(Module *mod)SX1272 + SX1273(Module *mod)SX1273 + SX127x(Module *mod)SX127x + transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer + transmitDirect(uint32_t frf=0) overrideSX127xvirtual + variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x diff --git a/class_s_x1273.html b/class_s_x1273.html index db57e8a2..aa3831b3 100644 --- a/class_s_x1273.html +++ b/class_s_x1273.html @@ -303,6 +303,9 @@ void int16_t getChipVersion ()  Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if SX127x is connected and working. More...
  +int16_t invertIQ (bool invertIQ) + Enables/disables Invert the LoRa I and Q signals. More...
+  - Public Member Functions inherited from PhysicalLayer  PhysicalLayer (float freqStep, size_t maxPacketLength)  Default constructor. More...
diff --git a/class_s_x1276-members.html b/class_s_x1276-members.html index 18fa1c44..3e51057a 100644 --- a/class_s_x1276-members.html +++ b/class_s_x1276-members.html @@ -109,58 +109,59 @@ $(document).ready(function(){initNavTree('class_s_x1276.html','');}); getSNR()SX127x getTempRaw()SX127x implicitHeader(size_t len)SX1278 - packetMode()SX127x - PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer - random()SX127xvirtual - PhysicalLayer::random(int32_t max)PhysicalLayer - PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer - readData(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer - receive(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer - receiveDirect() overrideSX127xvirtual - reset() overrideSX1278virtual - scanChannel()SX127x - setBandwidth(float bw)SX1278 - setBitRate(float br)SX127x - setBroadcastAddress(uint8_t broadAddr)SX127x - setCodingRate(uint8_t cr)SX1278 - setCRC(bool enableCRC)SX1278 - setCurrentLimit(uint8_t currentLimit)SX127x - setDataShaping(uint8_t sh) overrideSX1278virtual - setDataShapingOOK(uint8_t sh)SX1278 - setDio0Action(void(*func)(void))SX127x - setDio1Action(void(*func)(void))SX127x - setEncoding(uint8_t encoding) overrideSX127xvirtual - setFrequency(float freq)SX1276 - setFrequencyDeviation(float freqDev) overrideSX127xvirtual - setGain(uint8_t gain)SX1278 - setNodeAddress(uint8_t nodeAddr)SX127x - setOOK(bool enableOOK)SX127x - setOutputPower(int8_t power)SX1278 - setPreambleLength(uint16_t preambleLength)SX127x - setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x - setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x - setRxBandwidth(float rxBw)SX127x - setSpreadingFactor(uint8_t sf)SX1278 - setSyncWord(uint8_t syncWord)SX127x - setSyncWord(uint8_t *syncWord, size_t len)SX127x - sleep()SX127x - standby() overrideSX127xvirtual - startDirect()PhysicalLayer - startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x - startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer - SX1276(Module *mod)SX1276 - SX1278(Module *mod)SX1278 - SX127x(Module *mod)SX127x - transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer - transmitDirect(uint32_t frf=0) overrideSX127xvirtual - variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x + invertIQ(bool invertIQ)SX127x + packetMode()SX127x + PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer + random()SX127xvirtual + PhysicalLayer::random(int32_t max)PhysicalLayer + PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer + readData(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer + receive(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer + receiveDirect() overrideSX127xvirtual + reset() overrideSX1278virtual + scanChannel()SX127x + setBandwidth(float bw)SX1278 + setBitRate(float br)SX127x + setBroadcastAddress(uint8_t broadAddr)SX127x + setCodingRate(uint8_t cr)SX1278 + setCRC(bool enableCRC)SX1278 + setCurrentLimit(uint8_t currentLimit)SX127x + setDataShaping(uint8_t sh) overrideSX1278virtual + setDataShapingOOK(uint8_t sh)SX1278 + setDio0Action(void(*func)(void))SX127x + setDio1Action(void(*func)(void))SX127x + setEncoding(uint8_t encoding) overrideSX127xvirtual + setFrequency(float freq)SX1276 + setFrequencyDeviation(float freqDev) overrideSX127xvirtual + setGain(uint8_t gain)SX1278 + setNodeAddress(uint8_t nodeAddr)SX127x + setOOK(bool enableOOK)SX127x + setOutputPower(int8_t power)SX1278 + setPreambleLength(uint16_t preambleLength)SX127x + setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x + setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x + setRxBandwidth(float rxBw)SX127x + setSpreadingFactor(uint8_t sf)SX1278 + setSyncWord(uint8_t syncWord)SX127x + setSyncWord(uint8_t *syncWord, size_t len)SX127x + sleep()SX127x + standby() overrideSX127xvirtual + startDirect()PhysicalLayer + startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x + startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer + SX1276(Module *mod)SX1276 + SX1278(Module *mod)SX1278 + SX127x(Module *mod)SX127x + transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer + transmitDirect(uint32_t frf=0) overrideSX127xvirtual + variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x diff --git a/class_s_x1276.html b/class_s_x1276.html index f4a3d6d2..0e8deb7c 100644 --- a/class_s_x1276.html +++ b/class_s_x1276.html @@ -306,6 +306,9 @@ void int16_t getChipVersion ()  Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if SX127x is connected and working. More...
  +int16_t invertIQ (bool invertIQ) + Enables/disables Invert the LoRa I and Q signals. More...
+  - Public Member Functions inherited from PhysicalLayer  PhysicalLayer (float freqStep, size_t maxPacketLength)  Default constructor. More...
diff --git a/class_s_x1277-members.html b/class_s_x1277-members.html index ec090b6c..0e1ec3fe 100644 --- a/class_s_x1277-members.html +++ b/class_s_x1277-members.html @@ -109,58 +109,59 @@ $(document).ready(function(){initNavTree('class_s_x1277.html','');}); getSNR()SX127x getTempRaw()SX127x implicitHeader(size_t len)SX1278 - packetMode()SX127x - PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer - random()SX127xvirtual - PhysicalLayer::random(int32_t max)PhysicalLayer - PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer - readData(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer - receive(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer - receiveDirect() overrideSX127xvirtual - reset() overrideSX1278virtual - scanChannel()SX127x - setBandwidth(float bw)SX1278 - setBitRate(float br)SX127x - setBroadcastAddress(uint8_t broadAddr)SX127x - setCodingRate(uint8_t cr)SX1278 - setCRC(bool enableCRC)SX1278 - setCurrentLimit(uint8_t currentLimit)SX127x - setDataShaping(uint8_t sh) overrideSX1278virtual - setDataShapingOOK(uint8_t sh)SX1278 - setDio0Action(void(*func)(void))SX127x - setDio1Action(void(*func)(void))SX127x - setEncoding(uint8_t encoding) overrideSX127xvirtual - setFrequency(float freq)SX1277 - setFrequencyDeviation(float freqDev) overrideSX127xvirtual - setGain(uint8_t gain)SX1278 - setNodeAddress(uint8_t nodeAddr)SX127x - setOOK(bool enableOOK)SX127x - setOutputPower(int8_t power)SX1278 - setPreambleLength(uint16_t preambleLength)SX127x - setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x - setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x - setRxBandwidth(float rxBw)SX127x - setSpreadingFactor(uint8_t sf)SX1277 - setSyncWord(uint8_t syncWord)SX127x - setSyncWord(uint8_t *syncWord, size_t len)SX127x - sleep()SX127x - standby() overrideSX127xvirtual - startDirect()PhysicalLayer - startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x - startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer - SX1277(Module *mod)SX1277 - SX1278(Module *mod)SX1278 - SX127x(Module *mod)SX127x - transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer - transmitDirect(uint32_t frf=0) overrideSX127xvirtual - variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x + invertIQ(bool invertIQ)SX127x + packetMode()SX127x + PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer + random()SX127xvirtual + PhysicalLayer::random(int32_t max)PhysicalLayer + PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer + readData(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer + receive(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer + receiveDirect() overrideSX127xvirtual + reset() overrideSX1278virtual + scanChannel()SX127x + setBandwidth(float bw)SX1278 + setBitRate(float br)SX127x + setBroadcastAddress(uint8_t broadAddr)SX127x + setCodingRate(uint8_t cr)SX1278 + setCRC(bool enableCRC)SX1278 + setCurrentLimit(uint8_t currentLimit)SX127x + setDataShaping(uint8_t sh) overrideSX1278virtual + setDataShapingOOK(uint8_t sh)SX1278 + setDio0Action(void(*func)(void))SX127x + setDio1Action(void(*func)(void))SX127x + setEncoding(uint8_t encoding) overrideSX127xvirtual + setFrequency(float freq)SX1277 + setFrequencyDeviation(float freqDev) overrideSX127xvirtual + setGain(uint8_t gain)SX1278 + setNodeAddress(uint8_t nodeAddr)SX127x + setOOK(bool enableOOK)SX127x + setOutputPower(int8_t power)SX1278 + setPreambleLength(uint16_t preambleLength)SX127x + setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x + setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x + setRxBandwidth(float rxBw)SX127x + setSpreadingFactor(uint8_t sf)SX1277 + setSyncWord(uint8_t syncWord)SX127x + setSyncWord(uint8_t *syncWord, size_t len)SX127x + sleep()SX127x + standby() overrideSX127xvirtual + startDirect()PhysicalLayer + startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x + startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer + SX1277(Module *mod)SX1277 + SX1278(Module *mod)SX1278 + SX127x(Module *mod)SX127x + transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer + transmitDirect(uint32_t frf=0) overrideSX127xvirtual + variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x diff --git a/class_s_x1277.html b/class_s_x1277.html index faaaa9e3..867093f5 100644 --- a/class_s_x1277.html +++ b/class_s_x1277.html @@ -309,6 +309,9 @@ void int16_t getChipVersion ()  Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if SX127x is connected and working. More...
  +int16_t invertIQ (bool invertIQ) + Enables/disables Invert the LoRa I and Q signals. More...
+  - Public Member Functions inherited from PhysicalLayer  PhysicalLayer (float freqStep, size_t maxPacketLength)  Default constructor. More...
diff --git a/class_s_x1278-members.html b/class_s_x1278-members.html index 8a3957c9..10fa3f3a 100644 --- a/class_s_x1278-members.html +++ b/class_s_x1278-members.html @@ -109,57 +109,58 @@ $(document).ready(function(){initNavTree('class_s_x1278.html','');}); getSNR()SX127x getTempRaw()SX127x implicitHeader(size_t len)SX1278 - packetMode()SX127x - PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer - random()SX127xvirtual - PhysicalLayer::random(int32_t max)PhysicalLayer - PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer - readData(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer - receive(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer - receiveDirect() overrideSX127xvirtual - reset() overrideSX1278virtual - scanChannel()SX127x - setBandwidth(float bw)SX1278 - setBitRate(float br)SX127x - setBroadcastAddress(uint8_t broadAddr)SX127x - setCodingRate(uint8_t cr)SX1278 - setCRC(bool enableCRC)SX1278 - setCurrentLimit(uint8_t currentLimit)SX127x - setDataShaping(uint8_t sh) overrideSX1278virtual - setDataShapingOOK(uint8_t sh)SX1278 - setDio0Action(void(*func)(void))SX127x - setDio1Action(void(*func)(void))SX127x - setEncoding(uint8_t encoding) overrideSX127xvirtual - setFrequency(float freq)SX1278 - setFrequencyDeviation(float freqDev) overrideSX127xvirtual - setGain(uint8_t gain)SX1278 - setNodeAddress(uint8_t nodeAddr)SX127x - setOOK(bool enableOOK)SX127x - setOutputPower(int8_t power)SX1278 - setPreambleLength(uint16_t preambleLength)SX127x - setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x - setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x - setRxBandwidth(float rxBw)SX127x - setSpreadingFactor(uint8_t sf)SX1278 - setSyncWord(uint8_t syncWord)SX127x - setSyncWord(uint8_t *syncWord, size_t len)SX127x - sleep()SX127x - standby() overrideSX127xvirtual - startDirect()PhysicalLayer - startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x - startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer - SX1278(Module *mod)SX1278 - SX127x(Module *mod)SX127x - transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer - transmitDirect(uint32_t frf=0) overrideSX127xvirtual - variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x + invertIQ(bool invertIQ)SX127x + packetMode()SX127x + PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer + random()SX127xvirtual + PhysicalLayer::random(int32_t max)PhysicalLayer + PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer + readData(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer + receive(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer + receiveDirect() overrideSX127xvirtual + reset() overrideSX1278virtual + scanChannel()SX127x + setBandwidth(float bw)SX1278 + setBitRate(float br)SX127x + setBroadcastAddress(uint8_t broadAddr)SX127x + setCodingRate(uint8_t cr)SX1278 + setCRC(bool enableCRC)SX1278 + setCurrentLimit(uint8_t currentLimit)SX127x + setDataShaping(uint8_t sh) overrideSX1278virtual + setDataShapingOOK(uint8_t sh)SX1278 + setDio0Action(void(*func)(void))SX127x + setDio1Action(void(*func)(void))SX127x + setEncoding(uint8_t encoding) overrideSX127xvirtual + setFrequency(float freq)SX1278 + setFrequencyDeviation(float freqDev) overrideSX127xvirtual + setGain(uint8_t gain)SX1278 + setNodeAddress(uint8_t nodeAddr)SX127x + setOOK(bool enableOOK)SX127x + setOutputPower(int8_t power)SX1278 + setPreambleLength(uint16_t preambleLength)SX127x + setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x + setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x + setRxBandwidth(float rxBw)SX127x + setSpreadingFactor(uint8_t sf)SX1278 + setSyncWord(uint8_t syncWord)SX127x + setSyncWord(uint8_t *syncWord, size_t len)SX127x + sleep()SX127x + standby() overrideSX127xvirtual + startDirect()PhysicalLayer + startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x + startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer + SX1278(Module *mod)SX1278 + SX127x(Module *mod)SX127x + transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer + transmitDirect(uint32_t frf=0) overrideSX127xvirtual + variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x diff --git a/class_s_x1278.html b/class_s_x1278.html index c397458d..ed67d11f 100644 --- a/class_s_x1278.html +++ b/class_s_x1278.html @@ -298,6 +298,9 @@ void int16_t getChipVersion ()  Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if SX127x is connected and working. More...
  +int16_t invertIQ (bool invertIQ) + Enables/disables Invert the LoRa I and Q signals. More...
+  - Public Member Functions inherited from PhysicalLayer  PhysicalLayer (float freqStep, size_t maxPacketLength)  Default constructor. More...
diff --git a/class_s_x1279-members.html b/class_s_x1279-members.html index 4512785a..a2043908 100644 --- a/class_s_x1279-members.html +++ b/class_s_x1279-members.html @@ -109,58 +109,59 @@ $(document).ready(function(){initNavTree('class_s_x1279.html','');}); getSNR()SX127x getTempRaw()SX127x implicitHeader(size_t len)SX1278 - packetMode()SX127x - PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer - random()SX127xvirtual - PhysicalLayer::random(int32_t max)PhysicalLayer - PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer - readData(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer - receive(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer - receiveDirect() overrideSX127xvirtual - reset() overrideSX1278virtual - scanChannel()SX127x - setBandwidth(float bw)SX1278 - setBitRate(float br)SX127x - setBroadcastAddress(uint8_t broadAddr)SX127x - setCodingRate(uint8_t cr)SX1278 - setCRC(bool enableCRC)SX1278 - setCurrentLimit(uint8_t currentLimit)SX127x - setDataShaping(uint8_t sh) overrideSX1278virtual - setDataShapingOOK(uint8_t sh)SX1278 - setDio0Action(void(*func)(void))SX127x - setDio1Action(void(*func)(void))SX127x - setEncoding(uint8_t encoding) overrideSX127xvirtual - setFrequency(float freq)SX1279 - setFrequencyDeviation(float freqDev) overrideSX127xvirtual - setGain(uint8_t gain)SX1278 - setNodeAddress(uint8_t nodeAddr)SX127x - setOOK(bool enableOOK)SX127x - setOutputPower(int8_t power)SX1278 - setPreambleLength(uint16_t preambleLength)SX127x - setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x - setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x - setRxBandwidth(float rxBw)SX127x - setSpreadingFactor(uint8_t sf)SX1278 - setSyncWord(uint8_t syncWord)SX127x - setSyncWord(uint8_t *syncWord, size_t len)SX127x - sleep()SX127x - standby() overrideSX127xvirtual - startDirect()PhysicalLayer - startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x - startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer - SX1278(Module *mod)SX1278 - SX1279(Module *mod)SX1279 - SX127x(Module *mod)SX127x - transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer - transmitDirect(uint32_t frf=0) overrideSX127xvirtual - variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x + invertIQ(bool invertIQ)SX127x + packetMode()SX127x + PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer + random()SX127xvirtual + PhysicalLayer::random(int32_t max)PhysicalLayer + PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer + readData(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer + receive(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer + receiveDirect() overrideSX127xvirtual + reset() overrideSX1278virtual + scanChannel()SX127x + setBandwidth(float bw)SX1278 + setBitRate(float br)SX127x + setBroadcastAddress(uint8_t broadAddr)SX127x + setCodingRate(uint8_t cr)SX1278 + setCRC(bool enableCRC)SX1278 + setCurrentLimit(uint8_t currentLimit)SX127x + setDataShaping(uint8_t sh) overrideSX1278virtual + setDataShapingOOK(uint8_t sh)SX1278 + setDio0Action(void(*func)(void))SX127x + setDio1Action(void(*func)(void))SX127x + setEncoding(uint8_t encoding) overrideSX127xvirtual + setFrequency(float freq)SX1279 + setFrequencyDeviation(float freqDev) overrideSX127xvirtual + setGain(uint8_t gain)SX1278 + setNodeAddress(uint8_t nodeAddr)SX127x + setOOK(bool enableOOK)SX127x + setOutputPower(int8_t power)SX1278 + setPreambleLength(uint16_t preambleLength)SX127x + setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x + setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x + setRxBandwidth(float rxBw)SX127x + setSpreadingFactor(uint8_t sf)SX1278 + setSyncWord(uint8_t syncWord)SX127x + setSyncWord(uint8_t *syncWord, size_t len)SX127x + sleep()SX127x + standby() overrideSX127xvirtual + startDirect()PhysicalLayer + startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x + startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer + SX1278(Module *mod)SX1278 + SX1279(Module *mod)SX1279 + SX127x(Module *mod)SX127x + transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer + transmitDirect(uint32_t frf=0) overrideSX127xvirtual + variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x diff --git a/class_s_x1279.html b/class_s_x1279.html index 65345742..fbfbc7ed 100644 --- a/class_s_x1279.html +++ b/class_s_x1279.html @@ -306,6 +306,9 @@ void int16_t getChipVersion ()  Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if SX127x is connected and working. More...
  +int16_t invertIQ (bool invertIQ) + Enables/disables Invert the LoRa I and Q signals. More...
+  - Public Member Functions inherited from PhysicalLayer  PhysicalLayer (float freqStep, size_t maxPacketLength)  Default constructor. More...
diff --git a/class_s_x127x-members.html b/class_s_x127x-members.html index f39f0675..6dfda5a6 100644 --- a/class_s_x127x-members.html +++ b/class_s_x127x-members.html @@ -102,48 +102,49 @@ $(document).ready(function(){initNavTree('class_s_x127x.html','');}); getPacketLength(bool update=true) overrideSX127xvirtual getSNR()SX127x getTempRaw()SX127x - packetMode()SX127x - PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer - random()SX127xvirtual - PhysicalLayer::random(int32_t max)PhysicalLayer - PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer - readData(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer - receive(uint8_t *data, size_t len) overrideSX127xvirtual - PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer - receiveDirect() overrideSX127xvirtual - reset()=0SX127xpure virtual - scanChannel()SX127x - setBitRate(float br)SX127x - setBroadcastAddress(uint8_t broadAddr)SX127x - setCurrentLimit(uint8_t currentLimit)SX127x - setDataShaping(uint8_t sh)=0PhysicalLayerpure virtual - setDio0Action(void(*func)(void))SX127x - setDio1Action(void(*func)(void))SX127x - setEncoding(uint8_t encoding) overrideSX127xvirtual - setFrequencyDeviation(float freqDev) overrideSX127xvirtual - setNodeAddress(uint8_t nodeAddr)SX127x - setOOK(bool enableOOK)SX127x - setPreambleLength(uint16_t preambleLength)SX127x - setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x - setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x - setRxBandwidth(float rxBw)SX127x - setSyncWord(uint8_t syncWord)SX127x - setSyncWord(uint8_t *syncWord, size_t len)SX127x - sleep()SX127x - standby() overrideSX127xvirtual - startDirect()PhysicalLayer - startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x - startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer - SX127x(Module *mod)SX127x - transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual - PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer - PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer - transmitDirect(uint32_t frf=0) overrideSX127xvirtual - variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x + invertIQ(bool invertIQ)SX127x + packetMode()SX127x + PhysicalLayer(float freqStep, size_t maxPacketLength)PhysicalLayer + random()SX127xvirtual + PhysicalLayer::random(int32_t max)PhysicalLayer + PhysicalLayer::random(int32_t min, int32_t max)PhysicalLayer + readData(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::readData(String &str, size_t len=0)PhysicalLayer + receive(uint8_t *data, size_t len) overrideSX127xvirtual + PhysicalLayer::receive(String &str, size_t len=0)PhysicalLayer + receiveDirect() overrideSX127xvirtual + reset()=0SX127xpure virtual + scanChannel()SX127x + setBitRate(float br)SX127x + setBroadcastAddress(uint8_t broadAddr)SX127x + setCurrentLimit(uint8_t currentLimit)SX127x + setDataShaping(uint8_t sh)=0PhysicalLayerpure virtual + setDio0Action(void(*func)(void))SX127x + setDio1Action(void(*func)(void))SX127x + setEncoding(uint8_t encoding) overrideSX127xvirtual + setFrequencyDeviation(float freqDev) overrideSX127xvirtual + setNodeAddress(uint8_t nodeAddr)SX127x + setOOK(bool enableOOK)SX127x + setPreambleLength(uint16_t preambleLength)SX127x + setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)SX127x + setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)SX127x + setRxBandwidth(float rxBw)SX127x + setSyncWord(uint8_t syncWord)SX127x + setSyncWord(uint8_t *syncWord, size_t len)SX127x + sleep()SX127x + standby() overrideSX127xvirtual + startDirect()PhysicalLayer + startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)SX127x + startTransmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::startTransmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::startTransmit(const char *str, uint8_t addr=0)PhysicalLayer + SX127x(Module *mod)SX127x + transmit(uint8_t *data, size_t len, uint8_t addr=0) overrideSX127xvirtual + PhysicalLayer::transmit(__FlashStringHelper *fstr, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(String &str, uint8_t addr=0)PhysicalLayer + PhysicalLayer::transmit(const char *str, uint8_t addr=0)PhysicalLayer + transmitDirect(uint32_t frf=0) overrideSX127xvirtual + variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)SX127x diff --git a/class_s_x127x.html b/class_s_x127x.html index 4e60e878..4b6db3b8 100644 --- a/class_s_x127x.html +++ b/class_s_x127x.html @@ -248,6 +248,9 @@ void int16_t getChipVersion ()  Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if SX127x is connected and working. More...
  +int16_t invertIQ (bool invertIQ) + Enables/disables Invert the LoRa I and Q signals. More...
+  - Public Member Functions inherited from PhysicalLayer  PhysicalLayer (float freqStep, size_t maxPacketLength)  Default constructor. More...
@@ -659,6 +662,33 @@ void 
Returns
Uncalibrated temperature sensor reading.
+ + + +

◆ invertIQ()

+ +
+
+ + + + + + + + +
int16_t SX127x::invertIQ (bool invertIQ)
+
+ +

Enables/disables Invert the LoRa I and Q signals.

+
Parameters
+ + +
invertIQEnable (true) or disable (false) LoRa I and Q signals.
+
+
+
Returns
Status Codes
+
diff --git a/class_s_x127x.js b/class_s_x127x.js index 73b63455..0a77d12d 100644 --- a/class_s_x127x.js +++ b/class_s_x127x.js @@ -15,6 +15,7 @@ var class_s_x127x = [ "getPacketLength", "class_s_x127x.html#a462fa74275e67c296328a01f361892d5", null ], [ "getSNR", "class_s_x127x.html#abc5069b39dc31b637ee561d5745e1deb", null ], [ "getTempRaw", "class_s_x127x.html#a95bc32a555675879ad9e2a9e399dc6c1", null ], + [ "invertIQ", "class_s_x127x.html#a1f6c61b16a39a2bbb5b94b3685caae04", null ], [ "packetMode", "class_s_x127x.html#a0995088d37689a3c240a1af791df6cf1", null ], [ "random", "class_s_x127x.html#a6a03da620f9fb532c879900ba05732de", null ], [ "readData", "class_s_x127x.html#abfc840e8d6fe5e222f0143be17876745", null ], diff --git a/functions_func_i.html b/functions_func_i.html index 55486b36..710584a9 100644 --- a/functions_func_i.html +++ b/functions_func_i.html @@ -96,6 +96,9 @@ $(document).ready(function(){initNavTree('functions_func_i.html','');});
  • init() : Module
    • +
  • invertIQ() +: SX127x +
  • isCarrierDetected() : nRF24
    • diff --git a/functions_i.html b/functions_i.html index e987a1c9..17342150 100644 --- a/functions_i.html +++ b/functions_i.html @@ -102,6 +102,9 @@ $(document).ready(function(){initNavTree('functions_i.html','');});
  • init() : Module
    • +
  • invertIQ() +: SX127x +
  • isCarrierDetected() : nRF24
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