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[CC1101] Update to 5.0.0

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This commit is contained in:
jgromes 2021-11-14 11:38:31 +01:00
parent ba1568669f
commit e82049587b
9 changed files with 633 additions and 631 deletions
examples/CC1101
CC1101_Receive
CC1101_Receive.ino
CC1101_Receive_Address
CC1101_Receive_Address.ino
CC1101_Receive_Interrupt
CC1101_Receive_Interrupt.ino
CC1101_Settings
CC1101_Settings.ino
CC1101_Transmit
CC1101_Transmit.ino
CC1101_Transmit_Address
CC1101_Transmit_Address.ino
CC1101_Transmit_Interrupt
CC1101_Transmit_Interrupt.ino
src/modules/CC1101
CC1101.cppCC1101.h

8
examples/CC1101/CC1101_Receive/CC1101_Receive.ino
View file

@ -36,7 +36,7 @@ void setup() {
// initialize CC1101 with default settings
Serial.print(F("[CC1101] Initializing ... "));
int state = radio.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -58,7 +58,7 @@ void loop() {
int state = radio.receive(byteArr, 8);
*/
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
// packet was successfully received
Serial.println(F("success!"));
@ -77,11 +77,11 @@ void loop() {
Serial.print(F("[CC1101] LQI:\t\t"));
Serial.println(radio.getLQI());
} else if (state == ERR_RX_TIMEOUT) {
} else if (state == RADIOLIB_ERR_RX_TIMEOUT) {
// timeout occurred while waiting for a packet
Serial.println(F("timeout!"));
} else if (state == ERR_CRC_MISMATCH) {
} else if (state == RADIOLIB_ERR_CRC_MISMATCH) {
// packet was received, but is malformed
Serial.println(F("CRC error!"));

10
examples/CC1101/CC1101_Receive_Address/CC1101_Receive_Address.ino
View file

@ -34,7 +34,7 @@ void setup() {
// initialize CC1101 with default settings
Serial.print(F("[CC1101] Initializing ... "));
int state = radio.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -51,7 +51,7 @@ void setup() {
// 0xFF will be used.
Serial.print(F("[CC1101] Setting node address ... "));
state = radio.setNodeAddress(0x01, 1);
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -65,7 +65,7 @@ void setup() {
/*
Serial.print(F("[CC1101] Disabling address filtering ... "));
state == radio.disableAddressFiltering();
if(state == ERR_NONE) {
if(state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -88,7 +88,7 @@ void loop() {
int state = radio.receive(byteArr, 8);
*/
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
// packet was successfully received
Serial.println(F("success!"));
@ -107,7 +107,7 @@ void loop() {
Serial.print(F("[CC1101] LQI:\t\t"));
Serial.println(radio.getLQI());
} else if (state == ERR_CRC_MISMATCH) {
} else if (state == RADIOLIB_ERR_CRC_MISMATCH) {
// packet was received, but is malformed
Serial.println(F("CRC error!"));

8
examples/CC1101/CC1101_Receive_Interrupt/CC1101_Receive_Interrupt.ino
View file

@ -39,7 +39,7 @@ void setup() {
// initialize CC1101 with default settings
Serial.print(F("[CC1101] Initializing ... "));
int state = radio.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -54,7 +54,7 @@ void setup() {
// start listening for packets
Serial.print(F("[CC1101] Starting to listen ... "));
state = radio.startReceive();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -112,7 +112,7 @@ void loop() {
int state = radio.readData(byteArr, 8);
*/
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
// packet was successfully received
Serial.println(F("[CC1101] Received packet!"));
@ -131,7 +131,7 @@ void loop() {
Serial.print(F("[CC1101] LQI:\t\t"));
Serial.println(radio.getLQI());
} else if (state == ERR_CRC_MISMATCH) {
} else if (state == RADIOLIB_ERR_CRC_MISMATCH) {
// packet was received, but is malformed
Serial.println(F("CRC error!"));

18
examples/CC1101/CC1101_Settings/CC1101_Settings.ino
View file

@ -45,7 +45,7 @@ void setup() {
// initialize CC1101 with default settings
Serial.print(F("[CC1101] Initializing ... "));
int state = radio1.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -62,7 +62,7 @@ void setup() {
// output power: 7 dBm
// preamble length: 32 bits
state = radio2.begin(434.0, 32.0, 60.0, 250.0, 7, 32);
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -74,42 +74,42 @@ void setup() {
// and check if the configuration was changed successfully
// set carrier frequency to 433.5 MHz
if (radio1.setFrequency(433.5) == ERR_INVALID_FREQUENCY) {
if (radio1.setFrequency(433.5) == RADIOLIB_ERR_INVALID_FREQUENCY) {
Serial.println(F("[CC1101] Selected frequency is invalid for this module!"));
while (true);
}
// set bit rate to 100.0 kbps
state = radio1.setBitRate(100.0);
if (state == ERR_INVALID_BIT_RATE) {
if (state == RADIOLIB_ERR_INVALID_BIT_RATE) {
Serial.println(F("[CC1101] Selected bit rate is invalid for this module!"));
while (true);
} else if (state == ERR_INVALID_BIT_RATE_BW_RATIO) {
} else if (state == RADIOLIB_ERR_INVALID_BIT_RATE_BW_RATIO) {
Serial.println(F("[CC1101] Selected bit rate to bandwidth ratio is invalid!"));
Serial.println(F("[CC1101] Increase receiver bandwidth to set this bit rate."));
while (true);
}
// set receiver bandwidth to 250.0 kHz
if (radio1.setRxBandwidth(250.0) == ERR_INVALID_RX_BANDWIDTH) {
if (radio1.setRxBandwidth(250.0) == RADIOLIB_ERR_INVALID_RX_BANDWIDTH) {
Serial.println(F("[CC1101] Selected receiver bandwidth is invalid for this module!"));
while (true);
}
// set allowed frequency deviation to 10.0 kHz
if (radio1.setFrequencyDeviation(10.0) == ERR_INVALID_FREQUENCY_DEVIATION) {
if (radio1.setFrequencyDeviation(10.0) == RADIOLIB_ERR_INVALID_FREQUENCY_DEVIATION) {
Serial.println(F("[CC1101] Selected frequency deviation is invalid for this module!"));
while (true);
}
// set output power to 5 dBm
if (radio1.setOutputPower(5) == ERR_INVALID_OUTPUT_POWER) {
if (radio1.setOutputPower(5) == RADIOLIB_ERR_INVALID_OUTPUT_POWER) {
Serial.println(F("[CC1101] Selected output power is invalid for this module!"));
while (true);
}
// 2 bytes can be set as sync word
if (radio1.setSyncWord(0x01, 0x23) == ERR_INVALID_SYNC_WORD) {
if (radio1.setSyncWord(0x01, 0x23) == RADIOLIB_ERR_INVALID_SYNC_WORD) {
Serial.println(F("[CC1101] Selected sync word is invalid for this module!"));
while (true);
}

6
examples/CC1101/CC1101_Transmit/CC1101_Transmit.ino
View file

@ -34,7 +34,7 @@ void setup() {
// initialize CC1101 with default settings
Serial.print(F("[CC1101] Initializing ... "));
int state = radio.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -55,11 +55,11 @@ void loop() {
int state = radio.transmit(byteArr, 8);
*/
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
// the packet was successfully transmitted
Serial.println(F("success!"));
} else if (state == ERR_PACKET_TOO_LONG) {
} else if (state == RADIOLIB_ERR_PACKET_TOO_LONG) {
// the supplied packet was longer than 64 bytes
Serial.println(F("too long!"));

10
examples/CC1101/CC1101_Transmit_Address/CC1101_Transmit_Address.ino
View file

@ -34,7 +34,7 @@ void setup() {
// initialize CC1101 with default settings
Serial.print(F("[CC1101] Initializing ... "));
int state = radio.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -51,7 +51,7 @@ void setup() {
// 0xFF will be used.
Serial.print(F("[CC1101] Setting node address ... "));
state = radio.setNodeAddress(0x01, 1);
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -65,7 +65,7 @@ void setup() {
/*
Serial.print(F("[CC1101] Disabling address filtering ... "));
state == radio.disableAddressFiltering();
if(state == ERR_NONE) {
if(state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -87,11 +87,11 @@ void loop() {
int state = radio.transmit(byteArr, 8);
*/
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
// the packet was successfully transmitted
Serial.println(F("success!"));
} else if (state == ERR_PACKET_TOO_LONG) {
} else if (state == RADIOLIB_ERR_PACKET_TOO_LONG) {
// the supplied packet was longer than 255 bytes
Serial.println(F("too long!"));

6
examples/CC1101/CC1101_Transmit_Interrupt/CC1101_Transmit_Interrupt.ino
View file

@ -30,7 +30,7 @@ CC1101 radio = new Module(10, 2, RADIOLIB_NC, 3);
//CC1101 radio = RadioShield.ModuleA;
// save transmission state between loops
int transmissionState = ERR_NONE;
int transmissionState = RADIOLIB_ERR_NONE;
void setup() {
Serial.begin(9600);
@ -38,7 +38,7 @@ void setup() {
// initialize CC1101 with default settings
Serial.print(F("[CC1101] Initializing ... "));
int state = radio.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -95,7 +95,7 @@ void loop() {
// reset flag
transmittedFlag = false;
if (transmissionState == ERR_NONE) {
if (transmissionState == RADIOLIB_ERR_NONE) {
// packet was successfully sent
Serial.println(F("transmission finished!"));

398
src/modules/CC1101/CC1101.cpp
View file

@ -1,29 +1,33 @@
#include "CC1101.h"
#if !defined(RADIOLIB_EXCLUDE_CC1101)
CC1101::CC1101(Module* module) : PhysicalLayer(CC1101_FREQUENCY_STEP_SIZE, CC1101_MAX_PACKET_LENGTH) {
CC1101::CC1101(Module* module) : PhysicalLayer(RADIOLIB_CC1101_FREQUENCY_STEP_SIZE, RADIOLIB_CC1101_MAX_PACKET_LENGTH) {
_mod = module;
}
Module* CC1101::getMod() {
return(_mod);
}
int16_t CC1101::begin(float freq, float br, float freqDev, float rxBw, int8_t power, uint8_t preambleLength) {
// set module properties
_mod->SPIreadCommand = CC1101_CMD_READ;
_mod->SPIwriteCommand = CC1101_CMD_WRITE;
_mod->init(RADIOLIB_USE_SPI);
Module::pinMode(_mod->getIrq(), INPUT);
_mod->SPIreadCommand = RADIOLIB_CC1101_CMD_READ;
_mod->SPIwriteCommand = RADIOLIB_CC1101_CMD_WRITE;
_mod->init();
_mod->pinMode(_mod->getIrq(), INPUT);
// try to find the CC1101 chip
uint8_t i = 0;
bool flagFound = false;
while((i < 10) && !flagFound) {
int16_t version = getChipVersion();
if((version == CC1101_VERSION_CURRENT) || (version == CC1101_VERSION_LEGACY) || (version == CC1101_VERSION_CLONE)) {
if((version == RADIOLIB_CC1101_VERSION_CURRENT) || (version == RADIOLIB_CC1101_VERSION_LEGACY) || (version == RADIOLIB_CC1101_VERSION_CLONE)) {
flagFound = true;
} else {
#ifdef RADIOLIB_DEBUG
#if defined(RADIOLIB_DEBUG)
RADIOLIB_DEBUG_PRINT(F("CC1101 not found! ("));
RADIOLIB_DEBUG_PRINT(i + 1);
RADIOLIB_DEBUG_PRINT(F(" of 10 tries) CC1101_REG_VERSION == "));
RADIOLIB_DEBUG_PRINT(F(" of 10 tries) RADIOLIB_CC1101_REG_VERSION == "));
char buffHex[7];
sprintf(buffHex, "0x%04X", version);
@ -31,15 +35,15 @@ int16_t CC1101::begin(float freq, float br, float freqDev, float rxBw, int8_t po
RADIOLIB_DEBUG_PRINT(F(", expected 0x0004/0x0014"));
RADIOLIB_DEBUG_PRINTLN();
#endif
Module::delay(10);
_mod->delay(10);
i++;
}
}
if(!flagFound) {
RADIOLIB_DEBUG_PRINTLN(F("No CC1101 found!"));
_mod->term(RADIOLIB_USE_SPI);
return(ERR_CHIP_NOT_FOUND);
_mod->term();
return(RADIOLIB_ERR_CHIP_NOT_FOUND);
} else {
RADIOLIB_DEBUG_PRINTLN(F("M\tCC1101"));
}
@ -89,8 +93,8 @@ int16_t CC1101::begin(float freq, float br, float freqDev, float rxBw, int8_t po
RADIOLIB_ASSERT(state);
// flush FIFOs
SPIsendCommand(CC1101_CMD_FLUSH_RX);
SPIsendCommand(CC1101_CMD_FLUSH_TX);
SPIsendCommand(RADIOLIB_CC1101_CMD_FLUSH_RX);
SPIsendCommand(RADIOLIB_CC1101_CMD_FLUSH_TX);
return(state);
}
@ -104,26 +108,26 @@ int16_t CC1101::transmit(uint8_t* data, size_t len, uint8_t addr) {
RADIOLIB_ASSERT(state);
// wait for transmission start or timeout
uint32_t start = Module::micros();
while(!Module::digitalRead(_mod->getIrq())) {
Module::yield();
uint32_t start = _mod->micros();
while(!_mod->digitalRead(_mod->getIrq())) {
_mod->yield();
if(Module::micros() - start > timeout) {
if(_mod->micros() - start > timeout) {
standby();
SPIsendCommand(CC1101_CMD_FLUSH_TX);
return(ERR_TX_TIMEOUT);
SPIsendCommand(RADIOLIB_CC1101_CMD_FLUSH_TX);
return(RADIOLIB_ERR_TX_TIMEOUT);
}
}
// wait for transmission end or timeout
start = Module::micros();
while(Module::digitalRead(_mod->getIrq())) {
Module::yield();
start = _mod->micros();
while(_mod->digitalRead(_mod->getIrq())) {
_mod->yield();
if(Module::micros() - start > timeout) {
if(_mod->micros() - start > timeout) {
standby();
SPIsendCommand(CC1101_CMD_FLUSH_TX);
return(ERR_TX_TIMEOUT);
SPIsendCommand(RADIOLIB_CC1101_CMD_FLUSH_TX);
return(RADIOLIB_ERR_TX_TIMEOUT);
}
}
@ -131,28 +135,28 @@ int16_t CC1101::transmit(uint8_t* data, size_t len, uint8_t addr) {
standby();
// flush Tx FIFO
SPIsendCommand(CC1101_CMD_FLUSH_TX);
SPIsendCommand(RADIOLIB_CC1101_CMD_FLUSH_TX);
return(state);
}
int16_t CC1101::receive(uint8_t* data, size_t len) {
// calculate timeout (500 ms + 400 full max-length packets at current bit rate)
uint32_t timeout = 500000 + (1.0/(_br*1000.0))*(CC1101_MAX_PACKET_LENGTH*400.0);
uint32_t timeout = 500000 + (1.0/(_br*1000.0))*(RADIOLIB_CC1101_MAX_PACKET_LENGTH*400.0);
// start reception
int16_t state = startReceive();
RADIOLIB_ASSERT(state);
// wait for packet or timeout
uint32_t start = Module::micros();
while(!Module::digitalRead(_mod->getIrq())) {
Module::yield();
uint32_t start = _mod->micros();
while(!_mod->digitalRead(_mod->getIrq())) {
_mod->yield();
if(Module::micros() - start > timeout) {
if(_mod->micros() - start > timeout) {
standby();
SPIsendCommand(CC1101_CMD_FLUSH_TX);
return(ERR_RX_TIMEOUT);
SPIsendCommand(RADIOLIB_CC1101_CMD_FLUSH_TX);
return(RADIOLIB_ERR_RX_TIMEOUT);
}
}
@ -162,11 +166,11 @@ int16_t CC1101::receive(uint8_t* data, size_t len) {
int16_t CC1101::standby() {
// set idle mode
SPIsendCommand(CC1101_CMD_IDLE);
SPIsendCommand(RADIOLIB_CC1101_CMD_IDLE);
// set RF switch (if present)
_mod->setRfSwitchState(LOW, LOW);
return(ERR_NONE);
return(RADIOLIB_ERR_NONE);
}
int16_t CC1101::transmitDirect(uint32_t frf) {
@ -175,11 +179,11 @@ int16_t CC1101::transmitDirect(uint32_t frf) {
// user requested to start transmitting immediately (required for RTTY)
if(frf != 0) {
SPIwriteRegister(CC1101_REG_FREQ2, (frf & 0xFF0000) >> 16);
SPIwriteRegister(CC1101_REG_FREQ1, (frf & 0x00FF00) >> 8);
SPIwriteRegister(CC1101_REG_FREQ0, frf & 0x0000FF);
SPIwriteRegister(RADIOLIB_CC1101_REG_FREQ2, (frf & 0xFF0000) >> 16);
SPIwriteRegister(RADIOLIB_CC1101_REG_FREQ1, (frf & 0x00FF00) >> 8);
SPIwriteRegister(RADIOLIB_CC1101_REG_FREQ0, frf & 0x0000FF);
SPIsendCommand(CC1101_CMD_TX);
SPIsendCommand(RADIOLIB_CC1101_CMD_TX);
}
// activate direct mode
@ -187,7 +191,7 @@ int16_t CC1101::transmitDirect(uint32_t frf) {
RADIOLIB_ASSERT(state);
// start transmitting
SPIsendCommand(CC1101_CMD_TX);
SPIsendCommand(RADIOLIB_CC1101_CMD_TX);
return(state);
}
@ -200,98 +204,98 @@ int16_t CC1101::receiveDirect() {
RADIOLIB_ASSERT(state);
// start receiving
SPIsendCommand(CC1101_CMD_RX);
return(ERR_NONE);
SPIsendCommand(RADIOLIB_CC1101_CMD_RX);
return(RADIOLIB_ERR_NONE);
}
int16_t CC1101::packetMode() {
int16_t state = SPIsetRegValue(CC1101_REG_PKTCTRL1, CC1101_CRC_AUTOFLUSH_OFF | CC1101_APPEND_STATUS_ON | CC1101_ADR_CHK_NONE, 3, 0);
state |= SPIsetRegValue(CC1101_REG_PKTCTRL0, CC1101_WHITE_DATA_OFF | CC1101_PKT_FORMAT_NORMAL, 6, 4);
state |= SPIsetRegValue(CC1101_REG_PKTCTRL0, CC1101_CRC_ON | _packetLengthConfig, 2, 0);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL1, RADIOLIB_CC1101_CRC_AUTOFLUSH_OFF | RADIOLIB_CC1101_APPEND_STATUS_ON | RADIOLIB_CC1101_ADR_CHK_NONE, 3, 0);
state |= SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_WHITE_DATA_OFF | RADIOLIB_CC1101_PKT_FORMAT_NORMAL, 6, 4);
state |= SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_CRC_ON | _packetLengthConfig, 2, 0);
return(state);
}
void CC1101::setGdo0Action(void (*func)(void), RADIOLIB_INTERRUPT_STATUS dir) {
Module::attachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()), func, dir);
_mod->attachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()), func, dir);
}
void CC1101::clearGdo0Action() {
Module::detachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()));
_mod->detachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()));
}
void CC1101::setGdo2Action(void (*func)(void), RADIOLIB_INTERRUPT_STATUS dir) {
if(_mod->getGpio() != RADIOLIB_NC) {
return;
}
Module::pinMode(_mod->getGpio(), INPUT);
Module::attachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getGpio()), func, dir);
_mod->pinMode(_mod->getGpio(), INPUT);
_mod->attachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getGpio()), func, dir);
}
void CC1101::clearGdo2Action() {
if(_mod->getGpio() != RADIOLIB_NC) {
return;
}
Module::detachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getGpio()));
_mod->detachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getGpio()));
}
int16_t CC1101::startTransmit(uint8_t* data, size_t len, uint8_t addr) {
// check packet length
if(len > CC1101_MAX_PACKET_LENGTH) {
return(ERR_PACKET_TOO_LONG);
if(len > RADIOLIB_CC1101_MAX_PACKET_LENGTH) {
return(RADIOLIB_ERR_PACKET_TOO_LONG);
}
// set mode to standby
standby();
// flush Tx FIFO
SPIsendCommand(CC1101_CMD_FLUSH_TX);
SPIsendCommand(RADIOLIB_CC1101_CMD_FLUSH_TX);
// set GDO0 mapping
int16_t state = SPIsetRegValue(CC1101_REG_IOCFG0, CC1101_GDOX_SYNC_WORD_SENT_OR_RECEIVED);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_IOCFG0, RADIOLIB_CC1101_GDOX_SYNC_WORD_SENT_OR_RECEIVED);
RADIOLIB_ASSERT(state);
// data put on FIFO.
uint8_t dataSent = 0;
// optionally write packet length
if (_packetLengthConfig == CC1101_LENGTH_CONFIG_VARIABLE) {
if (_packetLengthConfig == RADIOLIB_CC1101_LENGTH_CONFIG_VARIABLE) {
// enforce variable len limit.
if (len > CC1101_MAX_PACKET_LENGTH - 1) {
return (ERR_PACKET_TOO_LONG);
if (len > RADIOLIB_CC1101_MAX_PACKET_LENGTH - 1) {
return (RADIOLIB_ERR_PACKET_TOO_LONG);
}
SPIwriteRegister(CC1101_REG_FIFO, len);
SPIwriteRegister(RADIOLIB_CC1101_REG_FIFO, len);
dataSent += 1;
}
// check address filtering
uint8_t filter = SPIgetRegValue(CC1101_REG_PKTCTRL1, 1, 0);
if(filter != CC1101_ADR_CHK_NONE) {
SPIwriteRegister(CC1101_REG_FIFO, addr);
uint8_t filter = SPIgetRegValue(RADIOLIB_CC1101_REG_PKTCTRL1, 1, 0);
if(filter != RADIOLIB_CC1101_ADR_CHK_NONE) {
SPIwriteRegister(RADIOLIB_CC1101_REG_FIFO, addr);
dataSent += 1;
}
// fill the FIFO.
uint8_t initialWrite = min((uint8_t)len, (uint8_t)(CC1101_FIFO_SIZE - dataSent));
SPIwriteRegisterBurst(CC1101_REG_FIFO, data, initialWrite);
uint8_t initialWrite = min((uint8_t)len, (uint8_t)(RADIOLIB_CC1101_FIFO_SIZE - dataSent));
SPIwriteRegisterBurst(RADIOLIB_CC1101_REG_FIFO, data, initialWrite);
dataSent += initialWrite;
// set RF switch (if present)
_mod->setRfSwitchState(LOW, HIGH);
// set mode to transmit
SPIsendCommand(CC1101_CMD_TX);
SPIsendCommand(RADIOLIB_CC1101_CMD_TX);
// keep feeding the FIFO until the packet is over.
while (dataSent < len) {
// get number of bytes in FIFO.
uint8_t bytesInFIFO = SPIgetRegValue(CC1101_REG_TXBYTES, 6, 0);
uint8_t bytesInFIFO = SPIgetRegValue(RADIOLIB_CC1101_REG_TXBYTES, 6, 0);
// if there's room then put other data.
if (bytesInFIFO < CC1101_FIFO_SIZE) {
uint8_t bytesToWrite = min((uint8_t)(CC1101_FIFO_SIZE - bytesInFIFO), (uint8_t)(len - dataSent));
SPIwriteRegisterBurst(CC1101_REG_FIFO, &data[dataSent], bytesToWrite);
if (bytesInFIFO < RADIOLIB_CC1101_FIFO_SIZE) {
uint8_t bytesToWrite = min((uint8_t)(RADIOLIB_CC1101_FIFO_SIZE - bytesInFIFO), (uint8_t)(len - dataSent));
SPIwriteRegisterBurst(RADIOLIB_CC1101_REG_FIFO, &data[dataSent], bytesToWrite);
dataSent += bytesToWrite;
} else {
// wait for radio to send some data.
@ -313,18 +317,18 @@ int16_t CC1101::startReceive() {
standby();
// flush Rx FIFO
SPIsendCommand(CC1101_CMD_FLUSH_RX);
SPIsendCommand(RADIOLIB_CC1101_CMD_FLUSH_RX);
// set GDO0 mapping: Asserted when RX FIFO > 4 bytes.
int16_t state = SPIsetRegValue(CC1101_REG_IOCFG0, CC1101_GDOX_RX_FIFO_FULL_OR_PKT_END);
state |= SPIsetRegValue(CC1101_REG_FIFOTHR, CC1101_FIFO_THR_TX_61_RX_4, 3, 0);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_IOCFG0, RADIOLIB_CC1101_GDOX_RX_FIFO_FULL_OR_PKT_END);
state |= SPIsetRegValue(RADIOLIB_CC1101_REG_FIFOTHR, RADIOLIB_CC1101_FIFO_THR_TX_61_RX_4, 3, 0);
RADIOLIB_ASSERT(state);
// set RF switch (if present)
_mod->setRfSwitchState(HIGH, LOW);
// set mode to receive
SPIsendCommand(CC1101_CMD_RX);
SPIsendCommand(RADIOLIB_CC1101_CMD_RX);
return(state);
}
@ -332,17 +336,17 @@ int16_t CC1101::startReceive() {
int16_t CC1101::readData(uint8_t* data, size_t len) {
// get packet length
size_t length = len;
if (len == CC1101_MAX_PACKET_LENGTH) {
if (len == RADIOLIB_CC1101_MAX_PACKET_LENGTH) {
length = getPacketLength(true);
}
// check address filtering
uint8_t filter = SPIgetRegValue(CC1101_REG_PKTCTRL1, 1, 0);
if(filter != CC1101_ADR_CHK_NONE) {
SPIreadRegister(CC1101_REG_FIFO);
uint8_t filter = SPIgetRegValue(RADIOLIB_CC1101_REG_PKTCTRL1, 1, 0);
if(filter != RADIOLIB_CC1101_ADR_CHK_NONE) {
SPIreadRegister(RADIOLIB_CC1101_REG_FIFO);
}
uint8_t bytesInFIFO = SPIgetRegValue(CC1101_REG_RXBYTES, 6, 0);
uint8_t bytesInFIFO = SPIgetRegValue(RADIOLIB_CC1101_REG_RXBYTES, 6, 0);
size_t readBytes = 0;
uint32_t lastPop = millis();
@ -361,53 +365,53 @@ int16_t CC1101::readData(uint8_t* data, size_t len) {
* TODO: drop this delay(1) or come up with a better solution:
*/
delay(1);
bytesInFIFO = SPIgetRegValue(CC1101_REG_RXBYTES, 6, 0);
bytesInFIFO = SPIgetRegValue(RADIOLIB_CC1101_REG_RXBYTES, 6, 0);
continue;
}
}
// read the minimum between "remaining length" and bytesInFifo
uint8_t bytesToRead = min((uint8_t)(length - readBytes), bytesInFIFO);
SPIreadRegisterBurst(CC1101_REG_FIFO, bytesToRead, &(data[readBytes]));
SPIreadRegisterBurst(RADIOLIB_CC1101_REG_FIFO, bytesToRead, &(data[readBytes]));
readBytes += bytesToRead;
lastPop = millis();
// Get how many bytes are left in FIFO.
bytesInFIFO = SPIgetRegValue(CC1101_REG_RXBYTES, 6, 0);
bytesInFIFO = SPIgetRegValue(RADIOLIB_CC1101_REG_RXBYTES, 6, 0);
}
// check if status bytes are enabled (default: CC1101_APPEND_STATUS_ON)
bool isAppendStatus = SPIgetRegValue(CC1101_REG_PKTCTRL1, 2, 2) == CC1101_APPEND_STATUS_ON;
// check if status bytes are enabled (default: RADIOLIB_CC1101_APPEND_STATUS_ON)
bool isAppendStatus = SPIgetRegValue(RADIOLIB_CC1101_REG_PKTCTRL1, 2, 2) == RADIOLIB_CC1101_APPEND_STATUS_ON;
// If status byte is enabled at least 2 bytes (2 status bytes + any following packet) will remain in FIFO.
if (bytesInFIFO >= 2 && isAppendStatus) {
// read RSSI byte
_rawRSSI = SPIgetRegValue(CC1101_REG_FIFO);
_rawRSSI = SPIgetRegValue(RADIOLIB_CC1101_REG_FIFO);
// read LQI and CRC byte
uint8_t val = SPIgetRegValue(CC1101_REG_FIFO);
uint8_t val = SPIgetRegValue(RADIOLIB_CC1101_REG_FIFO);
_rawLQI = val & 0x7F;
// check CRC
if (_crcOn && (val & CC1101_CRC_OK) == CC1101_CRC_ERROR) {
return (ERR_CRC_MISMATCH);
if (_crcOn && (val & RADIOLIB_CC1101_CRC_OK) == RADIOLIB_CC1101_CRC_ERROR) {
return (RADIOLIB_ERR_CRC_MISMATCH);
}
}
// clear internal flag so getPacketLength can return the new packet length
_packetLengthQueried = false;
// Flush then standby according to RXOFF_MODE (default: CC1101_RXOFF_IDLE)
if (SPIgetRegValue(CC1101_REG_MCSM1, 3, 2) == CC1101_RXOFF_IDLE) {
// Flush then standby according to RXOFF_MODE (default: RADIOLIB_CC1101_RXOFF_IDLE)
if (SPIgetRegValue(RADIOLIB_CC1101_REG_MCSM1, 3, 2) == RADIOLIB_CC1101_RXOFF_IDLE) {
// flush Rx FIFO
SPIsendCommand(CC1101_CMD_FLUSH_RX);
SPIsendCommand(RADIOLIB_CC1101_CMD_FLUSH_RX);
// set mode to standby
standby();
}
return(ERR_NONE);
return(RADIOLIB_ERR_NONE);
}
int16_t CC1101::setFrequency(float freq) {
@ -415,20 +419,20 @@ int16_t CC1101::setFrequency(float freq) {
if(!(((freq > 300.0) && (freq < 348.0)) ||
((freq > 387.0) && (freq < 464.0)) ||
((freq > 779.0) && (freq < 928.0)))) {
return(ERR_INVALID_FREQUENCY);
return(RADIOLIB_ERR_INVALID_FREQUENCY);
}
// set mode to standby
SPIsendCommand(CC1101_CMD_IDLE);
SPIsendCommand(RADIOLIB_CC1101_CMD_IDLE);
//set carrier frequency
uint32_t base = 1;
uint32_t FRF = (freq * (base << 16)) / 26.0;
int16_t state = SPIsetRegValue(CC1101_REG_FREQ2, (FRF & 0xFF0000) >> 16, 7, 0);
state |= SPIsetRegValue(CC1101_REG_FREQ1, (FRF & 0x00FF00) >> 8, 7, 0);
state |= SPIsetRegValue(CC1101_REG_FREQ0, FRF & 0x0000FF, 7, 0);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_FREQ2, (FRF & 0xFF0000) >> 16, 7, 0);
state |= SPIsetRegValue(RADIOLIB_CC1101_REG_FREQ1, (FRF & 0x00FF00) >> 8, 7, 0);
state |= SPIsetRegValue(RADIOLIB_CC1101_REG_FREQ0, FRF & 0x0000FF, 7, 0);
if(state == ERR_NONE) {
if(state == RADIOLIB_ERR_NONE) {
_freq = freq;
}
@ -437,10 +441,10 @@ int16_t CC1101::setFrequency(float freq) {
}
int16_t CC1101::setBitRate(float br) {
RADIOLIB_CHECK_RANGE(br, 0.025, 600.0, ERR_INVALID_BIT_RATE);
RADIOLIB_CHECK_RANGE(br, 0.025, 600.0, RADIOLIB_ERR_INVALID_BIT_RATE);
// set mode to standby
SPIsendCommand(CC1101_CMD_IDLE);
SPIsendCommand(RADIOLIB_CC1101_CMD_IDLE);
// calculate exponent and mantissa values
uint8_t e = 0;
@ -448,32 +452,32 @@ int16_t CC1101::setBitRate(float br) {
getExpMant(br * 1000.0, 256, 28, 14, e, m);
// set bit rate value
int16_t state = SPIsetRegValue(CC1101_REG_MDMCFG4, e, 3, 0);
state |= SPIsetRegValue(CC1101_REG_MDMCFG3, m);
if(state == ERR_NONE) {
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG4, e, 3, 0);
state |= SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG3, m);
if(state == RADIOLIB_ERR_NONE) {
CC1101::_br = br;
}
return(state);
}
int16_t CC1101::setRxBandwidth(float rxBw) {
RADIOLIB_CHECK_RANGE(rxBw, 58.0, 812.0, ERR_INVALID_RX_BANDWIDTH);
RADIOLIB_CHECK_RANGE(rxBw, 58.0, 812.0, RADIOLIB_ERR_INVALID_RX_BANDWIDTH);
// set mode to standby
SPIsendCommand(CC1101_CMD_IDLE);
SPIsendCommand(RADIOLIB_CC1101_CMD_IDLE);
// calculate exponent and mantissa values
for(int8_t e = 3; e >= 0; e--) {
for(int8_t m = 3; m >= 0; m --) {
float point = (CC1101_CRYSTAL_FREQ * 1000000.0)/(8 * (m + 4) * ((uint32_t)1 << e));
float point = (RADIOLIB_CC1101_CRYSTAL_FREQ * 1000000.0)/(8 * (m + 4) * ((uint32_t)1 << e));
if((fabs(rxBw * 1000.0) - point) <= 1000) {
// set Rx channel filter bandwidth
return(SPIsetRegValue(CC1101_REG_MDMCFG4, (e << 6) | (m << 4), 7, 4));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG4, (e << 6) | (m << 4), 7, 4));
}
}
}
return(ERR_INVALID_RX_BANDWIDTH);
return(RADIOLIB_ERR_INVALID_RX_BANDWIDTH);
}
int16_t CC1101::setFrequencyDeviation(float freqDev) {
@ -483,10 +487,10 @@ int16_t CC1101::setFrequencyDeviation(float freqDev) {
newFreqDev = 1.587;
}
RADIOLIB_CHECK_RANGE(newFreqDev, 1.587, 380.8, ERR_INVALID_FREQUENCY_DEVIATION);
RADIOLIB_CHECK_RANGE(newFreqDev, 1.587, 380.8, RADIOLIB_ERR_INVALID_FREQUENCY_DEVIATION);
// set mode to standby
SPIsendCommand(CC1101_CMD_IDLE);
SPIsendCommand(RADIOLIB_CC1101_CMD_IDLE);
// calculate exponent and mantissa values
uint8_t e = 0;
@ -494,8 +498,8 @@ int16_t CC1101::setFrequencyDeviation(float freqDev) {
getExpMant(newFreqDev * 1000.0, 8, 17, 7, e, m);
// set frequency deviation value
int16_t state = SPIsetRegValue(CC1101_REG_DEVIATN, (e << 4), 6, 4);
state |= SPIsetRegValue(CC1101_REG_DEVIATN, m, 2, 0);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_DEVIATN, (e << 4), 6, 4);
state |= SPIsetRegValue(RADIOLIB_CC1101_REG_DEVIATN, m, 2, 0);
return(state);
}
@ -553,37 +557,37 @@ int16_t CC1101::setOutputPower(int8_t power) {
powerRaw = paTable[7][f];
break;
default:
return(ERR_INVALID_OUTPUT_POWER);
return(RADIOLIB_ERR_INVALID_OUTPUT_POWER);
}
// store the value
_power = power;
if(_modulation == CC1101_MOD_FORMAT_ASK_OOK){
if(_modulation == RADIOLIB_CC1101_MOD_FORMAT_ASK_OOK){
// Amplitude modulation:
// PA_TABLE[0] is the power to be used when transmitting a 0 (no power)
// PA_TABLE[1] is the power to be used when transmitting a 1 (full power)
uint8_t paValues[2] = {0x00, powerRaw};
SPIwriteRegisterBurst(CC1101_REG_PATABLE, paValues, 2);
return(ERR_NONE);
SPIwriteRegisterBurst(RADIOLIB_CC1101_REG_PATABLE, paValues, 2);
return(RADIOLIB_ERR_NONE);
} else {
// Freq modulation:
// PA_TABLE[0] is the power to be used when transmitting.
return(SPIsetRegValue(CC1101_REG_PATABLE, powerRaw));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_PATABLE, powerRaw));
}
}
int16_t CC1101::setSyncWord(uint8_t* syncWord, uint8_t len, uint8_t maxErrBits, bool requireCarrierSense) {
if((maxErrBits > 1) || (len != 2)) {
return(ERR_INVALID_SYNC_WORD);
return(RADIOLIB_ERR_INVALID_SYNC_WORD);
}
// sync word must not contain value 0x00
for(uint8_t i = 0; i < len; i++) {
if(syncWord[i] == 0x00) {
return(ERR_INVALID_SYNC_WORD);
return(RADIOLIB_ERR_INVALID_SYNC_WORD);
}
}
@ -594,8 +598,8 @@ int16_t CC1101::setSyncWord(uint8_t* syncWord, uint8_t len, uint8_t maxErrBits,
RADIOLIB_ASSERT(state);
// set sync word register
state = SPIsetRegValue(CC1101_REG_SYNC1, syncWord[0]);
state |= SPIsetRegValue(CC1101_REG_SYNC0, syncWord[1]);
state = SPIsetRegValue(RADIOLIB_CC1101_REG_SYNC1, syncWord[0]);
state |= SPIsetRegValue(RADIOLIB_CC1101_REG_SYNC0, syncWord[1]);
return(state);
}
@ -610,82 +614,82 @@ int16_t CC1101::setPreambleLength(uint8_t preambleLength) {
uint8_t value;
switch(preambleLength){
case 16:
value = CC1101_NUM_PREAMBLE_2;
value = RADIOLIB_CC1101_NUM_PREAMBLE_2;
break;
case 24:
value = CC1101_NUM_PREAMBLE_3;
value = RADIOLIB_CC1101_NUM_PREAMBLE_3;
break;
case 32:
value = CC1101_NUM_PREAMBLE_4;
value = RADIOLIB_CC1101_NUM_PREAMBLE_4;
break;
case 48:
value = CC1101_NUM_PREAMBLE_6;
value = RADIOLIB_CC1101_NUM_PREAMBLE_6;
break;
case 64:
value = CC1101_NUM_PREAMBLE_8;
value = RADIOLIB_CC1101_NUM_PREAMBLE_8;
break;
case 96:
value = CC1101_NUM_PREAMBLE_12;
value = RADIOLIB_CC1101_NUM_PREAMBLE_12;
break;
case 128:
value = CC1101_NUM_PREAMBLE_16;
value = RADIOLIB_CC1101_NUM_PREAMBLE_16;
break;
case 192:
value = CC1101_NUM_PREAMBLE_24;
value = RADIOLIB_CC1101_NUM_PREAMBLE_24;
break;
default:
return(ERR_INVALID_PREAMBLE_LENGTH);
return(RADIOLIB_ERR_INVALID_PREAMBLE_LENGTH);
}
return SPIsetRegValue(CC1101_REG_MDMCFG1, value, 6, 4);
return SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG1, value, 6, 4);
}
int16_t CC1101::setNodeAddress(uint8_t nodeAddr, uint8_t numBroadcastAddrs) {
RADIOLIB_CHECK_RANGE(numBroadcastAddrs, 1, 2, ERR_INVALID_NUM_BROAD_ADDRS);
RADIOLIB_CHECK_RANGE(numBroadcastAddrs, 1, 2, RADIOLIB_ERR_INVALID_NUM_BROAD_ADDRS);
// enable address filtering
int16_t state = SPIsetRegValue(CC1101_REG_PKTCTRL1, numBroadcastAddrs + 0x01, 1, 0);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL1, numBroadcastAddrs + 0x01, 1, 0);
RADIOLIB_ASSERT(state);
// set node address
return(SPIsetRegValue(CC1101_REG_ADDR, nodeAddr));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_ADDR, nodeAddr));
}
int16_t CC1101::disableAddressFiltering() {
// disable address filtering
int16_t state = SPIsetRegValue(CC1101_REG_PKTCTRL1, CC1101_ADR_CHK_NONE, 1, 0);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL1, RADIOLIB_CC1101_ADR_CHK_NONE, 1, 0);
RADIOLIB_ASSERT(state);
// set node address to default (0x00)
return(SPIsetRegValue(CC1101_REG_ADDR, 0x00));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_ADDR, 0x00));
}
int16_t CC1101::setOOK(bool enableOOK) {
// Change modulation
if(enableOOK) {
int16_t state = SPIsetRegValue(CC1101_REG_MDMCFG2, CC1101_MOD_FORMAT_ASK_OOK, 6, 4);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG2, RADIOLIB_CC1101_MOD_FORMAT_ASK_OOK, 6, 4);
RADIOLIB_ASSERT(state);
// PA_TABLE[0] is (by default) the power value used when transmitting a "0".
// Set PA_TABLE[1] to be used when transmitting a "1".
state = SPIsetRegValue(CC1101_REG_FREND0, 1, 2, 0);
state = SPIsetRegValue(RADIOLIB_CC1101_REG_FREND0, 1, 2, 0);
RADIOLIB_ASSERT(state);
// update current modulation
_modulation = CC1101_MOD_FORMAT_ASK_OOK;
_modulation = RADIOLIB_CC1101_MOD_FORMAT_ASK_OOK;
} else {
int16_t state = SPIsetRegValue(CC1101_REG_MDMCFG2, CC1101_MOD_FORMAT_2_FSK, 6, 4);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG2, RADIOLIB_CC1101_MOD_FORMAT_2_FSK, 6, 4);
RADIOLIB_ASSERT(state);
// Reset FREND0 to default value.
state = SPIsetRegValue(CC1101_REG_FREND0, 0, 2, 0);
state = SPIsetRegValue(RADIOLIB_CC1101_REG_FREND0, 0, 2, 0);
RADIOLIB_ASSERT(state);
// update current modulation
_modulation = CC1101_MOD_FORMAT_2_FSK;
_modulation = RADIOLIB_CC1101_MOD_FORMAT_2_FSK;
}
// Update PA_TABLE values according to the new _modulation.
@ -708,10 +712,10 @@ uint8_t CC1101::getLQI() const {
size_t CC1101::getPacketLength(bool update) {
if(!_packetLengthQueried && update) {
if (_packetLengthConfig == CC1101_LENGTH_CONFIG_VARIABLE) {
_packetLength = SPIreadRegister(CC1101_REG_FIFO);
if (_packetLengthConfig == RADIOLIB_CC1101_LENGTH_CONFIG_VARIABLE) {
_packetLength = SPIreadRegister(RADIOLIB_CC1101_REG_FIFO);
} else {
_packetLength = SPIreadRegister(CC1101_REG_PKTLEN);
_packetLength = SPIreadRegister(RADIOLIB_CC1101_REG_PKTLEN);
}
_packetLengthQueried = true;
@ -721,42 +725,42 @@ size_t CC1101::getPacketLength(bool update) {
}
int16_t CC1101::fixedPacketLengthMode(uint8_t len) {
return(setPacketMode(CC1101_LENGTH_CONFIG_FIXED, len));
return(setPacketMode(RADIOLIB_CC1101_LENGTH_CONFIG_FIXED, len));
}
int16_t CC1101::variablePacketLengthMode(uint8_t maxLen) {
return(setPacketMode(CC1101_LENGTH_CONFIG_VARIABLE, maxLen));
return(setPacketMode(RADIOLIB_CC1101_LENGTH_CONFIG_VARIABLE, maxLen));
}
int16_t CC1101::enableSyncWordFiltering(uint8_t maxErrBits, bool requireCarrierSense) {
switch(maxErrBits){
case 0:
// in 16 bit sync word, expect all 16 bits
return(SPIsetRegValue(CC1101_REG_MDMCFG2, (requireCarrierSense ? CC1101_SYNC_MODE_16_16_THR : CC1101_SYNC_MODE_16_16), 2, 0));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG2, (requireCarrierSense ? RADIOLIB_CC1101_SYNC_MODE_16_16_THR : RADIOLIB_CC1101_SYNC_MODE_16_16), 2, 0));
case 1:
// in 16 bit sync word, expect at least 15 bits
return(SPIsetRegValue(CC1101_REG_MDMCFG2, (requireCarrierSense ? CC1101_SYNC_MODE_15_16_THR : CC1101_SYNC_MODE_15_16), 2, 0));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG2, (requireCarrierSense ? RADIOLIB_CC1101_SYNC_MODE_15_16_THR : RADIOLIB_CC1101_SYNC_MODE_15_16), 2, 0));
default:
return(ERR_INVALID_SYNC_WORD);
return(RADIOLIB_ERR_INVALID_SYNC_WORD);
}
}
int16_t CC1101::disableSyncWordFiltering(bool requireCarrierSense) {
return(SPIsetRegValue(CC1101_REG_MDMCFG2, (requireCarrierSense ? CC1101_SYNC_MODE_NONE_THR : CC1101_SYNC_MODE_NONE), 2, 0));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG2, (requireCarrierSense ? RADIOLIB_CC1101_SYNC_MODE_NONE_THR : RADIOLIB_CC1101_SYNC_MODE_NONE), 2, 0));
}
int16_t CC1101::setCrcFiltering(bool crcOn) {
_crcOn = crcOn;
if (crcOn == true) {
return(SPIsetRegValue(CC1101_REG_PKTCTRL0, CC1101_CRC_ON, 2, 2));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_CRC_ON, 2, 2));
} else {
return(SPIsetRegValue(CC1101_REG_PKTCTRL0, CC1101_CRC_OFF, 2, 2));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_CRC_OFF, 2, 2));
}
}
int16_t CC1101::setPromiscuousMode(bool promiscuous) {
int16_t state = ERR_NONE;
int16_t state = RADIOLIB_ERR_NONE;
if (_promiscuous == promiscuous) {
return(state);
@ -795,13 +799,13 @@ int16_t CC1101::setDataShaping(uint8_t sh) {
// set data shaping
switch(sh) {
case RADIOLIB_SHAPING_NONE:
state = SPIsetRegValue(CC1101_REG_MDMCFG2, CC1101_MOD_FORMAT_2_FSK, 6, 4);
state = SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG2, RADIOLIB_CC1101_MOD_FORMAT_2_FSK, 6, 4);
break;
case RADIOLIB_SHAPING_0_5:
state = SPIsetRegValue(CC1101_REG_MDMCFG2, CC1101_MOD_FORMAT_GFSK, 6, 4);
state = SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG2, RADIOLIB_CC1101_MOD_FORMAT_GFSK, 6, 4);
break;
default:
return(ERR_INVALID_DATA_SHAPING);
return(RADIOLIB_ERR_INVALID_DATA_SHAPING);
}
return(state);
}
@ -814,19 +818,19 @@ int16_t CC1101::setEncoding(uint8_t encoding) {
// set encoding
switch(encoding) {
case RADIOLIB_ENCODING_NRZ:
state = SPIsetRegValue(CC1101_REG_MDMCFG2, CC1101_MANCHESTER_EN_OFF, 3, 3);
state = SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG2, RADIOLIB_CC1101_MANCHESTER_EN_OFF, 3, 3);
RADIOLIB_ASSERT(state);
return(SPIsetRegValue(CC1101_REG_PKTCTRL0, CC1101_WHITE_DATA_OFF, 6, 6));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_WHITE_DATA_OFF, 6, 6));
case RADIOLIB_ENCODING_MANCHESTER:
state = SPIsetRegValue(CC1101_REG_MDMCFG2, CC1101_MANCHESTER_EN_ON, 3, 3);
state = SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG2, RADIOLIB_CC1101_MANCHESTER_EN_ON, 3, 3);
RADIOLIB_ASSERT(state);
return(SPIsetRegValue(CC1101_REG_PKTCTRL0, CC1101_WHITE_DATA_OFF, 6, 6));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_WHITE_DATA_OFF, 6, 6));
case RADIOLIB_ENCODING_WHITENING:
state = SPIsetRegValue(CC1101_REG_MDMCFG2, CC1101_MANCHESTER_EN_OFF, 3, 3);
state = SPIsetRegValue(RADIOLIB_CC1101_REG_MDMCFG2, RADIOLIB_CC1101_MANCHESTER_EN_OFF, 3, 3);
RADIOLIB_ASSERT(state);
return(SPIsetRegValue(CC1101_REG_PKTCTRL0, CC1101_WHITE_DATA_ON, 6, 6));
return(SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_WHITE_DATA_ON, 6, 6));
default:
return(ERR_INVALID_ENCODING);
return(RADIOLIB_ERR_INVALID_ENCODING);
}
}
@ -836,26 +840,26 @@ void CC1101::setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn) {
uint8_t CC1101::randomByte() {
// set mode to Rx
SPIsendCommand(CC1101_CMD_RX);
SPIsendCommand(RADIOLIB_CC1101_CMD_RX);
RADIOLIB_DEBUG_PRINTLN("random");
// wait a bit for the RSSI reading to stabilise
Module::delay(10);
_mod->delay(10);
// read RSSI value 8 times, always keep just the least significant bit
uint8_t randByte = 0x00;
for(uint8_t i = 0; i < 8; i++) {
randByte |= ((SPIreadRegister(CC1101_REG_RSSI) & 0x01) << i);
randByte |= ((SPIreadRegister(RADIOLIB_CC1101_REG_RSSI) & 0x01) << i);
}
// set mode to standby
SPIsendCommand(CC1101_CMD_IDLE);
SPIsendCommand(RADIOLIB_CC1101_CMD_IDLE);
return(randByte);
}
int16_t CC1101::getChipVersion() {
return(SPIgetRegValue(CC1101_REG_VERSION));
return(SPIgetRegValue(RADIOLIB_CC1101_REG_VERSION));
}
void CC1101::setDirectAction(void (*func)(void)) {
@ -868,13 +872,13 @@ void CC1101::readBit(RADIOLIB_PIN_TYPE pin) {
int16_t CC1101::config() {
// Reset the radio. Registers may be dirty from previous usage.
SPIsendCommand(CC1101_CMD_RESET);
SPIsendCommand(RADIOLIB_CC1101_CMD_RESET);
// Wait a ridiculous amount of time to be sure radio is ready.
Module::delay(150);
_mod->delay(150);
// enable automatic frequency synthesizer calibration
int16_t state = SPIsetRegValue(CC1101_REG_MCSM0, CC1101_FS_AUTOCAL_IDLE_TO_RXTX, 5, 4);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_MCSM0, RADIOLIB_CC1101_FS_AUTOCAL_IDLE_TO_RXTX, 5, 4);
RADIOLIB_ASSERT(state);
// set packet mode
@ -885,21 +889,21 @@ int16_t CC1101::config() {
int16_t CC1101::directMode() {
// set mode to standby
SPIsendCommand(CC1101_CMD_IDLE);
SPIsendCommand(RADIOLIB_CC1101_CMD_IDLE);
// set GDO0 and GDO2 mapping
int16_t state = SPIsetRegValue(CC1101_REG_IOCFG0, CC1101_GDOX_SERIAL_CLOCK , 5, 0);
state |= SPIsetRegValue(CC1101_REG_IOCFG2, CC1101_GDOX_SERIAL_DATA_SYNC , 5, 0);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_IOCFG0, RADIOLIB_CC1101_GDOX_SERIAL_CLOCK , 5, 0);
state |= SPIsetRegValue(RADIOLIB_CC1101_REG_IOCFG2, RADIOLIB_CC1101_GDOX_SERIAL_DATA_SYNC , 5, 0);
// set continuous mode
state |= SPIsetRegValue(CC1101_REG_PKTCTRL0, CC1101_PKT_FORMAT_SYNCHRONOUS, 5, 4);
state |= SPIsetRegValue(CC1101_REG_PKTCTRL0, CC1101_LENGTH_CONFIG_INFINITE, 1, 0);
state |= SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_PKT_FORMAT_SYNCHRONOUS, 5, 4);
state |= SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, RADIOLIB_CC1101_LENGTH_CONFIG_INFINITE, 1, 0);
return(state);
}
void CC1101::getExpMant(float target, uint16_t mantOffset, uint8_t divExp, uint8_t expMax, uint8_t& exp, uint8_t& mant) {
// get table origin point (exp = 0, mant = 0)
float origin = (mantOffset * CC1101_CRYSTAL_FREQ * 1000000.0)/((uint32_t)1 << divExp);
float origin = (mantOffset * RADIOLIB_CC1101_CRYSTAL_FREQ * 1000000.0)/((uint32_t)1 << divExp);
// iterate over possible exponent values
for(int8_t e = expMax; e >= 0; e--) {
@ -925,16 +929,16 @@ void CC1101::getExpMant(float target, uint16_t mantOffset, uint8_t divExp, uint8
int16_t CC1101::setPacketMode(uint8_t mode, uint16_t len) {
// check length
if (len > CC1101_MAX_PACKET_LENGTH) {
return(ERR_PACKET_TOO_LONG);
if (len > RADIOLIB_CC1101_MAX_PACKET_LENGTH) {
return(RADIOLIB_ERR_PACKET_TOO_LONG);
}
// set PKTCTRL0.LENGTH_CONFIG
int16_t state = SPIsetRegValue(CC1101_REG_PKTCTRL0, mode, 1, 0);
int16_t state = SPIsetRegValue(RADIOLIB_CC1101_REG_PKTCTRL0, mode, 1, 0);
RADIOLIB_ASSERT(state);
// set length to register
state = SPIsetRegValue(CC1101_REG_PKTLEN, len);
state = SPIsetRegValue(RADIOLIB_CC1101_REG_PKTLEN, len);
RADIOLIB_ASSERT(state);
// update the cached value
@ -945,8 +949,8 @@ int16_t CC1101::setPacketMode(uint8_t mode, uint16_t len) {
int16_t CC1101::SPIgetRegValue(uint8_t reg, uint8_t msb, uint8_t lsb) {
// status registers require special command
if(reg > CC1101_REG_TEST0) {
reg |= CC1101_CMD_ACCESS_STATUS_REG;
if(reg > RADIOLIB_CC1101_REG_TEST0) {
reg |= RADIOLIB_CC1101_CMD_ACCESS_STATUS_REG;
}
return(_mod->SPIgetRegValue(reg, msb, lsb));
@ -954,21 +958,21 @@ int16_t CC1101::SPIgetRegValue(uint8_t reg, uint8_t msb, uint8_t lsb) {
int16_t CC1101::SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb, uint8_t lsb, uint8_t checkInterval) {
// status registers require special command
if(reg > CC1101_REG_TEST0) {
reg |= CC1101_CMD_ACCESS_STATUS_REG;
if(reg > RADIOLIB_CC1101_REG_TEST0) {
reg |= RADIOLIB_CC1101_CMD_ACCESS_STATUS_REG;
}
return(_mod->SPIsetRegValue(reg, value, msb, lsb, checkInterval));
}
void CC1101::SPIreadRegisterBurst(uint8_t reg, uint8_t numBytes, uint8_t* inBytes) {
_mod->SPIreadRegisterBurst(reg | CC1101_CMD_BURST, numBytes, inBytes);
_mod->SPIreadRegisterBurst(reg | RADIOLIB_CC1101_CMD_BURST, numBytes, inBytes);
}
uint8_t CC1101::SPIreadRegister(uint8_t reg) {
// status registers require special command
if(reg > CC1101_REG_TEST0) {
reg |= CC1101_CMD_ACCESS_STATUS_REG;
if(reg > RADIOLIB_CC1101_REG_TEST0) {
reg |= RADIOLIB_CC1101_CMD_ACCESS_STATUS_REG;
}
return(_mod->SPIreadRegister(reg));
@ -976,34 +980,30 @@ uint8_t CC1101::SPIreadRegister(uint8_t reg) {
void CC1101::SPIwriteRegister(uint8_t reg, uint8_t data) {
// status registers require special command
if(reg > CC1101_REG_TEST0) {
reg |= CC1101_CMD_ACCESS_STATUS_REG;
if(reg > RADIOLIB_CC1101_REG_TEST0) {
reg |= RADIOLIB_CC1101_CMD_ACCESS_STATUS_REG;
}
return(_mod->SPIwriteRegister(reg, data));
}
void CC1101::SPIwriteRegisterBurst(uint8_t reg, uint8_t* data, size_t len) {
_mod->SPIwriteRegisterBurst(reg | CC1101_CMD_BURST, data, len);
_mod->SPIwriteRegisterBurst(reg | RADIOLIB_CC1101_CMD_BURST, data, len);
}
void CC1101::SPIsendCommand(uint8_t cmd) {
// get pointer to used SPI interface and the settings
SPIClass* spi = _mod->getSpi();
SPISettings spiSettings = _mod->getSpiSettings();
// pull NSS low
Module::digitalWrite(_mod->getCs(), LOW);
_mod->digitalWrite(_mod->getCs(), LOW);
// start transfer
spi->beginTransaction(spiSettings);
_mod->SPIbeginTransaction();
// send the command byte
spi->transfer(cmd);
_mod->SPItransfer(cmd);
// stop transfer
spi->endTransaction();
Module::digitalWrite(_mod->getCs(), HIGH);
_mod->SPIendTransaction();
_mod->digitalWrite(_mod->getCs(), HIGH);
}
#endif

800
src/modules/CC1101/CC1101.h
View file

@ -7,497 +7,497 @@
#include "../../protocols/PhysicalLayer/PhysicalLayer.h"
// CC1101 physical layer properties
#define CC1101_FREQUENCY_STEP_SIZE 396.7285156
#define CC1101_MAX_PACKET_LENGTH 255
#define CC1101_CRYSTAL_FREQ 26.0
#define CC1101_DIV_EXPONENT 16
#define CC1101_FIFO_SIZE 64
#define RADIOLIB_CC1101_FREQUENCY_STEP_SIZE 396.7285156
#define RADIOLIB_CC1101_MAX_PACKET_LENGTH 255
#define RADIOLIB_CC1101_CRYSTAL_FREQ 26.0
#define RADIOLIB_CC1101_DIV_EXPONENT 16
#define RADIOLIB_CC1101_FIFO_SIZE 64
// CC1101 SPI commands
#define CC1101_CMD_READ 0b10000000
#define CC1101_CMD_WRITE 0b00000000
#define CC1101_CMD_BURST 0b01000000
#define CC1101_CMD_ACCESS_STATUS_REG 0b01000000
#define CC1101_CMD_FIFO_RX 0b10000000
#define CC1101_CMD_FIFO_TX 0b00000000
#define CC1101_CMD_RESET 0x30
#define CC1101_CMD_FSTXON 0x31
#define CC1101_CMD_XOFF 0x32
#define CC1101_CMD_CAL 0x33
#define CC1101_CMD_RX 0x34
#define CC1101_CMD_TX 0x35
#define CC1101_CMD_IDLE 0x36
#define CC1101_CMD_WOR 0x38
#define CC1101_CMD_POWER_DOWN 0x39
#define CC1101_CMD_FLUSH_RX 0x3A
#define CC1101_CMD_FLUSH_TX 0x3B
#define CC1101_CMD_WOR_RESET 0x3C
#define CC1101_CMD_NOP 0x3D
#define RADIOLIB_CC1101_CMD_READ 0b10000000
#define RADIOLIB_CC1101_CMD_WRITE 0b00000000
#define RADIOLIB_CC1101_CMD_BURST 0b01000000
#define RADIOLIB_CC1101_CMD_ACCESS_STATUS_REG 0b01000000
#define RADIOLIB_CC1101_CMD_FIFO_RX 0b10000000
#define RADIOLIB_CC1101_CMD_FIFO_TX 0b00000000
#define RADIOLIB_CC1101_CMD_RESET 0x30
#define RADIOLIB_CC1101_CMD_FSTXON 0x31
#define RADIOLIB_CC1101_CMD_XOFF 0x32
#define RADIOLIB_CC1101_CMD_CAL 0x33
#define RADIOLIB_CC1101_CMD_RX 0x34
#define RADIOLIB_CC1101_CMD_TX 0x35
#define RADIOLIB_CC1101_CMD_IDLE 0x36
#define RADIOLIB_CC1101_CMD_WOR 0x38
#define RADIOLIB_CC1101_CMD_POWER_DOWN 0x39
#define RADIOLIB_CC1101_CMD_FLUSH_RX 0x3A
#define RADIOLIB_CC1101_CMD_FLUSH_TX 0x3B
#define RADIOLIB_CC1101_CMD_WOR_RESET 0x3C
#define RADIOLIB_CC1101_CMD_NOP 0x3D
// CC1101 register map
#define CC1101_REG_IOCFG2 0x00
#define CC1101_REG_IOCFG1 0x01
#define CC1101_REG_IOCFG0 0x02
#define CC1101_REG_FIFOTHR 0x03
#define CC1101_REG_SYNC1 0x04
#define CC1101_REG_SYNC0 0x05
#define CC1101_REG_PKTLEN 0x06
#define CC1101_REG_PKTCTRL1 0x07
#define CC1101_REG_PKTCTRL0 0x08
#define CC1101_REG_ADDR 0x09
#define CC1101_REG_CHANNR 0x0A
#define CC1101_REG_FSCTRL1 0x0B
#define CC1101_REG_FSCTRL0 0x0C
#define CC1101_REG_FREQ2 0x0D
#define CC1101_REG_FREQ1 0x0E
#define CC1101_REG_FREQ0 0x0F
#define CC1101_REG_MDMCFG4 0x10
#define CC1101_REG_MDMCFG3 0x11
#define CC1101_REG_MDMCFG2 0x12
#define CC1101_REG_MDMCFG1 0x13
#define CC1101_REG_MDMCFG0 0x14
#define CC1101_REG_DEVIATN 0x15
#define CC1101_REG_MCSM2 0x16
#define CC1101_REG_MCSM1 0x17
#define CC1101_REG_MCSM0 0x18
#define CC1101_REG_FOCCFG 0x19
#define CC1101_REG_BSCFG 0x1A
#define CC1101_REG_AGCCTRL2 0x1B
#define CC1101_REG_AGCCTRL1 0x1C
#define CC1101_REG_AGCCTRL0 0x1D
#define CC1101_REG_WOREVT1 0x1E
#define CC1101_REG_WOREVT0 0x1F
#define CC1101_REG_WORCTRL 0x20
#define CC1101_REG_FREND1 0x21
#define CC1101_REG_FREND0 0x22
#define CC1101_REG_FSCAL3 0x23
#define CC1101_REG_FSCAL2 0x24
#define CC1101_REG_FSCAL1 0x25
#define CC1101_REG_FSCAL0 0x26
#define CC1101_REG_RCCTRL1 0x27
#define CC1101_REG_RCCTRL0 0x28
#define CC1101_REG_FSTEST 0x29
#define CC1101_REG_PTEST 0x2A
#define CC1101_REG_AGCTEST 0x2B
#define CC1101_REG_TEST2 0x2C
#define CC1101_REG_TEST1 0x2D
#define CC1101_REG_TEST0 0x2E
#define CC1101_REG_PARTNUM 0x30
#define CC1101_REG_VERSION 0x31
#define CC1101_REG_FREQEST 0x32
#define CC1101_REG_LQI 0x33
#define CC1101_REG_RSSI 0x34
#define CC1101_REG_MARCSTATE 0x35
#define CC1101_REG_WORTIME1 0x36
#define CC1101_REG_WORTIME0 0x37
#define CC1101_REG_PKTSTATUS 0x38
#define CC1101_REG_VCO_VC_DAC 0x39
#define CC1101_REG_TXBYTES 0x3A
#define CC1101_REG_RXBYTES 0x3B
#define CC1101_REG_RCCTRL1_STATUS 0x3C
#define CC1101_REG_RCCTRL0_STATUS 0x3D
#define CC1101_REG_PATABLE 0x3E
#define CC1101_REG_FIFO 0x3F
#define RADIOLIB_CC1101_REG_IOCFG2 0x00
#define RADIOLIB_CC1101_REG_IOCFG1 0x01
#define RADIOLIB_CC1101_REG_IOCFG0 0x02
#define RADIOLIB_CC1101_REG_FIFOTHR 0x03
#define RADIOLIB_CC1101_REG_SYNC1 0x04
#define RADIOLIB_CC1101_REG_SYNC0 0x05
#define RADIOLIB_CC1101_REG_PKTLEN 0x06
#define RADIOLIB_CC1101_REG_PKTCTRL1 0x07
#define RADIOLIB_CC1101_REG_PKTCTRL0 0x08
#define RADIOLIB_CC1101_REG_ADDR 0x09
#define RADIOLIB_CC1101_REG_CHANNR 0x0A
#define RADIOLIB_CC1101_REG_FSCTRL1 0x0B
#define RADIOLIB_CC1101_REG_FSCTRL0 0x0C
#define RADIOLIB_CC1101_REG_FREQ2 0x0D
#define RADIOLIB_CC1101_REG_FREQ1 0x0E
#define RADIOLIB_CC1101_REG_FREQ0 0x0F
#define RADIOLIB_CC1101_REG_MDMCFG4 0x10
#define RADIOLIB_CC1101_REG_MDMCFG3 0x11
#define RADIOLIB_CC1101_REG_MDMCFG2 0x12
#define RADIOLIB_CC1101_REG_MDMCFG1 0x13
#define RADIOLIB_CC1101_REG_MDMCFG0 0x14
#define RADIOLIB_CC1101_REG_DEVIATN 0x15
#define RADIOLIB_CC1101_REG_MCSM2 0x16
#define RADIOLIB_CC1101_REG_MCSM1 0x17
#define RADIOLIB_CC1101_REG_MCSM0 0x18
#define RADIOLIB_CC1101_REG_FOCCFG 0x19
#define RADIOLIB_CC1101_REG_BSCFG 0x1A
#define RADIOLIB_CC1101_REG_AGCCTRL2 0x1B
#define RADIOLIB_CC1101_REG_AGCCTRL1 0x1C
#define RADIOLIB_CC1101_REG_AGCCTRL0 0x1D
#define RADIOLIB_CC1101_REG_WOREVT1 0x1E
#define RADIOLIB_CC1101_REG_WOREVT0 0x1F
#define RADIOLIB_CC1101_REG_WORCTRL 0x20
#define RADIOLIB_CC1101_REG_FREND1 0x21
#define RADIOLIB_CC1101_REG_FREND0 0x22
#define RADIOLIB_CC1101_REG_FSCAL3 0x23
#define RADIOLIB_CC1101_REG_FSCAL2 0x24
#define RADIOLIB_CC1101_REG_FSCAL1 0x25
#define RADIOLIB_CC1101_REG_FSCAL0 0x26
#define RADIOLIB_CC1101_REG_RCCTRL1 0x27
#define RADIOLIB_CC1101_REG_RCCTRL0 0x28
#define RADIOLIB_CC1101_REG_FSTEST 0x29
#define RADIOLIB_CC1101_REG_PTEST 0x2A
#define RADIOLIB_CC1101_REG_AGCTEST 0x2B
#define RADIOLIB_CC1101_REG_TEST2 0x2C
#define RADIOLIB_CC1101_REG_TEST1 0x2D
#define RADIOLIB_CC1101_REG_TEST0 0x2E
#define RADIOLIB_CC1101_REG_PARTNUM 0x30
#define RADIOLIB_CC1101_REG_VERSION 0x31
#define RADIOLIB_CC1101_REG_FREQEST 0x32
#define RADIOLIB_CC1101_REG_LQI 0x33
#define RADIOLIB_CC1101_REG_RSSI 0x34
#define RADIOLIB_CC1101_REG_MARCSTATE 0x35
#define RADIOLIB_CC1101_REG_WORTIME1 0x36
#define RADIOLIB_CC1101_REG_WORTIME0 0x37
#define RADIOLIB_CC1101_REG_PKTSTATUS 0x38
#define RADIOLIB_CC1101_REG_VCO_VC_DAC 0x39
#define RADIOLIB_CC1101_REG_TXBYTES 0x3A
#define RADIOLIB_CC1101_REG_RXBYTES 0x3B
#define RADIOLIB_CC1101_REG_RCCTRL1_STATUS 0x3C
#define RADIOLIB_CC1101_REG_RCCTRL0_STATUS 0x3D
#define RADIOLIB_CC1101_REG_PATABLE 0x3E
#define RADIOLIB_CC1101_REG_FIFO 0x3F
// CC1101_REG_IOCFG2 MSB LSB DESCRIPTION
#define CC1101_GDO2_NORM 0b00000000 // 6 6 GDO2 output: active high (default)
#define CC1101_GDO2_INV 0b01000000 // 6 6 active low
#define RADIOLIB_CC1101_GDO2_NORM 0b00000000 // 6 6 GDO2 output: active high (default)
#define RADIOLIB_CC1101_GDO2_INV 0b01000000 // 6 6 active low
// CC1101_REG_IOCFG1
#define CC1101_GDO1_DS_LOW 0b00000000 // 7 7 GDO1 output drive strength: low (default)
#define CC1101_GDO1_DS_HIGH 0b10000000 // 7 7 high
#define CC1101_GDO1_NORM 0b00000000 // 6 6 GDO1 output: active high (default)
#define CC1101_GDO1_INV 0b01000000 // 6 6 active low
#define RADIOLIB_CC1101_GDO1_DS_LOW 0b00000000 // 7 7 GDO1 output drive strength: low (default)
#define RADIOLIB_CC1101_GDO1_DS_HIGH 0b10000000 // 7 7 high
#define RADIOLIB_CC1101_GDO1_NORM 0b00000000 // 6 6 GDO1 output: active high (default)
#define RADIOLIB_CC1101_GDO1_INV 0b01000000 // 6 6 active low
// CC1101_REG_IOCFG0
#define CC1101_GDO0_TEMP_SENSOR_OFF 0b00000000 // 7 7 analog temperature sensor output: disabled (default)
#define CC1101_GDO0_TEMP_SENSOR_ON 0b10000000 // 7 0 enabled
#define CC1101_GDO0_NORM 0b00000000 // 6 6 GDO0 output: active high (default)
#define CC1101_GDO0_INV 0b01000000 // 6 6 active low
#define RADIOLIB_CC1101_GDO0_TEMP_SENSOR_OFF 0b00000000 // 7 7 analog temperature sensor output: disabled (default)
#define RADIOLIB_CC1101_GDO0_TEMP_SENSOR_ON 0b10000000 // 7 0 enabled
#define RADIOLIB_CC1101_GDO0_NORM 0b00000000 // 6 6 GDO0 output: active high (default)
#define RADIOLIB_CC1101_GDO0_INV 0b01000000 // 6 6 active low
// CC1101_REG_IOCFG2 + REG_IOCFG1 + REG_IOCFG0
#define CC1101_GDOX_RX_FIFO_FULL 0x00 // 5 0 Rx FIFO full or above threshold
#define CC1101_GDOX_RX_FIFO_FULL_OR_PKT_END 0x01 // 5 0 Rx FIFO full or above threshold or reached packet end
#define CC1101_GDOX_TX_FIFO_ABOVE_THR 0x02 // 5 0 Tx FIFO above threshold
#define CC1101_GDOX_TX_FIFO_FULL 0x03 // 5 0 Tx FIFO full
#define CC1101_GDOX_RX_FIFO_OVERFLOW 0x04 // 5 0 Rx FIFO overflowed
#define CC1101_GDOX_TX_FIFO_UNDERFLOW 0x05 // 5 0 Tx FIFO underflowed
#define CC1101_GDOX_SYNC_WORD_SENT_OR_RECEIVED 0x06 // 5 0 sync word was sent or received
#define CC1101_GDOX_PKT_RECEIVED_CRC_OK 0x07 // 5 0 packet received and CRC check passed
#define CC1101_GDOX_PREAMBLE_QUALITY_REACHED 0x08 // 5 0 received preamble quality is above threshold
#define CC1101_GDOX_CHANNEL_CLEAR 0x09 // 5 0 RSSI level below threshold (channel is clear)
#define CC1101_GDOX_PLL_LOCKED 0x0A // 5 0 PLL is locked
#define CC1101_GDOX_SERIAL_CLOCK 0x0B // 5 0 serial data clock
#define CC1101_GDOX_SERIAL_DATA_SYNC 0x0C // 5 0 serial data output in: synchronous mode
#define CC1101_GDOX_SERIAL_DATA_ASYNC 0x0D // 5 0 asynchronous mode
#define CC1101_GDOX_CARRIER_SENSE 0x0E // 5 0 RSSI above threshold
#define CC1101_GDOX_CRC_OK 0x0F // 5 0 CRC check passed
#define CC1101_GDOX_RX_HARD_DATA1 0x16 // 5 0 direct access to demodulated data
#define CC1101_GDOX_RX_HARD_DATA0 0x17 // 5 0 direct access to demodulated data
#define CC1101_GDOX_PA_PD 0x1B // 5 0 power amplifier circuit is powered down
#define CC1101_GDOX_LNA_PD 0x1C // 5 0 low-noise amplifier circuit is powered down
#define CC1101_GDOX_RX_SYMBOL_TICK 0x1D // 5 0 direct access to symbol tick of received data
#define CC1101_GDOX_WOR_EVNT0 0x24 // 5 0 wake-on-radio event 0
#define CC1101_GDOX_WOR_EVNT1 0x25 // 5 0 wake-on-radio event 1
#define CC1101_GDOX_CLK_256 0x26 // 5 0 256 Hz clock
#define CC1101_GDOX_CLK_32K 0x27 // 5 0 32 kHz clock
#define CC1101_GDOX_CHIP_RDYN 0x29 // 5 0 (default for GDO2)
#define CC1101_GDOX_XOSC_STABLE 0x2B // 5 0
#define CC1101_GDOX_HIGH_Z 0x2E // 5 0 high impedance state (default for GDO1)
#define CC1101_GDOX_HW_TO_0 0x2F // 5 0
#define CC1101_GDOX_CLOCK_XOSC_1 0x30 // 5 0 crystal oscillator clock: f = f(XOSC)/1
#define CC1101_GDOX_CLOCK_XOSC_1_5 0x31 // 5 0 f = f(XOSC)/1.5
#define CC1101_GDOX_CLOCK_XOSC_2 0x32 // 5 0 f = f(XOSC)/2
#define CC1101_GDOX_CLOCK_XOSC_3 0x33 // 5 0 f = f(XOSC)/3
#define CC1101_GDOX_CLOCK_XOSC_4 0x34 // 5 0 f = f(XOSC)/4
#define CC1101_GDOX_CLOCK_XOSC_6 0x35 // 5 0 f = f(XOSC)/6
#define CC1101_GDOX_CLOCK_XOSC_8 0x36 // 5 0 f = f(XOSC)/8
#define CC1101_GDOX_CLOCK_XOSC_12 0x37 // 5 0 f = f(XOSC)/12
#define CC1101_GDOX_CLOCK_XOSC_16 0x38 // 5 0 f = f(XOSC)/16
#define CC1101_GDOX_CLOCK_XOSC_24 0x39 // 5 0 f = f(XOSC)/24
#define CC1101_GDOX_CLOCK_XOSC_32 0x3A // 5 0 f = f(XOSC)/32
#define CC1101_GDOX_CLOCK_XOSC_48 0x3B // 5 0 f = f(XOSC)/48
#define CC1101_GDOX_CLOCK_XOSC_64 0x3C // 5 0 f = f(XOSC)/64
#define CC1101_GDOX_CLOCK_XOSC_96 0x3D // 5 0 f = f(XOSC)/96
#define CC1101_GDOX_CLOCK_XOSC_128 0x3E // 5 0 f = f(XOSC)/128
#define CC1101_GDOX_CLOCK_XOSC_192 0x3F // 5 0 f = f(XOSC)/192 (default for GDO0)
#define RADIOLIB_CC1101_GDOX_RX_FIFO_FULL 0x00 // 5 0 Rx FIFO full or above threshold
#define RADIOLIB_CC1101_GDOX_RX_FIFO_FULL_OR_PKT_END 0x01 // 5 0 Rx FIFO full or above threshold or reached packet end
#define RADIOLIB_CC1101_GDOX_TX_FIFO_ABOVE_THR 0x02 // 5 0 Tx FIFO above threshold
#define RADIOLIB_CC1101_GDOX_TX_FIFO_FULL 0x03 // 5 0 Tx FIFO full
#define RADIOLIB_CC1101_GDOX_RX_FIFO_OVERFLOW 0x04 // 5 0 Rx FIFO overflowed
#define RADIOLIB_CC1101_GDOX_TX_FIFO_UNDERFLOW 0x05 // 5 0 Tx FIFO underflowed
#define RADIOLIB_CC1101_GDOX_SYNC_WORD_SENT_OR_RECEIVED 0x06 // 5 0 sync word was sent or received
#define RADIOLIB_CC1101_GDOX_PKT_RECEIVED_CRC_OK 0x07 // 5 0 packet received and CRC check passed
#define RADIOLIB_CC1101_GDOX_PREAMBLE_QUALITY_REACHED 0x08 // 5 0 received preamble quality is above threshold
#define RADIOLIB_CC1101_GDOX_CHANNEL_CLEAR 0x09 // 5 0 RSSI level below threshold (channel is clear)
#define RADIOLIB_CC1101_GDOX_PLL_LOCKED 0x0A // 5 0 PLL is locked
#define RADIOLIB_CC1101_GDOX_SERIAL_CLOCK 0x0B // 5 0 serial data clock
#define RADIOLIB_CC1101_GDOX_SERIAL_DATA_SYNC 0x0C // 5 0 serial data output in: synchronous mode
#define RADIOLIB_CC1101_GDOX_SERIAL_DATA_ASYNC 0x0D // 5 0 asynchronous mode
#define RADIOLIB_CC1101_GDOX_CARRIER_SENSE 0x0E // 5 0 RSSI above threshold
#define RADIOLIB_CC1101_GDOX_CRC_OK 0x0F // 5 0 CRC check passed
#define RADIOLIB_CC1101_GDOX_RX_HARD_DATA1 0x16 // 5 0 direct access to demodulated data
#define RADIOLIB_CC1101_GDOX_RX_HARD_DATA0 0x17 // 5 0 direct access to demodulated data
#define RADIOLIB_CC1101_GDOX_PA_PD 0x1B // 5 0 power amplifier circuit is powered down
#define RADIOLIB_CC1101_GDOX_LNA_PD 0x1C // 5 0 low-noise amplifier circuit is powered down
#define RADIOLIB_CC1101_GDOX_RX_SYMBOL_TICK 0x1D // 5 0 direct access to symbol tick of received data
#define RADIOLIB_CC1101_GDOX_WOR_EVNT0 0x24 // 5 0 wake-on-radio event 0
#define RADIOLIB_CC1101_GDOX_WOR_EVNT1 0x25 // 5 0 wake-on-radio event 1
#define RADIOLIB_CC1101_GDOX_CLK_256 0x26 // 5 0 256 Hz clock
#define RADIOLIB_CC1101_GDOX_CLK_32K 0x27 // 5 0 32 kHz clock
#define RADIOLIB_CC1101_GDOX_CHIP_RDYN 0x29 // 5 0 (default for GDO2)
#define RADIOLIB_CC1101_GDOX_XOSC_STABLE 0x2B // 5 0
#define RADIOLIB_CC1101_GDOX_HIGH_Z 0x2E // 5 0 high impedance state (default for GDO1)
#define RADIOLIB_CC1101_GDOX_HW_TO_0 0x2F // 5 0
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_1 0x30 // 5 0 crystal oscillator clock: f = f(XOSC)/1
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_1_5 0x31 // 5 0 f = f(XOSC)/1.5
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_2 0x32 // 5 0 f = f(XOSC)/2
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_3 0x33 // 5 0 f = f(XOSC)/3
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_4 0x34 // 5 0 f = f(XOSC)/4
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_6 0x35 // 5 0 f = f(XOSC)/6
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_8 0x36 // 5 0 f = f(XOSC)/8
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_12 0x37 // 5 0 f = f(XOSC)/12
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_16 0x38 // 5 0 f = f(XOSC)/16
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_24 0x39 // 5 0 f = f(XOSC)/24
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_32 0x3A // 5 0 f = f(XOSC)/32
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_48 0x3B // 5 0 f = f(XOSC)/48
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_64 0x3C // 5 0 f = f(XOSC)/64
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_96 0x3D // 5 0 f = f(XOSC)/96
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_128 0x3E // 5 0 f = f(XOSC)/128
#define RADIOLIB_CC1101_GDOX_CLOCK_XOSC_192 0x3F // 5 0 f = f(XOSC)/192 (default for GDO0)
// CC1101_REG_FIFOTHR
#define CC1101_ADC_RETENTION_OFF 0b00000000 // 6 6 do not retain ADC settings in sleep mode (default)
#define CC1101_ADC_RETENTION_ON 0b01000000 // 6 6 retain ADC settings in sleep mode
#define CC1101_RX_ATTEN_0_DB 0b00000000 // 5 4 Rx attenuation: 0 dB (default)
#define CC1101_RX_ATTEN_6_DB 0b00010000 // 5 4 6 dB
#define CC1101_RX_ATTEN_12_DB 0b00100000 // 5 4 12 dB
#define CC1101_RX_ATTEN_18_DB 0b00110000 // 5 4 18 dB
#define CC1101_FIFO_THR_TX_61_RX_4 0b00000000 // 3 0 TX fifo threshold: 61, RX fifo threshold: 4
#define RADIOLIB_CC1101_ADC_RETENTION_OFF 0b00000000 // 6 6 do not retain ADC settings in sleep mode (default)
#define RADIOLIB_CC1101_ADC_RETENTION_ON 0b01000000 // 6 6 retain ADC settings in sleep mode
#define RADIOLIB_CC1101_RX_ATTEN_0_DB 0b00000000 // 5 4 Rx attenuation: 0 dB (default)
#define RADIOLIB_CC1101_RX_ATTEN_6_DB 0b00010000 // 5 4 6 dB
#define RADIOLIB_CC1101_RX_ATTEN_12_DB 0b00100000 // 5 4 12 dB
#define RADIOLIB_CC1101_RX_ATTEN_18_DB 0b00110000 // 5 4 18 dB
#define RADIOLIB_CC1101_FIFO_THR_TX_61_RX_4 0b00000000 // 3 0 TX fifo threshold: 61, RX fifo threshold: 4
// CC1101_REG_SYNC1
#define CC1101_SYNC_WORD_MSB 0xD3 // 7 0 sync word MSB
#define RADIOLIB_CC1101_SYNC_WORD_MSB 0xD3 // 7 0 sync word MSB
// CC1101_REG_SYNC0
#define CC1101_SYNC_WORD_LSB 0x91 // 7 0 sync word LSB
#define RADIOLIB_CC1101_SYNC_WORD_LSB 0x91 // 7 0 sync word LSB
// CC1101_REG_PKTLEN
#define CC1101_PACKET_LENGTH 0xFF // 7 0 packet length in bytes
#define RADIOLIB_CC1101_PACKET_LENGTH 0xFF // 7 0 packet length in bytes
// CC1101_REG_PKTCTRL1
#define CC1101_PQT 0x00 // 7 5 preamble quality threshold
#define CC1101_CRC_AUTOFLUSH_OFF 0b00000000 // 3 3 automatic Rx FIFO flush on CRC check fail: disabled (default)
#define CC1101_CRC_AUTOFLUSH_ON 0b00001000 // 3 3 enabled
#define CC1101_APPEND_STATUS_OFF 0b00000000 // 2 2 append 2 status bytes to packet: disabled
#define CC1101_APPEND_STATUS_ON 0b00000100 // 2 2 enabled (default)
#define CC1101_ADR_CHK_NONE 0b00000000 // 1 0 address check: none (default)
#define CC1101_ADR_CHK_NO_BROADCAST 0b00000001 // 1 0 without broadcast
#define CC1101_ADR_CHK_SINGLE_BROADCAST 0b00000010 // 1 0 broadcast address 0x00
#define CC1101_ADR_CHK_DOUBLE_BROADCAST 0b00000011 // 1 0 broadcast addresses 0x00 and 0xFF
#define RADIOLIB_CC1101_PQT 0x00 // 7 5 preamble quality threshold
#define RADIOLIB_CC1101_CRC_AUTOFLUSH_OFF 0b00000000 // 3 3 automatic Rx FIFO flush on CRC check fail: disabled (default)
#define RADIOLIB_CC1101_CRC_AUTOFLUSH_ON 0b00001000 // 3 3 enabled
#define RADIOLIB_CC1101_APPEND_STATUS_OFF 0b00000000 // 2 2 append 2 status bytes to packet: disabled
#define RADIOLIB_CC1101_APPEND_STATUS_ON 0b00000100 // 2 2 enabled (default)
#define RADIOLIB_CC1101_ADR_CHK_NONE 0b00000000 // 1 0 address check: none (default)
#define RADIOLIB_CC1101_ADR_CHK_NO_BROADCAST 0b00000001 // 1 0 without broadcast
#define RADIOLIB_CC1101_ADR_CHK_SINGLE_BROADCAST 0b00000010 // 1 0 broadcast address 0x00
#define RADIOLIB_CC1101_ADR_CHK_DOUBLE_BROADCAST 0b00000011 // 1 0 broadcast addresses 0x00 and 0xFF
// CC1101_REG_PKTCTRL0
#define CC1101_WHITE_DATA_OFF 0b00000000 // 6 6 data whitening: disabled
#define CC1101_WHITE_DATA_ON 0b01000000 // 6 6 enabled (default)
#define CC1101_PKT_FORMAT_NORMAL 0b00000000 // 5 4 packet format: normal (FIFOs)
#define CC1101_PKT_FORMAT_SYNCHRONOUS 0b00010000 // 5 4 synchronous serial
#define CC1101_PKT_FORMAT_RANDOM 0b00100000 // 5 4 random transmissions
#define CC1101_PKT_FORMAT_ASYNCHRONOUS 0b00110000 // 5 4 asynchronous serial
#define CC1101_CRC_OFF 0b00000000 // 2 2 CRC disabled
#define CC1101_CRC_ON 0b00000100 // 2 2 CRC enabled (default)
#define CC1101_LENGTH_CONFIG_FIXED 0b00000000 // 1 0 packet length: fixed
#define CC1101_LENGTH_CONFIG_VARIABLE 0b00000001 // 1 0 variable (default)
#define CC1101_LENGTH_CONFIG_INFINITE 0b00000010 // 1 0 infinite
#define RADIOLIB_CC1101_WHITE_DATA_OFF 0b00000000 // 6 6 data whitening: disabled
#define RADIOLIB_CC1101_WHITE_DATA_ON 0b01000000 // 6 6 enabled (default)
#define RADIOLIB_CC1101_PKT_FORMAT_NORMAL 0b00000000 // 5 4 packet format: normal (FIFOs)
#define RADIOLIB_CC1101_PKT_FORMAT_SYNCHRONOUS 0b00010000 // 5 4 synchronous serial
#define RADIOLIB_CC1101_PKT_FORMAT_RANDOM 0b00100000 // 5 4 random transmissions
#define RADIOLIB_CC1101_PKT_FORMAT_ASYNCHRONOUS 0b00110000 // 5 4 asynchronous serial
#define RADIOLIB_CC1101_CRC_OFF 0b00000000 // 2 2 CRC disabled
#define RADIOLIB_CC1101_CRC_ON 0b00000100 // 2 2 CRC enabled (default)
#define RADIOLIB_CC1101_LENGTH_CONFIG_FIXED 0b00000000 // 1 0 packet length: fixed
#define RADIOLIB_CC1101_LENGTH_CONFIG_VARIABLE 0b00000001 // 1 0 variable (default)
#define RADIOLIB_CC1101_LENGTH_CONFIG_INFINITE 0b00000010 // 1 0 infinite
// CC1101_REG_ADDR
#define CC1101_DEVICE_ADDR 0x00 // 7 0 device address
#define RADIOLIB_CC1101_DEVICE_ADDR 0x00 // 7 0 device address
// CC1101_REG_CHANNR
#define CC1101_CHAN 0x00 // 7 0 channel number
#define RADIOLIB_CC1101_CHAN 0x00 // 7 0 channel number
// CC1101_REG_FSCTRL1
#define CC1101_FREQ_IF 0x0F // 4 0 IF frequency setting; f_IF = (f(XOSC) / 2^10) * CC1101_FREQ_IF
#define RADIOLIB_CC1101_FREQ_IF 0x0F // 4 0 IF frequency setting; f_IF = (f(XOSC) / 2^10) * CC1101_FREQ_IF
// CC1101_REG_FSCTRL0
#define CC1101_FREQOFF 0x00 // 7 0 base frequency offset (2s-compliment)
#define RADIOLIB_CC1101_FREQOFF 0x00 // 7 0 base frequency offset (2s-compliment)
// CC1101_REG_FREQ2 + REG_FREQ1 + REG_FREQ0
#define CC1101_FREQ_MSB 0x1E // 5 0 base frequency setting: f_carrier = (f(XOSC) / 2^16) * FREQ
#define CC1101_FREQ_MID 0xC4 // 7 0 where f(XOSC) = 26 MHz
#define CC1101_FREQ_LSB 0xEC // 7 0 FREQ = 3-byte value of FREQ registers
#define RADIOLIB_CC1101_FREQ_MSB 0x1E // 5 0 base frequency setting: f_carrier = (f(XOSC) / 2^16) * FREQ
#define RADIOLIB_CC1101_FREQ_MID 0xC4 // 7 0 where f(XOSC) = 26 MHz
#define RADIOLIB_CC1101_FREQ_LSB 0xEC // 7 0 FREQ = 3-byte value of FREQ registers
// CC1101_REG_MDMCFG4
#define CC1101_CHANBW_E 0b10000000 // 7 6 channel bandwidth: BW_channel = f(XOSC) / (8 * (4 + CHANBW_M)*2^CHANBW_E) [Hz]
#define CC1101_CHANBW_M 0b00000000 // 5 4 default value for 26 MHz crystal: 203 125 Hz
#define CC1101_DRATE_E 0x0C // 3 0 symbol rate: R_data = (((256 + DRATE_M) * 2^DRATE_E) / 2^28) * f(XOSC) [Baud]
#define RADIOLIB_CC1101_CHANBW_E 0b10000000 // 7 6 channel bandwidth: BW_channel = f(XOSC) / (8 * (4 + CHANBW_M)*2^CHANBW_E) [Hz]
#define RADIOLIB_CC1101_CHANBW_M 0b00000000 // 5 4 default value for 26 MHz crystal: 203 125 Hz
#define RADIOLIB_CC1101_DRATE_E 0x0C // 3 0 symbol rate: R_data = (((256 + DRATE_M) * 2^DRATE_E) / 2^28) * f(XOSC) [Baud]
// CC1101_REG_MDMCFG3
#define CC1101_DRATE_M 0x22 // 7 0 default value for 26 MHz crystal: 115 051 Baud
#define RADIOLIB_CC1101_DRATE_M 0x22 // 7 0 default value for 26 MHz crystal: 115 051 Baud
// CC1101_REG_MDMCFG2
#define CC1101_DEM_DCFILT_OFF 0b10000000 // 7 7 digital DC filter: disabled
#define CC1101_DEM_DCFILT_ON 0b00000000 // 7 7 enabled - only for data rates above 250 kBaud (default)
#define CC1101_MOD_FORMAT_2_FSK 0b00000000 // 6 4 modulation format: 2-FSK (default)
#define CC1101_MOD_FORMAT_GFSK 0b00010000 // 6 4 GFSK
#define CC1101_MOD_FORMAT_ASK_OOK 0b00110000 // 6 4 ASK/OOK
#define CC1101_MOD_FORMAT_4_FSK 0b01000000 // 6 4 4-FSK
#define CC1101_MOD_FORMAT_MFSK 0b01110000 // 6 4 MFSK - only for data rates above 26 kBaud
#define CC1101_MANCHESTER_EN_OFF 0b00000000 // 3 3 Manchester encoding: disabled (default)
#define CC1101_MANCHESTER_EN_ON 0b00001000 // 3 3 enabled
#define CC1101_SYNC_MODE_NONE 0b00000000 // 2 0 synchronization: no preamble/sync
#define CC1101_SYNC_MODE_15_16 0b00000001 // 2 0 15/16 sync word bits
#define CC1101_SYNC_MODE_16_16 0b00000010 // 2 0 16/16 sync word bits (default)
#define CC1101_SYNC_MODE_30_32 0b00000011 // 2 0 30/32 sync word bits
#define CC1101_SYNC_MODE_NONE_THR 0b00000100 // 2 0 no preamble sync, carrier sense above threshold
#define CC1101_SYNC_MODE_15_16_THR 0b00000101 // 2 0 15/16 sync word bits, carrier sense above threshold
#define CC1101_SYNC_MODE_16_16_THR 0b00000110 // 2 0 16/16 sync word bits, carrier sense above threshold
#define CC1101_SYNC_MODE_30_32_THR 0b00000111 // 2 0 30/32 sync word bits, carrier sense above threshold
#define RADIOLIB_CC1101_DEM_DCFILT_OFF 0b10000000 // 7 7 digital DC filter: disabled
#define RADIOLIB_CC1101_DEM_DCFILT_ON 0b00000000 // 7 7 enabled - only for data rates above 250 kBaud (default)
#define RADIOLIB_CC1101_MOD_FORMAT_2_FSK 0b00000000 // 6 4 modulation format: 2-FSK (default)
#define RADIOLIB_CC1101_MOD_FORMAT_GFSK 0b00010000 // 6 4 GFSK
#define RADIOLIB_CC1101_MOD_FORMAT_ASK_OOK 0b00110000 // 6 4 ASK/OOK
#define RADIOLIB_CC1101_MOD_FORMAT_4_FSK 0b01000000 // 6 4 4-FSK
#define RADIOLIB_CC1101_MOD_FORMAT_MFSK 0b01110000 // 6 4 MFSK - only for data rates above 26 kBaud
#define RADIOLIB_CC1101_MANCHESTER_EN_OFF 0b00000000 // 3 3 Manchester encoding: disabled (default)
#define RADIOLIB_CC1101_MANCHESTER_EN_ON 0b00001000 // 3 3 enabled
#define RADIOLIB_CC1101_SYNC_MODE_NONE 0b00000000 // 2 0 synchronization: no preamble/sync
#define RADIOLIB_CC1101_SYNC_MODE_15_16 0b00000001 // 2 0 15/16 sync word bits
#define RADIOLIB_CC1101_SYNC_MODE_16_16 0b00000010 // 2 0 16/16 sync word bits (default)
#define RADIOLIB_CC1101_SYNC_MODE_30_32 0b00000011 // 2 0 30/32 sync word bits
#define RADIOLIB_CC1101_SYNC_MODE_NONE_THR 0b00000100 // 2 0 no preamble sync, carrier sense above threshold
#define RADIOLIB_CC1101_SYNC_MODE_15_16_THR 0b00000101 // 2 0 15/16 sync word bits, carrier sense above threshold
#define RADIOLIB_CC1101_SYNC_MODE_16_16_THR 0b00000110 // 2 0 16/16 sync word bits, carrier sense above threshold
#define RADIOLIB_CC1101_SYNC_MODE_30_32_THR 0b00000111 // 2 0 30/32 sync word bits, carrier sense above threshold
// CC1101_REG_MDMCFG1
#define CC1101_FEC_OFF 0b00000000 // 7 7 forward error correction: disabled (default)
#define CC1101_FEC_ON 0b10000000 // 7 7 enabled - only for fixed packet length
#define CC1101_NUM_PREAMBLE_2 0b00000000 // 6 4 number of preamble bytes: 2
#define CC1101_NUM_PREAMBLE_3 0b00010000 // 6 4 3
#define CC1101_NUM_PREAMBLE_4 0b00100000 // 6 4 4 (default)
#define CC1101_NUM_PREAMBLE_6 0b00110000 // 6 4 6
#define CC1101_NUM_PREAMBLE_8 0b01000000 // 6 4 8
#define CC1101_NUM_PREAMBLE_12 0b01010000 // 6 4 12
#define CC1101_NUM_PREAMBLE_16 0b01100000 // 6 4 16
#define CC1101_NUM_PREAMBLE_24 0b01110000 // 6 4 24
#define CC1101_CHANSPC_E 0x02 // 1 0 channel spacing: df_channel = (f(XOSC) / 2^18) * (256 + CHANSPC_M) * 2^CHANSPC_E [Hz]
#define RADIOLIB_CC1101_FEC_OFF 0b00000000 // 7 7 forward error correction: disabled (default)
#define RADIOLIB_CC1101_FEC_ON 0b10000000 // 7 7 enabled - only for fixed packet length
#define RADIOLIB_CC1101_NUM_PREAMBLE_2 0b00000000 // 6 4 number of preamble bytes: 2
#define RADIOLIB_CC1101_NUM_PREAMBLE_3 0b00010000 // 6 4 3
#define RADIOLIB_CC1101_NUM_PREAMBLE_4 0b00100000 // 6 4 4 (default)
#define RADIOLIB_CC1101_NUM_PREAMBLE_6 0b00110000 // 6 4 6
#define RADIOLIB_CC1101_NUM_PREAMBLE_8 0b01000000 // 6 4 8
#define RADIOLIB_CC1101_NUM_PREAMBLE_12 0b01010000 // 6 4 12
#define RADIOLIB_CC1101_NUM_PREAMBLE_16 0b01100000 // 6 4 16
#define RADIOLIB_CC1101_NUM_PREAMBLE_24 0b01110000 // 6 4 24
#define RADIOLIB_CC1101_CHANSPC_E 0x02 // 1 0 channel spacing: df_channel = (f(XOSC) / 2^18) * (256 + CHANSPC_M) * 2^CHANSPC_E [Hz]
// CC1101_REG_MDMCFG0
#define CC1101_CHANSPC_M 0xF8 // 7 0 default value for 26 MHz crystal: 199 951 kHz
#define RADIOLIB_CC1101_CHANSPC_M 0xF8 // 7 0 default value for 26 MHz crystal: 199 951 kHz
// CC1101_REG_DEVIATN
#define CC1101_DEVIATION_E 0b01000000 // 6 4 frequency deviation: f_dev = (f(XOSC) / 2^17) * (8 + DEVIATION_M) * 2^DEVIATION_E [Hz]
#define CC1101_DEVIATION_M 0b00000111 // 2 0 default value for 26 MHz crystal: +- 47 607 Hz
#define CC1101_MSK_PHASE_CHANGE_PERIOD 0x07 // 2 0 phase change symbol period fraction: 1 / (MSK_PHASE_CHANGE_PERIOD + 1)
#define RADIOLIB_CC1101_DEVIATION_E 0b01000000 // 6 4 frequency deviation: f_dev = (f(XOSC) / 2^17) * (8 + DEVIATION_M) * 2^DEVIATION_E [Hz]
#define RADIOLIB_CC1101_DEVIATION_M 0b00000111 // 2 0 default value for 26 MHz crystal: +- 47 607 Hz
#define RADIOLIB_CC1101_MSK_PHASE_CHANGE_PERIOD 0x07 // 2 0 phase change symbol period fraction: 1 / (MSK_PHASE_CHANGE_PERIOD + 1)
// CC1101_REG_MCSM2
#define CC1101_RX_TIMEOUT_RSSI_OFF 0b00000000 // 4 4 Rx timeout based on RSSI value: disabled (default)
#define CC1101_RX_TIMEOUT_RSSI_ON 0b00010000 // 4 4 enabled
#define CC1101_RX_TIMEOUT_QUAL_OFF 0b00000000 // 3 3 check for sync word on Rx timeout
#define CC1101_RX_TIMEOUT_QUAL_ON 0b00001000 // 3 3 check for PQI set on Rx timeout
#define CC1101_RX_TIMEOUT_OFF 0b00000111 // 2 0 Rx timeout: disabled (default)
#define CC1101_RX_TIMEOUT_MAX 0b00000000 // 2 0 max value (actual value depends on WOR_RES, EVENT0 and f(XOSC))
#define RADIOLIB_CC1101_RX_TIMEOUT_RSSI_OFF 0b00000000 // 4 4 Rx timeout based on RSSI value: disabled (default)
#define RADIOLIB_CC1101_RX_TIMEOUT_RSSI_ON 0b00010000 // 4 4 enabled
#define RADIOLIB_CC1101_RX_TIMEOUT_QUAL_OFF 0b00000000 // 3 3 check for sync word on Rx timeout
#define RADIOLIB_CC1101_RX_TIMEOUT_QUAL_ON 0b00001000 // 3 3 check for PQI set on Rx timeout
#define RADIOLIB_CC1101_RX_TIMEOUT_OFF 0b00000111 // 2 0 Rx timeout: disabled (default)
#define RADIOLIB_CC1101_RX_TIMEOUT_MAX 0b00000000 // 2 0 max value (actual value depends on WOR_RES, EVENT0 and f(XOSC))
// CC1101_REG_MCSM1
#define CC1101_CCA_MODE_ALWAYS 0b00000000 // 5 4 clear channel indication: always
#define CC1101_CCA_MODE_RSSI_THR 0b00010000 // 5 4 RSSI below threshold
#define CC1101_CCA_MODE_RX_PKT 0b00100000 // 5 4 unless receiving packet
#define CC1101_CCA_MODE_RSSI_THR_RX_PKT 0b00110000 // 5 4 RSSI below threshold unless receiving packet (default)
#define CC1101_RXOFF_IDLE 0b00000000 // 3 2 next mode after packet reception: idle (default)
#define CC1101_RXOFF_FSTXON 0b00000100 // 3 2 FSTxOn
#define CC1101_RXOFF_TX 0b00001000 // 3 2 Tx
#define CC1101_RXOFF_RX 0b00001100 // 3 2 Rx
#define CC1101_TXOFF_IDLE 0b00000000 // 1 0 next mode after packet transmission: idle (default)
#define CC1101_TXOFF_FSTXON 0b00000001 // 1 0 FSTxOn
#define CC1101_TXOFF_TX 0b00000010 // 1 0 Tx
#define CC1101_TXOFF_RX 0b00000011 // 1 0 Rx
#define RADIOLIB_CC1101_CCA_MODE_ALWAYS 0b00000000 // 5 4 clear channel indication: always
#define RADIOLIB_CC1101_CCA_MODE_RSSI_THR 0b00010000 // 5 4 RSSI below threshold
#define RADIOLIB_CC1101_CCA_MODE_RX_PKT 0b00100000 // 5 4 unless receiving packet
#define RADIOLIB_CC1101_CCA_MODE_RSSI_THR_RX_PKT 0b00110000 // 5 4 RSSI below threshold unless receiving packet (default)
#define RADIOLIB_CC1101_RXOFF_IDLE 0b00000000 // 3 2 next mode after packet reception: idle (default)
#define RADIOLIB_CC1101_RXOFF_FSTXON 0b00000100 // 3 2 FSTxOn
#define RADIOLIB_CC1101_RXOFF_TX 0b00001000 // 3 2 Tx
#define RADIOLIB_CC1101_RXOFF_RX 0b00001100 // 3 2 Rx
#define RADIOLIB_CC1101_TXOFF_IDLE 0b00000000 // 1 0 next mode after packet transmission: idle (default)
#define RADIOLIB_CC1101_TXOFF_FSTXON 0b00000001 // 1 0 FSTxOn
#define RADIOLIB_CC1101_TXOFF_TX 0b00000010 // 1 0 Tx
#define RADIOLIB_CC1101_TXOFF_RX 0b00000011 // 1 0 Rx
// CC1101_REG_MCSM0
#define CC1101_FS_AUTOCAL_NEVER 0b00000000 // 5 4 automatic calibration: never (default)
#define CC1101_FS_AUTOCAL_IDLE_TO_RXTX 0b00010000 // 5 4 every transition from idle to Rx/Tx
#define CC1101_FS_AUTOCAL_RXTX_TO_IDLE 0b00100000 // 5 4 every transition from Rx/Tx to idle
#define CC1101_FS_AUTOCAL_RXTX_TO_IDLE_4TH 0b00110000 // 5 4 every 4th transition from Rx/Tx to idle
#define CC1101_PO_TIMEOUT_COUNT_1 0b00000000 // 3 2 number of counter expirations before CHP_RDYN goes low: 1 (default)
#define CC1101_PO_TIMEOUT_COUNT_16 0b00000100 // 3 2 16
#define CC1101_PO_TIMEOUT_COUNT_64 0b00001000 // 3 2 64
#define CC1101_PO_TIMEOUT_COUNT_256 0b00001100 // 3 2 256
#define CC1101_PIN_CTRL_OFF 0b00000000 // 1 1 pin radio control: disabled (default)
#define CC1101_PIN_CTRL_ON 0b00000010 // 1 1 enabled
#define CC1101_XOSC_FORCE_OFF 0b00000000 // 0 0 do not force XOSC to remain on in sleep (default)
#define CC1101_XOSC_FORCE_ON 0b00000001 // 0 0 force XOSC to remain on in sleep
#define RADIOLIB_CC1101_FS_AUTOCAL_NEVER 0b00000000 // 5 4 automatic calibration: never (default)
#define RADIOLIB_CC1101_FS_AUTOCAL_IDLE_TO_RXTX 0b00010000 // 5 4 every transition from idle to Rx/Tx
#define RADIOLIB_CC1101_FS_AUTOCAL_RXTX_TO_IDLE 0b00100000 // 5 4 every transition from Rx/Tx to idle
#define RADIOLIB_CC1101_FS_AUTOCAL_RXTX_TO_IDLE_4TH 0b00110000 // 5 4 every 4th transition from Rx/Tx to idle
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_1 0b00000000 // 3 2 number of counter expirations before CHP_RDYN goes low: 1 (default)
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_16 0b00000100 // 3 2 16
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_64 0b00001000 // 3 2 64
#define RADIOLIB_CC1101_PO_TIMEOUT_COUNT_256 0b00001100 // 3 2 256
#define RADIOLIB_CC1101_PIN_CTRL_OFF 0b00000000 // 1 1 pin radio control: disabled (default)
#define RADIOLIB_CC1101_PIN_CTRL_ON 0b00000010 // 1 1 enabled
#define RADIOLIB_CC1101_XOSC_FORCE_OFF 0b00000000 // 0 0 do not force XOSC to remain on in sleep (default)
#define RADIOLIB_CC1101_XOSC_FORCE_ON 0b00000001 // 0 0 force XOSC to remain on in sleep
// CC1101_REG_FOCCFG
#define CC1101_FOC_BS_CS_GATE_OFF 0b00000000 // 5 5 do not freeze frequency compensation until CS goes high
#define CC1101_FOC_BS_CS_GATE_ON 0b00100000 // 5 5 freeze frequency compensation until CS goes high (default)
#define CC1101_FOC_PRE_K 0b00000000 // 4 3 frequency compensation loop gain before sync word: K
#define CC1101_FOC_PRE_2K 0b00001000 // 4 3 2K
#define CC1101_FOC_PRE_3K 0b00010000 // 4 3 3K (default)
#define CC1101_FOC_PRE_4K 0b00011000 // 4 3 4K
#define CC1101_FOC_POST_K 0b00000000 // 2 2 frequency compensation loop gain after sync word: same as FOC_PRE
#define CC1101_FOC_POST_K_2 0b00000100 // 2 2 K/2 (default)
#define CC1101_FOC_LIMIT_NO_COMPENSATION 0b00000000 // 1 0 frequency compensation saturation point: no compensation - required for ASK/OOK
#define CC1101_FOC_LIMIT_BW_CHAN_8 0b00000001 // 1 0 +- BW_chan/8
#define CC1101_FOC_LIMIT_BW_CHAN_4 0b00000010 // 1 0 +- BW_chan/4 (default)
#define CC1101_FOC_LIMIT_BW_CHAN_2 0b00000011 // 1 0 +- BW_chan/2
#define RADIOLIB_CC1101_FOC_BS_CS_GATE_OFF 0b00000000 // 5 5 do not freeze frequency compensation until CS goes high
#define RADIOLIB_CC1101_FOC_BS_CS_GATE_ON 0b00100000 // 5 5 freeze frequency compensation until CS goes high (default)
#define RADIOLIB_CC1101_FOC_PRE_K 0b00000000 // 4 3 frequency compensation loop gain before sync word: K
#define RADIOLIB_CC1101_FOC_PRE_2K 0b00001000 // 4 3 2K
#define RADIOLIB_CC1101_FOC_PRE_3K 0b00010000 // 4 3 3K (default)
#define RADIOLIB_CC1101_FOC_PRE_4K 0b00011000 // 4 3 4K
#define RADIOLIB_CC1101_FOC_POST_K 0b00000000 // 2 2 frequency compensation loop gain after sync word: same as FOC_PRE
#define RADIOLIB_CC1101_FOC_POST_K_2 0b00000100 // 2 2 K/2 (default)
#define RADIOLIB_CC1101_FOC_LIMIT_NO_COMPENSATION 0b00000000 // 1 0 frequency compensation saturation point: no compensation - required for ASK/OOK
#define RADIOLIB_CC1101_FOC_LIMIT_BW_CHAN_8 0b00000001 // 1 0 +- BW_chan/8
#define RADIOLIB_CC1101_FOC_LIMIT_BW_CHAN_4 0b00000010 // 1 0 +- BW_chan/4 (default)
#define RADIOLIB_CC1101_FOC_LIMIT_BW_CHAN_2 0b00000011 // 1 0 +- BW_chan/2
// CC1101_REG_BSCFG
#define CC1101_BS_PRE_KI 0b00000000 // 7 6 clock recovery integral gain before sync word: Ki
#define CC1101_BS_PRE_2KI 0b01000000 // 7 6 2Ki (default)
#define CC1101_BS_PRE_3KI 0b10000000 // 7 6 3Ki
#define CC1101_BS_PRE_4KI 0b11000000 // 7 6 4Ki
#define CC1101_BS_PRE_KP 0b00000000 // 5 4 clock recovery proportional gain before sync word: Kp
#define CC1101_BS_PRE_2KP 0b00010000 // 5 4 2Kp
#define CC1101_BS_PRE_3KP 0b00100000 // 5 4 3Kp (default)
#define CC1101_BS_PRE_4KP 0b00110000 // 5 4 4Kp
#define CC1101_BS_POST_KI 0b00000000 // 3 3 clock recovery integral gain after sync word: same as BS_PRE
#define CC1101_BS_POST_KI_2 0b00001000 // 3 3 Ki/2 (default)
#define CC1101_BS_POST_KP 0b00000000 // 2 2 clock recovery proportional gain after sync word: same as BS_PRE
#define CC1101_BS_POST_KP_1 0b00000100 // 2 2 Kp (default)
#define CC1101_BS_LIMIT_NO_COMPENSATION 0b00000000 // 1 0 data rate compensation saturation point: no compensation
#define CC1101_BS_LIMIT_3_125 0b00000001 // 1 0 +- 3.125 %
#define CC1101_BS_LIMIT_6_25 0b00000010 // 1 0 +- 6.25 %
#define CC1101_BS_LIMIT_12_5 0b00000011 // 1 0 +- 12.5 %
#define RADIOLIB_CC1101_BS_PRE_KI 0b00000000 // 7 6 clock recovery integral gain before sync word: Ki
#define RADIOLIB_CC1101_BS_PRE_2KI 0b01000000 // 7 6 2Ki (default)
#define RADIOLIB_CC1101_BS_PRE_3KI 0b10000000 // 7 6 3Ki
#define RADIOLIB_CC1101_BS_PRE_4KI 0b11000000 // 7 6 4Ki
#define RADIOLIB_CC1101_BS_PRE_KP 0b00000000 // 5 4 clock recovery proportional gain before sync word: Kp
#define RADIOLIB_CC1101_BS_PRE_2KP 0b00010000 // 5 4 2Kp
#define RADIOLIB_CC1101_BS_PRE_3KP 0b00100000 // 5 4 3Kp (default)
#define RADIOLIB_CC1101_BS_PRE_4KP 0b00110000 // 5 4 4Kp
#define RADIOLIB_CC1101_BS_POST_KI 0b00000000 // 3 3 clock recovery integral gain after sync word: same as BS_PRE
#define RADIOLIB_CC1101_BS_POST_KI_2 0b00001000 // 3 3 Ki/2 (default)
#define RADIOLIB_CC1101_BS_POST_KP 0b00000000 // 2 2 clock recovery proportional gain after sync word: same as BS_PRE
#define RADIOLIB_CC1101_BS_POST_KP_1 0b00000100 // 2 2 Kp (default)
#define RADIOLIB_CC1101_BS_LIMIT_NO_COMPENSATION 0b00000000 // 1 0 data rate compensation saturation point: no compensation
#define RADIOLIB_CC1101_BS_LIMIT_3_125 0b00000001 // 1 0 +- 3.125 %
#define RADIOLIB_CC1101_BS_LIMIT_6_25 0b00000010 // 1 0 +- 6.25 %
#define RADIOLIB_CC1101_BS_LIMIT_12_5 0b00000011 // 1 0 +- 12.5 %
// CC1101_REG_AGCCTRL2
#define CC1101_MAX_DVGA_GAIN_0 0b00000000 // 7 6 reduce maximum available DVGA gain: no reduction (default)
#define CC1101_MAX_DVGA_GAIN_1 0b01000000 // 7 6 disable top gain setting
#define CC1101_MAX_DVGA_GAIN_2 0b10000000 // 7 6 disable top two gain setting
#define CC1101_MAX_DVGA_GAIN_3 0b11000000 // 7 6 disable top three gain setting
#define CC1101_LNA_GAIN_REDUCE_0_DB 0b00000000 // 5 3 reduce maximum LNA gain by: 0 dB (default)
#define CC1101_LNA_GAIN_REDUCE_2_6_DB 0b00001000 // 5 3 2.6 dB
#define CC1101_LNA_GAIN_REDUCE_6_1_DB 0b00010000 // 5 3 6.1 dB
#define CC1101_LNA_GAIN_REDUCE_7_4_DB 0b00011000 // 5 3 7.4 dB
#define CC1101_LNA_GAIN_REDUCE_9_2_DB 0b00100000 // 5 3 9.2 dB
#define CC1101_LNA_GAIN_REDUCE_11_5_DB 0b00101000 // 5 3 11.5 dB
#define CC1101_LNA_GAIN_REDUCE_14_6_DB 0b00110000 // 5 3 14.6 dB
#define CC1101_LNA_GAIN_REDUCE_17_1_DB 0b00111000 // 5 3 17.1 dB
#define CC1101_MAGN_TARGET_24_DB 0b00000000 // 2 0 average amplitude target for filter: 24 dB
#define CC1101_MAGN_TARGET_27_DB 0b00000001 // 2 0 27 dB
#define CC1101_MAGN_TARGET_30_DB 0b00000010 // 2 0 30 dB
#define CC1101_MAGN_TARGET_33_DB 0b00000011 // 2 0 33 dB (default)
#define CC1101_MAGN_TARGET_36_DB 0b00000100 // 2 0 36 dB
#define CC1101_MAGN_TARGET_38_DB 0b00000101 // 2 0 38 dB
#define CC1101_MAGN_TARGET_40_DB 0b00000110 // 2 0 40 dB
#define CC1101_MAGN_TARGET_42_DB 0b00000111 // 2 0 42 dB
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_0 0b00000000 // 7 6 reduce maximum available DVGA gain: no reduction (default)
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_1 0b01000000 // 7 6 disable top gain setting
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_2 0b10000000 // 7 6 disable top two gain setting
#define RADIOLIB_CC1101_MAX_DVGA_GAIN_3 0b11000000 // 7 6 disable top three gain setting
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_0_DB 0b00000000 // 5 3 reduce maximum LNA gain by: 0 dB (default)
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_2_6_DB 0b00001000 // 5 3 2.6 dB
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_6_1_DB 0b00010000 // 5 3 6.1 dB
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_7_4_DB 0b00011000 // 5 3 7.4 dB
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_9_2_DB 0b00100000 // 5 3 9.2 dB
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_11_5_DB 0b00101000 // 5 3 11.5 dB
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_14_6_DB 0b00110000 // 5 3 14.6 dB
#define RADIOLIB_CC1101_LNA_GAIN_REDUCE_17_1_DB 0b00111000 // 5 3 17.1 dB
#define RADIOLIB_CC1101_MAGN_TARGET_24_DB 0b00000000 // 2 0 average amplitude target for filter: 24 dB
#define RADIOLIB_CC1101_MAGN_TARGET_27_DB 0b00000001 // 2 0 27 dB
#define RADIOLIB_CC1101_MAGN_TARGET_30_DB 0b00000010 // 2 0 30 dB
#define RADIOLIB_CC1101_MAGN_TARGET_33_DB 0b00000011 // 2 0 33 dB (default)
#define RADIOLIB_CC1101_MAGN_TARGET_36_DB 0b00000100 // 2 0 36 dB
#define RADIOLIB_CC1101_MAGN_TARGET_38_DB 0b00000101 // 2 0 38 dB
#define RADIOLIB_CC1101_MAGN_TARGET_40_DB 0b00000110 // 2 0 40 dB
#define RADIOLIB_CC1101_MAGN_TARGET_42_DB 0b00000111 // 2 0 42 dB
// CC1101_REG_AGCCTRL1
#define CC1101_AGC_LNA_PRIORITY_LNA2 0b00000000 // 6 6 LNA priority setting: LNA2 first
#define CC1101_AGC_LNA_PRIORITY_LNA 0b01000000 // 6 6 LNA first (default)
#define CC1101_CARRIER_SENSE_REL_THR_OFF 0b00000000 // 5 4 RSSI relative change to assert carrier sense: disabled (default)
#define CC1101_CARRIER_SENSE_REL_THR_6_DB 0b00010000 // 5 4 6 dB
#define CC1101_CARRIER_SENSE_REL_THR_10_DB 0b00100000 // 5 4 10 dB
#define CC1101_CARRIER_SENSE_REL_THR_14_DB 0b00110000 // 5 4 14 dB
#define CC1101_CARRIER_SENSE_ABS_THR 0x00 // 3 0 RSSI threshold to assert carrier sense in 2s compliment, Thr = MAGN_TARGET + CARRIER_SENSE_ABS_TH [dB]
#define RADIOLIB_CC1101_AGC_LNA_PRIORITY_LNA2 0b00000000 // 6 6 LNA priority setting: LNA2 first
#define RADIOLIB_CC1101_AGC_LNA_PRIORITY_LNA 0b01000000 // 6 6 LNA first (default)
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_OFF 0b00000000 // 5 4 RSSI relative change to assert carrier sense: disabled (default)
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_6_DB 0b00010000 // 5 4 6 dB
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_10_DB 0b00100000 // 5 4 10 dB
#define RADIOLIB_CC1101_CARRIER_SENSE_REL_THR_14_DB 0b00110000 // 5 4 14 dB
#define RADIOLIB_CC1101_CARRIER_SENSE_ABS_THR 0x00 // 3 0 RSSI threshold to assert carrier sense in 2s compliment, Thr = MAGN_TARGET + CARRIER_SENSE_ABS_TH [dB]
// CC1101_REG_AGCCTRL0
#define CC1101_HYST_LEVEL_NONE 0b00000000 // 7 6 AGC hysteresis level: none
#define CC1101_HYST_LEVEL_LOW 0b01000000 // 7 6 low
#define CC1101_HYST_LEVEL_MEDIUM 0b10000000 // 7 6 medium (default)
#define CC1101_HYST_LEVEL_HIGH 0b11000000 // 7 6 high
#define CC1101_WAIT_TIME_8_SAMPLES 0b00000000 // 5 4 AGC wait time: 8 samples
#define CC1101_WAIT_TIME_16_SAMPLES 0b00010000 // 5 4 16 samples (default)
#define CC1101_WAIT_TIME_24_SAMPLES 0b00100000 // 5 4 24 samples
#define CC1101_WAIT_TIME_32_SAMPLES 0b00110000 // 5 4 32 samples
#define CC1101_AGC_FREEZE_NEVER 0b00000000 // 3 2 freeze AGC gain: never (default)
#define CC1101_AGC_FREEZE_SYNC_WORD 0b00000100 // 3 2 when sync word is found
#define CC1101_AGC_FREEZE_MANUAL_A 0b00001000 // 3 2 manually freeze analog control
#define CC1101_AGC_FREEZE_MANUAL_AD 0b00001100 // 3 2 manually freeze analog and digital control
#define CC1101_FILTER_LENGTH_8 0b00000000 // 1 0 averaging length for channel filter: 8 samples
#define CC1101_FILTER_LENGTH_16 0b00000001 // 1 0 16 samples (default)
#define CC1101_FILTER_LENGTH_32 0b00000010 // 1 0 32 samples
#define CC1101_FILTER_LENGTH_64 0b00000011 // 1 0 64 samples
#define CC1101_ASK_OOK_BOUNDARY_4_DB 0b00000000 // 1 0 ASK/OOK decision boundary: 4 dB
#define CC1101_ASK_OOK_BOUNDARY_8_DB 0b00000001 // 1 0 8 dB (default)
#define CC1101_ASK_OOK_BOUNDARY_12_DB 0b00000010 // 1 0 12 dB
#define CC1101_ASK_OOK_BOUNDARY_16_DB 0b00000011 // 1 0 16 dB
#define RADIOLIB_CC1101_HYST_LEVEL_NONE 0b00000000 // 7 6 AGC hysteresis level: none
#define RADIOLIB_CC1101_HYST_LEVEL_LOW 0b01000000 // 7 6 low
#define RADIOLIB_CC1101_HYST_LEVEL_MEDIUM 0b10000000 // 7 6 medium (default)
#define RADIOLIB_CC1101_HYST_LEVEL_HIGH 0b11000000 // 7 6 high
#define RADIOLIB_CC1101_WAIT_TIME_8_SAMPLES 0b00000000 // 5 4 AGC wait time: 8 samples
#define RADIOLIB_CC1101_WAIT_TIME_16_SAMPLES 0b00010000 // 5 4 16 samples (default)
#define RADIOLIB_CC1101_WAIT_TIME_24_SAMPLES 0b00100000 // 5 4 24 samples
#define RADIOLIB_CC1101_WAIT_TIME_32_SAMPLES 0b00110000 // 5 4 32 samples
#define RADIOLIB_CC1101_AGC_FREEZE_NEVER 0b00000000 // 3 2 freeze AGC gain: never (default)
#define RADIOLIB_CC1101_AGC_FREEZE_SYNC_WORD 0b00000100 // 3 2 when sync word is found
#define RADIOLIB_CC1101_AGC_FREEZE_MANUAL_A 0b00001000 // 3 2 manually freeze analog control
#define RADIOLIB_CC1101_AGC_FREEZE_MANUAL_AD 0b00001100 // 3 2 manually freeze analog and digital control
#define RADIOLIB_CC1101_FILTER_LENGTH_8 0b00000000 // 1 0 averaging length for channel filter: 8 samples
#define RADIOLIB_CC1101_FILTER_LENGTH_16 0b00000001 // 1 0 16 samples (default)
#define RADIOLIB_CC1101_FILTER_LENGTH_32 0b00000010 // 1 0 32 samples
#define RADIOLIB_CC1101_FILTER_LENGTH_64 0b00000011 // 1 0 64 samples
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_4_DB 0b00000000 // 1 0 ASK/OOK decision boundary: 4 dB
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_8_DB 0b00000001 // 1 0 8 dB (default)
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_12_DB 0b00000010 // 1 0 12 dB
#define RADIOLIB_CC1101_ASK_OOK_BOUNDARY_16_DB 0b00000011 // 1 0 16 dB
// CC1101_REG_WOREVT1 + REG_WOREVT0
#define CC1101_EVENT0_TIMEOUT_MSB 0x87 // 7 0 EVENT0 timeout: t_event0 = (750 / f(XOSC)) * EVENT0_TIMEOUT * 2^(5 * WOR_RES) [s]
#define CC1101_EVENT0_TIMEOUT_LSB 0x6B // 7 0 default value for 26 MHz crystal: 1.0 s
#define RADIOLIB_CC1101_EVENT0_TIMEOUT_MSB 0x87 // 7 0 EVENT0 timeout: t_event0 = (750 / f(XOSC)) * EVENT0_TIMEOUT * 2^(5 * WOR_RES) [s]
#define RADIOLIB_CC1101_EVENT0_TIMEOUT_LSB 0x6B // 7 0 default value for 26 MHz crystal: 1.0 s
// CC1101_REG_WORCTRL
#define CC1101_RC_POWER_UP 0b00000000 // 7 7 power up RC oscillator
#define CC1101_RC_POWER_DOWN 0b10000000 // 7 7 power down RC oscillator
#define CC1101_EVENT1_TIMEOUT_4 0b00000000 // 6 4 EVENT1 timeout: 4 RC periods
#define CC1101_EVENT1_TIMEOUT_6 0b00010000 // 6 4 6 RC periods
#define CC1101_EVENT1_TIMEOUT_8 0b00100000 // 6 4 8 RC periods
#define CC1101_EVENT1_TIMEOUT_12 0b00110000 // 6 4 12 RC periods
#define CC1101_EVENT1_TIMEOUT_16 0b01000000 // 6 4 16 RC periods
#define CC1101_EVENT1_TIMEOUT_24 0b01010000 // 6 4 24 RC periods
#define CC1101_EVENT1_TIMEOUT_32 0b01100000 // 6 4 32 RC periods
#define CC1101_EVENT1_TIMEOUT_48 0b01110000 // 6 4 48 RC periods (default)
#define CC1101_RC_CAL_OFF 0b00000000 // 3 3 disable RC oscillator calibration
#define CC1101_RC_CAL_ON 0b00001000 // 3 3 enable RC oscillator calibration (default)
#define CC1101_WOR_RES_1 0b00000000 // 1 0 EVENT0 resolution: 1 period (default)
#define CC1101_WOR_RES_2_5 0b00000001 // 1 0 2^5 periods
#define CC1101_WOR_RES_2_10 0b00000010 // 1 0 2^10 periods
#define CC1101_WOR_RES_2_15 0b00000011 // 1 0 2^15 periods
#define RADIOLIB_CC1101_RC_POWER_UP 0b00000000 // 7 7 power up RC oscillator
#define RADIOLIB_CC1101_RC_POWER_DOWN 0b10000000 // 7 7 power down RC oscillator
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_4 0b00000000 // 6 4 EVENT1 timeout: 4 RC periods
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_6 0b00010000 // 6 4 6 RC periods
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_8 0b00100000 // 6 4 8 RC periods
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_12 0b00110000 // 6 4 12 RC periods
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_16 0b01000000 // 6 4 16 RC periods
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_24 0b01010000 // 6 4 24 RC periods
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_32 0b01100000 // 6 4 32 RC periods
#define RADIOLIB_CC1101_EVENT1_TIMEOUT_48 0b01110000 // 6 4 48 RC periods (default)
#define RADIOLIB_CC1101_RC_CAL_OFF 0b00000000 // 3 3 disable RC oscillator calibration
#define RADIOLIB_CC1101_RC_CAL_ON 0b00001000 // 3 3 enable RC oscillator calibration (default)
#define RADIOLIB_CC1101_WOR_RES_1 0b00000000 // 1 0 EVENT0 resolution: 1 period (default)
#define RADIOLIB_CC1101_WOR_RES_2_5 0b00000001 // 1 0 2^5 periods
#define RADIOLIB_CC1101_WOR_RES_2_10 0b00000010 // 1 0 2^10 periods
#define RADIOLIB_CC1101_WOR_RES_2_15 0b00000011 // 1 0 2^15 periods
// CC1101_REG_FREND1
#define CC1101_LNA_CURRENT 0x01 // 7 6 front-end LNA PTAT current output adjustment
#define CC1101_LNA2MIX_CURRENT 0x01 // 5 4 front-end PTAT output adjustment
#define CC1101_LODIV_BUF_CURRENT_RX 0x01 // 3 2 Rx LO buffer current adjustment
#define CC1101_MIX_CURRENT 0x02 // 1 0 mixer current adjustment
#define RADIOLIB_CC1101_LNA_CURRENT 0x01 // 7 6 front-end LNA PTAT current output adjustment
#define RADIOLIB_CC1101_LNA2MIX_CURRENT 0x01 // 5 4 front-end PTAT output adjustment
#define RADIOLIB_CC1101_LODIV_BUF_CURRENT_RX 0x01 // 3 2 Rx LO buffer current adjustment
#define RADIOLIB_CC1101_MIX_CURRENT 0x02 // 1 0 mixer current adjustment
// CC1101_REG_FREND0
#define CC1101_LODIV_BUF_CURRENT_TX 0x01 // 5 4 Tx LO buffer current adjustment
#define CC1101_PA_POWER 0x00 // 2 0 set power amplifier power according to PATABLE
#define RADIOLIB_CC1101_LODIV_BUF_CURRENT_TX 0x01 // 5 4 Tx LO buffer current adjustment
#define RADIOLIB_CC1101_PA_POWER 0x00 // 2 0 set power amplifier power according to PATABLE
// CC1101_REG_FSCAL3
#define CC1101_CHP_CURR_CAL_OFF 0b00000000 // 5 4 disable charge pump calibration
#define CC1101_CHP_CURR_CAL_ON 0b00100000 // 5 4 enable charge pump calibration (default)
#define CC1101_FSCAL3 0x09 // 3 0 charge pump output current: I_out = I_0 * 2^(FSCAL3/4) [A]
#define RADIOLIB_CC1101_CHP_CURR_CAL_OFF 0b00000000 // 5 4 disable charge pump calibration
#define RADIOLIB_CC1101_CHP_CURR_CAL_ON 0b00100000 // 5 4 enable charge pump calibration (default)
#define RADIOLIB_CC1101_FSCAL3 0x09 // 3 0 charge pump output current: I_out = I_0 * 2^(FSCAL3/4) [A]
// CC1101_REG_FSCAL2
#define CC1101_VCO_CORE_LOW 0b00000000 // 5 5 VCO: low (default)
#define CC1101_VCO_CORE_HIGH 0b00100000 // 5 5 high
#define CC1101_FSCAL2 0x0A // 4 0 VCO current result/override
#define RADIOLIB_CC1101_VCO_CORE_LOW 0b00000000 // 5 5 VCO: low (default)
#define RADIOLIB_CC1101_VCO_CORE_HIGH 0b00100000 // 5 5 high
#define RADIOLIB_CC1101_FSCAL2 0x0A // 4 0 VCO current result/override
// CC1101_REG_FSCAL1
#define CC1101_FSCAL1 0x20 // 5 0 capacitor array setting for coarse VCO tuning
#define RADIOLIB_CC1101_FSCAL1 0x20 // 5 0 capacitor array setting for coarse VCO tuning
// CC1101_REG_FSCAL0
#define CC1101_FSCAL0 0x0D // 6 0 frequency synthesizer calibration setting
#define RADIOLIB_CC1101_FSCAL0 0x0D // 6 0 frequency synthesizer calibration setting
// CC1101_REG_RCCTRL1
#define CC1101_RCCTRL1 0x41 // 6 0 RC oscillator configuration
#define RADIOLIB_CC1101_RCCTRL1 0x41 // 6 0 RC oscillator configuration
// CC1101_REG_RCCTRL0
#define CC1101_RCCTRL0 0x00 // 6 0 RC oscillator configuration
#define RADIOLIB_CC1101_RCCTRL0 0x00 // 6 0 RC oscillator configuration
// CC1101_REG_PTEST
#define CC1101_TEMP_SENS_IDLE_OFF 0x7F // 7 0 temperature sensor will not be available in idle mode (default)
#define CC1101_TEMP_SENS_IDLE_ON 0xBF // 7 0 temperature sensor will be available in idle mode
#define RADIOLIB_CC1101_TEMP_SENS_IDLE_OFF 0x7F // 7 0 temperature sensor will not be available in idle mode (default)
#define RADIOLIB_CC1101_TEMP_SENS_IDLE_ON 0xBF // 7 0 temperature sensor will be available in idle mode
// CC1101_REG_TEST0
#define CC1101_VCO_SEL_CAL_OFF 0b00000000 // 1 1 disable VCO selection calibration stage
#define CC1101_VCO_SEL_CAL_ON 0b00000010 // 1 1 enable VCO selection calibration stage
#define RADIOLIB_CC1101_VCO_SEL_CAL_OFF 0b00000000 // 1 1 disable VCO selection calibration stage
#define RADIOLIB_CC1101_VCO_SEL_CAL_ON 0b00000010 // 1 1 enable VCO selection calibration stage
// CC1101_REG_PARTNUM
#define CC1101_PARTNUM 0x00
#define RADIOLIB_CC1101_PARTNUM 0x00
// CC1101_REG_VERSION
#define CC1101_VERSION_CURRENT 0x14
#define CC1101_VERSION_LEGACY 0x04
#define CC1101_VERSION_CLONE 0x17
#define RADIOLIB_CC1101_VERSION_CURRENT 0x14
#define RADIOLIB_CC1101_VERSION_LEGACY 0x04
#define RADIOLIB_CC1101_VERSION_CLONE 0x17
// CC1101_REG_MARCSTATE
#define CC1101_MARC_STATE_SLEEP 0x00 // 4 0 main radio control state: sleep
#define CC1101_MARC_STATE_IDLE 0x01 // 4 0 idle
#define CC1101_MARC_STATE_XOFF 0x02 // 4 0 XOFF
#define CC1101_MARC_STATE_VCOON_MC 0x03 // 4 0 VCOON_MC
#define CC1101_MARC_STATE_REGON_MC 0x04 // 4 0 REGON_MC
#define CC1101_MARC_STATE_MANCAL 0x05 // 4 0 MANCAL
#define CC1101_MARC_STATE_VCOON 0x06 // 4 0 VCOON
#define CC1101_MARC_STATE_REGON 0x07 // 4 0 REGON
#define CC1101_MARC_STATE_STARTCAL 0x08 // 4 0 STARTCAL
#define CC1101_MARC_STATE_BWBOOST 0x09 // 4 0 BWBOOST
#define CC1101_MARC_STATE_FS_LOCK 0x0A // 4 0 FS_LOCK
#define CC1101_MARC_STATE_IFADCON 0x0B // 4 0 IFADCON
#define CC1101_MARC_STATE_ENDCAL 0x0C // 4 0 ENDCAL
#define CC1101_MARC_STATE_RX 0x0D // 4 0 RX
#define CC1101_MARC_STATE_RX_END 0x0E // 4 0 RX_END
#define CC1101_MARC_STATE_RX_RST 0x0F // 4 0 RX_RST
#define CC1101_MARC_STATE_TXRX_SWITCH 0x10 // 4 0 TXRX_SWITCH
#define CC1101_MARC_STATE_RXFIFO_OVERFLOW 0x11 // 4 0 RXFIFO_OVERFLOW
#define CC1101_MARC_STATE_FSTXON 0x12 // 4 0 FSTXON
#define CC1101_MARC_STATE_TX 0x13 // 4 0 TX
#define CC1101_MARC_STATE_TX_END 0x14 // 4 0 TX_END
#define CC1101_MARC_STATE_RXTX_SWITCH 0x15 // 4 0 RXTX_SWITCH
#define CC1101_MARC_STATE_TXFIFO_UNDERFLOW 0x16 // 4 0 TXFIFO_UNDERFLOW
#define RADIOLIB_CC1101_MARC_STATE_SLEEP 0x00 // 4 0 main radio control state: sleep
#define RADIOLIB_CC1101_MARC_STATE_IDLE 0x01 // 4 0 idle
#define RADIOLIB_CC1101_MARC_STATE_XOFF 0x02 // 4 0 XOFF
#define RADIOLIB_CC1101_MARC_STATE_VCOON_MC 0x03 // 4 0 VCOON_MC
#define RADIOLIB_CC1101_MARC_STATE_REGON_MC 0x04 // 4 0 REGON_MC
#define RADIOLIB_CC1101_MARC_STATE_MANCAL 0x05 // 4 0 MANCAL
#define RADIOLIB_CC1101_MARC_STATE_VCOON 0x06 // 4 0 VCOON
#define RADIOLIB_CC1101_MARC_STATE_REGON 0x07 // 4 0 REGON
#define RADIOLIB_CC1101_MARC_STATE_STARTCAL 0x08 // 4 0 STARTCAL
#define RADIOLIB_CC1101_MARC_STATE_BWBOOST 0x09 // 4 0 BWBOOST
#define RADIOLIB_CC1101_MARC_STATE_FS_LOCK 0x0A // 4 0 FS_LOCK
#define RADIOLIB_CC1101_MARC_STATE_IFADCON 0x0B // 4 0 IFADCON
#define RADIOLIB_CC1101_MARC_STATE_ENDCAL 0x0C // 4 0 ENDCAL
#define RADIOLIB_CC1101_MARC_STATE_RX 0x0D // 4 0 RX
#define RADIOLIB_CC1101_MARC_STATE_RX_END 0x0E // 4 0 RX_END
#define RADIOLIB_CC1101_MARC_STATE_RX_RST 0x0F // 4 0 RX_RST
#define RADIOLIB_CC1101_MARC_STATE_TXRX_SWITCH 0x10 // 4 0 TXRX_SWITCH
#define RADIOLIB_CC1101_MARC_STATE_RXFIFO_OVERFLOW 0x11 // 4 0 RXFIFO_OVERFLOW
#define RADIOLIB_CC1101_MARC_STATE_FSTXON 0x12 // 4 0 FSTXON
#define RADIOLIB_CC1101_MARC_STATE_TX 0x13 // 4 0 TX
#define RADIOLIB_CC1101_MARC_STATE_TX_END 0x14 // 4 0 TX_END
#define RADIOLIB_CC1101_MARC_STATE_RXTX_SWITCH 0x15 // 4 0 RXTX_SWITCH
#define RADIOLIB_CC1101_MARC_STATE_TXFIFO_UNDERFLOW 0x16 // 4 0 TXFIFO_UNDERFLOW
// CC1101_REG_WORTIME1 + REG_WORTIME0
#define CC1101_WORTIME_MSB 0x00 // 7 0 WOR timer value
#define CC1101_WORTIME_LSB 0x00 // 7 0
#define RADIOLIB_CC1101_WORTIME_MSB 0x00 // 7 0 WOR timer value
#define RADIOLIB_CC1101_WORTIME_LSB 0x00 // 7 0
// CC1101_REG_PKTSTATUS
#define CC1101_CRC_OK 0b10000000 // 7 7 CRC check passed
#define CC1101_CRC_ERROR 0b00000000 // 7 7 CRC check failed
#define CC1101_CS 0b01000000 // 6 6 carrier sense
#define CC1101_PQT_REACHED 0b00100000 // 5 5 preamble quality reached
#define CC1101_CCA 0b00010000 // 4 4 channel clear
#define CC1101_SFD 0b00001000 // 3 3 start of frame delimiter - sync word received
#define CC1101_GDO2_ACTIVE 0b00000100 // 2 2 GDO2 is active/asserted
#define CC1101_GDO0_ACTIVE 0b00000001 // 0 0 GDO0 is active/asserted
#define RADIOLIB_CC1101_CRC_OK 0b10000000 // 7 7 CRC check passed
#define RADIOLIB_CC1101_CRC_ERROR 0b00000000 // 7 7 CRC check failed
#define RADIOLIB_CC1101_CS 0b01000000 // 6 6 carrier sense
#define RADIOLIB_CC1101_PQT_REACHED 0b00100000 // 5 5 preamble quality reached
#define RADIOLIB_CC1101_CCA 0b00010000 // 4 4 channel clear
#define RADIOLIB_CC1101_SFD 0b00001000 // 3 3 start of frame delimiter - sync word received
#define RADIOLIB_CC1101_GDO2_ACTIVE 0b00000100 // 2 2 GDO2 is active/asserted
#define RADIOLIB_CC1101_GDO0_ACTIVE 0b00000001 // 0 0 GDO0 is active/asserted
/*!
\class CC1101
@ -519,6 +519,8 @@ class CC1101: public PhysicalLayer {
*/
CC1101(Module* module);
Module* getMod();
// basic methods
/*!
@ -799,7 +801,7 @@ class CC1101: public PhysicalLayer {
\returns \ref status_codes
*/
int16_t fixedPacketLengthMode(uint8_t len = CC1101_MAX_PACKET_LENGTH);
int16_t fixedPacketLengthMode(uint8_t len = RADIOLIB_CC1101_MAX_PACKET_LENGTH);
/*!
\brief Set modem in variable packet length mode.
@ -808,7 +810,7 @@ class CC1101: public PhysicalLayer {
\returns \ref status_codes
*/
int16_t variablePacketLengthMode(uint8_t maxLen = CC1101_MAX_PACKET_LENGTH);
int16_t variablePacketLengthMode(uint8_t maxLen = RADIOLIB_CC1101_MAX_PACKET_LENGTH);
/*!
\brief Enable sync word filtering and generation.
@ -935,11 +937,11 @@ class CC1101: public PhysicalLayer {
float _br = 0;
uint8_t _rawRSSI = 0;
uint8_t _rawLQI = 0;
uint8_t _modulation = CC1101_MOD_FORMAT_2_FSK;
uint8_t _modulation = RADIOLIB_CC1101_MOD_FORMAT_2_FSK;
size_t _packetLength = 0;
bool _packetLengthQueried = false;
uint8_t _packetLengthConfig = CC1101_LENGTH_CONFIG_VARIABLE;
uint8_t _packetLengthConfig = RADIOLIB_CC1101_LENGTH_CONFIG_VARIABLE;
bool _promiscuous = false;
bool _crcOn = true;