[CC1101] Implemented packet transmission
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jgromes
parent
b1e0b646b0
commit
e65dd10e26
3 changed files with 136 additions and 17 deletions
56
examples/CC1101_Transmit/CC1101_Transmit.ino
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56
examples/CC1101_Transmit/CC1101_Transmit.ino
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@ -0,0 +1,56 @@
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/*
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KiteLib CC1101 Transmit Example
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This example transmits packets using RF69 FSK radio module.
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*/
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// include the library
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#include <KiteLib.h>
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// CC1101 is in slot A on the shield
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CC1101 cc = Kite.ModuleA;
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void setup() {
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Serial.begin(9600);
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// initialize CC1101
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Serial.print(F("[CC1101] Initializing ... "));
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// carrier frequency: 868.0 MHz
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// bit rate: 115.2 kbps
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// Rx bandwidth: 203 kHz
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// frequency deviation: 48.0 kHz
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int state = cc.begin(434);
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if(state == ERR_NONE) {
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Serial.println(F("success!"));
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} else {
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Serial.print(F("failed, code "));
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Serial.println(state);
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while(true);
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}
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}
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void loop() {
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Serial.print(F("[CC1101] Transmitting packet ... "));
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// you can transmit C-string or Arduino string up to 255 characters long
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int state = cc.transmit("Hello World!");
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// you can also transmit byte array up to 255 bytes long
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/*
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byte byteArr[] = {0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF};
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int state = cc.transmit(byteArr, 8);
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*/
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if (state == ERR_NONE) {
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// the packet was successfully transmitted
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Serial.println(" success!");
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} else if (state == ERR_PACKET_TOO_LONG) {
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// the supplied packet was longer than 255 bytes
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Serial.println(" too long!");
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}
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// wait for a second before transmitting again
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delay(1000);
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}
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@ -81,12 +81,37 @@ int16_t CC1101::transmit(const char* str, uint8_t addr) {
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}
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int16_t CC1101::transmit(uint8_t* data, size_t len, uint8_t addr) {
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// TODO
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// check packet length
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if(len > 255) {
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return(ERR_PACKET_TOO_LONG);
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}
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// set GDO0 and GDO2 mapping
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// set mode to standby
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standby();
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// set GDO0 mapping
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_mod->SPIsetRegValue(CC1101_REG_IOCFG0, CC1101_GDOX_SYNC_WORD_SENT_OR_RECEIVED);
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// write packet length
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_mod->SPIwriteRegister(CC1101_REG_FIFO, len);
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// write packet to FIFO
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_mod->SPIwriteRegisterBurst(CC1101_REG_FIFO | CC1101_CMD_BURST, data, len);
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// set mode to transmit
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SPIsendCommand(CC1101_CMD_TX);
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// wait for transmission start
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while(!digitalRead(_mod->getInt0()));
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// wait for transmission end
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while(digitalRead(_mod->getInt0()));
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// set mode to standby
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standby();
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// flush Tx FIFO
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SPIsendCommand(CC1101_CMD_FLUSH_TX);
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return(ERR_NONE);
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}
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@ -107,7 +132,10 @@ int16_t CC1101::receive(String& str, size_t len) {
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int16_t CC1101::receive(uint8_t* data, size_t len) {
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// TODO
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// set mode to standby
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// set GDO0 and GDO2 mapping
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return(ERR_NONE);
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}
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@ -138,8 +166,14 @@ int16_t CC1101::transmitDirect(uint32_t FRF) {
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}
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int16_t CC1101::receiveDirect() {
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// TODO
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// activate direct mode
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int16_t state = directMode();
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if(state != ERR_NONE) {
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return(state);
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}
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// start receiving
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SPIsendCommand(CC1101_CMD_RX);
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return(ERR_NONE);
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}
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@ -234,10 +268,23 @@ int16_t CC1101::setFrequencyDeviation(float freqDev) {
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return(state);
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}
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int16_t CC1101::config() {
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// enable autmatic frequency synthesizer calibration
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int16_t state = _mod->SPIsetRegValue(CC1101_REG_MCSM0, CC1101_FS_AUTOCAL_IDLE_TO_RXTX, 5, 4);
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int16_t CC1101::setSyncWord(uint8_t syncH, uint8_t syncL) {
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// set sync word
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int16_t state = _mod->SPIsetRegValue(CC1101_REG_SYNC1, syncH);
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state |= _mod->SPIsetRegValue(CC1101_REG_SYNC0, syncL);
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return(state);
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}
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int16_t CC1101::config() {
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// enable automatic frequency synthesizer calibration
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int16_t state = _mod->SPIsetRegValue(CC1101_REG_MCSM0, CC1101_FS_AUTOCAL_IDLE_TO_RXTX, 5, 4);
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if(state != ERR_NONE) {
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return(state);
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}
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// set output power
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_mod->SPIwriteRegister(CC1101_REG_PATABLE, 0x60);
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return(state);
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}
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@ -280,12 +327,26 @@ void CC1101::getExpMant(float target, uint16_t mantOffset, uint8_t divExp, uint8
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}
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}
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void CC1101::SPIwriteRegisterBurst(uint8_t reg, uint8_t* data, size_t len) {
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_mod->SPIwriteRegisterBurst(reg | CC1101_CMD_BURST, data, len);
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}
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int16_t CC1101::SPIgetRegValue(uint8_t reg, uint8_t msb, uint8_t lsb) {
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return(_mod->SPIgetRegValue(reg | CC1101_CMD_ACCESS_STATUS_REG, msb, lsb));
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// status registers require special command
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if(reg > CC1101_REG_TEST0) {
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reg |= CC1101_CMD_ACCESS_STATUS_REG;
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}
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return(_mod->SPIgetRegValue(reg, msb, lsb));
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}
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uint8_t CC1101::SPIreadRegister(uint8_t reg) {
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return(_mod->SPIreadRegister(reg | CC1101_CMD_ACCESS_STATUS_REG));
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// status registers require special command
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if(reg > CC1101_REG_TEST0) {
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reg |= CC1101_CMD_ACCESS_STATUS_REG;
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}
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return(_mod->SPIreadRegister(reg));
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}
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void CC1101::SPIsendCommand(uint8_t cmd) {
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@ -30,8 +30,6 @@
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#define CC1101_CMD_FLUSH_TX 0x3B
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#define CC1101_CMD_WOR_RESET 0x3C
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#define CC1101_CMD_NOP 0x3D
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#define CC1101_CMD_PATABLE 0x3E
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#define CC1101_CMD_FIFO 0x3F
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// CC1101 regsiter map
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#define CC1101_REG_IOCFG2 0x00
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@ -61,9 +59,9 @@
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#define CC1101_REG_MCSM0 0x18
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#define CC1101_REG_FOCCFG 0x19
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#define CC1101_REG_BSCFG 0x1A
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#define CC1101_REG_AGCTRL2 0x1B
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#define CC1101_REG_AGCTRL1 0x1C
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#define CC1101_REG_AGCTRL0 0x1D
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#define CC1101_REG_AGCCTRL2 0x1B
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#define CC1101_REG_AGCCTRL1 0x1C
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#define CC1101_REG_AGCCTRL0 0x1D
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#define CC1101_REG_WOREVT1 0x1E
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#define CC1101_REG_WOREVT0 0x1F
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#define CC1101_REG_WORCTRL 0x20
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@ -95,6 +93,8 @@
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#define CC1101_REG_RXBYTES 0x3B
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#define CC1101_REG_RCCTRL1_STATUS 0x3C
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#define CC1101_REG_RCCTRL0_STATUS 0x3D
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#define CC1101_REG_PATABLE 0x3E
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#define CC1101_REG_FIFO 0x3F
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// CC1101_REG_IOCFG2 MSB LSB DESCRIPTION
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#define CC1101_GDO2_NORM 0b00000000 // 6 6 GDO2 output: active high (default)
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@ -513,6 +513,7 @@ class CC1101: public PhysicalLayer {
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int16_t setBitRate(float br);
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int16_t setRxBandwidth(float rxBw);
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int16_t setFrequencyDeviation(float freqDev);
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int16_t setSyncWord(uint8_t syncH, uint8_t syncL);
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private:
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Module* _mod;
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@ -521,7 +522,8 @@ class CC1101: public PhysicalLayer {
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int16_t directMode();
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void getExpMant(float target, uint16_t mantOffset, uint8_t divExp, uint8_t expMax, uint8_t& exp, uint8_t& mant);
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// SPI read overrides to set access bit for status registers
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// SPI read overrides to set bit for burst write and status registers access
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void SPIwriteRegisterBurst(uint8_t reg, uint8_t* data, size_t len);
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int16_t SPIgetRegValue(uint8_t reg, uint8_t msb = 7, uint8_t lsb = 0);
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uint8_t SPIreadRegister(uint8_t reg);
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