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Fixed methods for changing LoRa settings

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This commit is contained in:
Jan Gromeš 2018-03-09 11:13:26 +01:00
parent 6826cdfa19
commit dda6db124c
4 changed files with 191 additions and 207 deletions
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164
src/SX1272.cpp
View file

@ -5,65 +5,9 @@ SX1272::SX1272(Module* module) {
} }
uint8_t SX1272::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t addrEeprom) { uint8_t SX1272::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t addrEeprom) {
switch(bw) { _bw = bw;
case BW_125_00_KHZ: _sf = sf;
_bw = SX1272_BW_125_00_KHZ; _cr = cr;
break;
case BW_250_00_KHZ:
_bw = SX1272_BW_250_00_KHZ;
break;
case BW_500_00_KHZ:
_bw = SX1272_BW_500_00_KHZ;
break;
default:
_bw = SX1272_BW_250_00_KHZ;
break;
}
switch(sf) {
case SF_6:
_sf = SX1272_SF_6;
break;
case SF_7:
_sf = SX1272_SF_7;
break;
case SF_8:
_sf = SX1272_SF_8;
break;
case SF_9:
_sf = SX1272_SF_9;
break;
case SF_10:
_sf = SX1272_SF_10;
break;
case SF_11:
_sf = SX1272_SF_11;
break;
case SF_12:
_sf = SX1272_SF_12;
break;
default:
_sf = SX1272_SF_12;
break;
}
switch(cr) {
case CR_4_5:
_cr = SX1272_CR_4_5;
break;
case CR_4_6:
_cr = SX1272_CR_4_6;
break;
case CR_4_7:
_cr = SX1272_CR_4_7;
break;
case CR_4_8:
_cr = SX1272_CR_4_8;
break;
default:
_cr = SX1272_CR_4_5;
break;
}
#ifdef ESP32 #ifdef ESP32
if(!EEPROM.begin(9)) { if(!EEPROM.begin(9)) {
@ -245,47 +189,88 @@ uint8_t SX1272::standby() {
} }
uint8_t SX1272::setBandwidth(Bandwidth bw) { uint8_t SX1272::setBandwidth(Bandwidth bw) {
return(config(bw, _sf, _cr)); uint8_t state = config(bw, _sf, _cr);
if(state == ERR_NONE) {
_bw = bw;
}
return(state);
} }
uint8_t SX1272::setSpreadingFactor(SpreadingFactor sf) { uint8_t SX1272::setSpreadingFactor(SpreadingFactor sf) {
return(config(_bw, sf, _cr)); uint8_t state = config(_bw, sf, _cr);
if(state == ERR_NONE) {
_sf = sf;
}
return(state);
} }
uint8_t SX1272::setCodingRate(CodingRate cr) { uint8_t SX1272::setCodingRate(CodingRate cr) {
return(config(_bw, _sf, cr)); uint8_t state = config(_bw, _sf, cr);
if(state == ERR_NONE) {
_cr = cr;
}
return(state);
} }
void SX1272::generateLoRaAdress() { uint8_t SX1272::config(Bandwidth bw, SpreadingFactor sf, CodingRate cr) {
for(uint8_t i = _addrEeprom; i < (_addrEeprom + 8); i++) {
EEPROM.write(i, (uint8_t)random(0, 256));
}
}
uint8_t SX1272::config(uint8_t bw, uint8_t sf, uint8_t cr) {
uint8_t status = ERR_NONE; uint8_t status = ERR_NONE;
uint8_t newBandwidth, newSpreadingFactor, newCodingRate;
//check the supplied bw, cr and sf values //check the supplied bw, cr and sf values
if((bw != SX1272_BW_125_00_KHZ) && switch(bw) {
(bw != SX1272_BW_250_00_KHZ) && case BW_125_00_KHZ:
(bw != SX1272_BW_500_00_KHZ)) { newBandwidth = SX1272_BW_125_00_KHZ;
break;
case BW_250_00_KHZ:
newBandwidth = SX1272_BW_250_00_KHZ;
break;
case BW_500_00_KHZ:
newBandwidth = SX1272_BW_500_00_KHZ;
break;
default:
return(ERR_INVALID_BANDWIDTH); return(ERR_INVALID_BANDWIDTH);
} }
if((sf != SX1272_SF_6) && switch(sf) {
(sf != SX1272_SF_7) && case SF_6:
(sf != SX1272_SF_8) && newSpreadingFactor = SX1272_SF_6;
(sf != SX1272_SF_9) && break;
(sf != SX1272_SF_10) && case SF_7:
(sf != SX1272_SF_11) && newSpreadingFactor = SX1272_SF_7;
(sf != SX1272_SF_12)) { break;
case SF_8:
newSpreadingFactor = SX1272_SF_8;
break;
case SF_9:
newSpreadingFactor = SX1272_SF_9;
break;
case SF_10:
newSpreadingFactor = SX1272_SF_10;
break;
case SF_11:
newSpreadingFactor = SX1272_SF_11;
break;
case SF_12:
newSpreadingFactor = SX1272_SF_12;
break;
default:
return(ERR_INVALID_SPREADING_FACTOR); return(ERR_INVALID_SPREADING_FACTOR);
} }
if((cr != SX1272_CR_4_5) && switch(cr) {
(cr != SX1272_CR_4_6) && case CR_4_5:
(cr != SX1272_CR_4_7) && newCodingRate = SX1272_CR_4_5;
(cr != SX1272_CR_4_8)) { break;
case CR_4_6:
newCodingRate = SX1272_CR_4_6;
break;
case CR_4_7:
newCodingRate = SX1272_CR_4_7;
break;
case CR_4_8:
newCodingRate = SX1272_CR_4_8;
break;
default:
return(ERR_INVALID_CODING_RATE); return(ERR_INVALID_CODING_RATE);
} }
@ -325,14 +310,14 @@ uint8_t SX1272::config(uint8_t bw, uint8_t sf, uint8_t cr) {
} }
// basic setting (bw, cr, sf, header mode and CRC) // basic setting (bw, cr, sf, header mode and CRC)
if(sf == SX1272_SF_6) { if(newSpreadingFactor == SX1272_SF_6) {
status = _mod->SPIsetRegValue(SX1272_REG_MODEM_CONFIG_2, SX1272_SF_6 | SX1272_TX_MODE_SINGLE | SX1272_RX_CRC_MODE_OFF, 7, 2); status = _mod->SPIsetRegValue(SX1272_REG_MODEM_CONFIG_2, SX1272_SF_6 | SX1272_TX_MODE_SINGLE | SX1272_RX_CRC_MODE_OFF, 7, 2);
status = _mod->SPIsetRegValue(SX1272_REG_MODEM_CONFIG_1, bw | cr | SX1272_HEADER_IMPL_MODE); status = _mod->SPIsetRegValue(SX1272_REG_MODEM_CONFIG_1, newBandwidth | newCodingRate | SX1272_HEADER_IMPL_MODE);
status = _mod->SPIsetRegValue(SX1272_REG_DETECT_OPTIMIZE, SX1272_DETECT_OPTIMIZE_SF_6, 2, 0); status = _mod->SPIsetRegValue(SX1272_REG_DETECT_OPTIMIZE, SX1272_DETECT_OPTIMIZE_SF_6, 2, 0);
status = _mod->SPIsetRegValue(SX1272_REG_DETECTION_THRESHOLD, SX1272_DETECTION_THRESHOLD_SF_6); status = _mod->SPIsetRegValue(SX1272_REG_DETECTION_THRESHOLD, SX1272_DETECTION_THRESHOLD_SF_6);
} else { } else {
status = _mod->SPIsetRegValue(SX1272_REG_MODEM_CONFIG_2, sf | SX1272_TX_MODE_SINGLE | SX1272_RX_CRC_MODE_ON, 7, 2); status = _mod->SPIsetRegValue(SX1272_REG_MODEM_CONFIG_2, newSpreadingFactor | SX1272_TX_MODE_SINGLE | SX1272_RX_CRC_MODE_ON, 7, 2);
status = _mod->SPIsetRegValue(SX1272_REG_MODEM_CONFIG_1, bw | cr | SX1272_HEADER_EXPL_MODE); status = _mod->SPIsetRegValue(SX1272_REG_MODEM_CONFIG_1, newBandwidth | newCodingRate | SX1272_HEADER_EXPL_MODE);
status = _mod->SPIsetRegValue(SX1272_REG_DETECT_OPTIMIZE, SX1272_DETECT_OPTIMIZE_SF_7_12, 2, 0); status = _mod->SPIsetRegValue(SX1272_REG_DETECT_OPTIMIZE, SX1272_DETECT_OPTIMIZE_SF_7_12, 2, 0);
status = _mod->SPIsetRegValue(SX1272_REG_DETECTION_THRESHOLD, SX1272_DETECTION_THRESHOLD_SF_7_12); status = _mod->SPIsetRegValue(SX1272_REG_DETECTION_THRESHOLD, SX1272_DETECTION_THRESHOLD_SF_7_12);
} }
@ -354,6 +339,11 @@ uint8_t SX1272::config(uint8_t bw, uint8_t sf, uint8_t cr) {
return(status); return(status);
} }
// save the new settings
_bw = bw;
_sf = sf;
_cr = cr;
return(ERR_NONE); return(ERR_NONE);
} }

8
src/SX1272.h
View file

@ -193,7 +193,6 @@
//SX1272_REG_FIFO_RX_BASE_ADDR //SX1272_REG_FIFO_RX_BASE_ADDR
#define SX1272_FIFO_RX_BASE_ADDR_MAX 0b00000000 // 7 0 allocate the entire FIFO buffer for RX only #define SX1272_FIFO_RX_BASE_ADDR_MAX 0b00000000 // 7 0 allocate the entire FIFO buffer for RX only
class SX1272 { class SX1272 {
public: public:
SX1272(Module* module); SX1272(Module* module);
@ -214,13 +213,16 @@ class SX1272 {
private: private:
Module* _mod; Module* _mod;
uint8_t _bw, _sf, _cr;
Bandwidth _bw;
SpreadingFactor _sf;
CodingRate _cr;
uint8_t _address[8] = {0, 0, 0, 0, 0, 0, 0, 0}; uint8_t _address[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint16_t _addrEeprom; uint16_t _addrEeprom;
void generateLoRaAdress(); void generateLoRaAdress();
uint8_t config(uint8_t bw, uint8_t sf, uint8_t cr); uint8_t config(Bandwidth bw, SpreadingFactor sf, CodingRate cr);
uint8_t setMode(uint8_t mode); uint8_t setMode(uint8_t mode);
void clearIRQFlags(); void clearIRQFlags();
int8_t getLastPacketRSSI(); int8_t getLastPacketRSSI();

207
src/SX1278.cpp
View file

@ -5,86 +5,9 @@ SX1278::SX1278(Module* module) {
} }
uint8_t SX1278::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t addrEeprom) { uint8_t SX1278::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t addrEeprom) {
switch(bw) { _bw = bw;
case BW_7_80_KHZ: _sf = sf;
_bw = SX1278_BW_7_80_KHZ; _cr = cr;
break;
case BW_10_40_KHZ:
_bw = SX1278_BW_10_40_KHZ;
break;
case BW_15_60_KHZ:
_bw = SX1278_BW_15_60_KHZ;
break;
case BW_20_80_KHZ:
_bw = SX1278_BW_20_80_KHZ;
break;
case BW_31_25_KHZ:
_bw = SX1278_BW_31_25_KHZ;
break;
case BW_41_70_KHZ:
_bw = SX1278_BW_41_70_KHZ;
break;
case BW_62_50_KHZ:
_bw = SX1278_BW_62_50_KHZ;
break;
case BW_125_00_KHZ:
_bw = SX1278_BW_125_00_KHZ;
break;
case BW_250_00_KHZ:
_bw = SX1278_BW_250_00_KHZ;
break;
case BW_500_00_KHZ:
_bw = SX1278_BW_500_00_KHZ;
break;
default:
_bw = SX1278_BW_250_00_KHZ;
break;
}
switch(sf) {
case SF_6:
_sf = SX1278_SF_6;
break;
case SF_7:
_sf = SX1278_SF_7;
break;
case SF_8:
_sf = SX1278_SF_8;
break;
case SF_9:
_sf = SX1278_SF_9;
break;
case SF_10:
_sf = SX1278_SF_10;
break;
case SF_11:
_sf = SX1278_SF_11;
break;
case SF_12:
_sf = SX1278_SF_12;
break;
default:
_sf = SX1278_SF_12;
break;
}
switch(cr) {
case CR_4_5:
_cr = SX1278_CR_4_5;
break;
case CR_4_6:
_cr = SX1278_CR_4_6;
break;
case CR_4_7:
_cr = SX1278_CR_4_7;
break;
case CR_4_8:
_cr = SX1278_CR_4_8;
break;
default:
_cr = SX1278_CR_4_5;
break;
}
#ifdef ESP32 #ifdef ESP32
if(!EEPROM.begin(9)) { if(!EEPROM.begin(9)) {
@ -266,15 +189,27 @@ uint8_t SX1278::standby() {
} }
uint8_t SX1278::setBandwidth(Bandwidth bw) { uint8_t SX1278::setBandwidth(Bandwidth bw) {
return(config(bw, _sf, _cr)); uint8_t state = config(bw, _sf, _cr);
if(state == ERR_NONE) {
_bw = bw;
}
return(state);
} }
uint8_t SX1278::setSpreadingFactor(SpreadingFactor sf) { uint8_t SX1278::setSpreadingFactor(SpreadingFactor sf) {
return(config(_bw, sf, _cr)); uint8_t state = config(_bw, sf, _cr);
if(state == ERR_NONE) {
_sf = sf;
}
return(state);
} }
uint8_t SX1278::setCodingRate(CodingRate cr) { uint8_t SX1278::setCodingRate(CodingRate cr) {
return(config(_bw, _sf, cr)); uint8_t state = config(_bw, _sf, cr);
if(state == ERR_NONE) {
_cr = cr;
}
return(state);
} }
void SX1278::generateLoRaAdress() { void SX1278::generateLoRaAdress() {
@ -283,37 +218,86 @@ void SX1278::generateLoRaAdress() {
} }
} }
uint8_t SX1278::config(uint8_t bw, uint8_t sf, uint8_t cr) { uint8_t SX1278::config(Bandwidth bw, SpreadingFactor sf, CodingRate cr) {
uint8_t status = ERR_NONE; uint8_t status = ERR_NONE;
uint8_t newBandwidth, newSpreadingFactor, newCodingRate;
//check the supplied bw, cr and sf values //check the supplied bw, cr and sf values
if((bw != SX1278_BW_7_80_KHZ) && switch(bw) {
(bw != SX1278_BW_10_40_KHZ) && case BW_7_80_KHZ:
(bw != SX1278_BW_15_60_KHZ) && newBandwidth = SX1278_BW_7_80_KHZ;
(bw != SX1278_BW_20_80_KHZ) && break;
(bw != SX1278_BW_31_25_KHZ) && case BW_10_40_KHZ:
(bw != SX1278_BW_41_70_KHZ) && newBandwidth = SX1278_BW_10_40_KHZ;
(bw != SX1278_BW_62_50_KHZ) && break;
(bw != SX1278_BW_125_00_KHZ) && case BW_15_60_KHZ:
(bw != SX1278_BW_250_00_KHZ) && newBandwidth = SX1278_BW_15_60_KHZ;
(bw != SX1278_BW_500_00_KHZ)) { break;
case BW_20_80_KHZ:
newBandwidth = SX1278_BW_20_80_KHZ;
break;
case BW_31_25_KHZ:
newBandwidth = SX1278_BW_31_25_KHZ;
break;
case BW_41_70_KHZ:
newBandwidth = SX1278_BW_41_70_KHZ;
break;
case BW_62_50_KHZ:
newBandwidth = SX1278_BW_62_50_KHZ;
break;
case BW_125_00_KHZ:
newBandwidth = SX1278_BW_125_00_KHZ;
break;
case BW_250_00_KHZ:
newBandwidth = SX1278_BW_250_00_KHZ;
break;
case BW_500_00_KHZ:
newBandwidth = SX1278_BW_500_00_KHZ;
break;
default:
return(ERR_INVALID_BANDWIDTH); return(ERR_INVALID_BANDWIDTH);
} }
if((sf != SX1278_SF_6) && switch(sf) {
(sf != SX1278_SF_7) && case SF_6:
(sf != SX1278_SF_8) && newSpreadingFactor = SX1278_SF_6;
(sf != SX1278_SF_9) && break;
(sf != SX1278_SF_10) && case SF_7:
(sf != SX1278_SF_11) && newSpreadingFactor = SX1278_SF_7;
(sf != SX1278_SF_12)) { break;
case SF_8:
newSpreadingFactor = SX1278_SF_8;
break;
case SF_9:
newSpreadingFactor = SX1278_SF_9;
break;
case SF_10:
newSpreadingFactor = SX1278_SF_10;
break;
case SF_11:
newSpreadingFactor = SX1278_SF_11;
break;
case SF_12:
newSpreadingFactor = SX1278_SF_12;
break;
default:
return(ERR_INVALID_SPREADING_FACTOR); return(ERR_INVALID_SPREADING_FACTOR);
} }
if((cr != SX1278_CR_4_5) && switch(cr) {
(cr != SX1278_CR_4_6) && case CR_4_5:
(cr != SX1278_CR_4_7) && newCodingRate = SX1278_CR_4_5;
(cr != SX1278_CR_4_8)) { break;
case CR_4_6:
newCodingRate = SX1278_CR_4_6;
break;
case CR_4_7:
newCodingRate = SX1278_CR_4_7;
break;
case CR_4_8:
newCodingRate = SX1278_CR_4_8;
break;
default:
return(ERR_INVALID_CODING_RATE); return(ERR_INVALID_CODING_RATE);
} }
@ -353,14 +337,14 @@ uint8_t SX1278::config(uint8_t bw, uint8_t sf, uint8_t cr) {
} }
// basic setting (bw, cr, sf, header mode and CRC) // basic setting (bw, cr, sf, header mode and CRC)
if(sf == SX1278_SF_6) { if(newSpreadingFactor == SX1278_SF_6) {
status = _mod->SPIsetRegValue(SX1278_REG_MODEM_CONFIG_2, SX1278_SF_6 | SX1278_TX_MODE_SINGLE | SX1278_RX_CRC_MODE_OFF, 7, 2); status = _mod->SPIsetRegValue(SX1278_REG_MODEM_CONFIG_2, SX1278_SF_6 | SX1278_TX_MODE_SINGLE | SX1278_RX_CRC_MODE_OFF, 7, 2);
status = _mod->SPIsetRegValue(SX1278_REG_MODEM_CONFIG_1, bw | cr | SX1278_HEADER_IMPL_MODE); status = _mod->SPIsetRegValue(SX1278_REG_MODEM_CONFIG_1, newBandwidth | newCodingRate | SX1278_HEADER_IMPL_MODE);
status = _mod->SPIsetRegValue(SX1278_REG_DETECT_OPTIMIZE, SX1278_DETECT_OPTIMIZE_SF_6, 2, 0); status = _mod->SPIsetRegValue(SX1278_REG_DETECT_OPTIMIZE, SX1278_DETECT_OPTIMIZE_SF_6, 2, 0);
status = _mod->SPIsetRegValue(SX1278_REG_DETECTION_THRESHOLD, SX1278_DETECTION_THRESHOLD_SF_6); status = _mod->SPIsetRegValue(SX1278_REG_DETECTION_THRESHOLD, SX1278_DETECTION_THRESHOLD_SF_6);
} else { } else {
status = _mod->SPIsetRegValue(SX1278_REG_MODEM_CONFIG_2, sf | SX1278_TX_MODE_SINGLE | SX1278_RX_CRC_MODE_ON, 7, 2); status = _mod->SPIsetRegValue(SX1278_REG_MODEM_CONFIG_2, newSpreadingFactor | SX1278_TX_MODE_SINGLE | SX1278_RX_CRC_MODE_ON, 7, 2);
status = _mod->SPIsetRegValue(SX1278_REG_MODEM_CONFIG_1, bw | cr | SX1278_HEADER_EXPL_MODE); status = _mod->SPIsetRegValue(SX1278_REG_MODEM_CONFIG_1, newBandwidth | newCodingRate | SX1278_HEADER_EXPL_MODE);
status = _mod->SPIsetRegValue(SX1278_REG_DETECT_OPTIMIZE, SX1278_DETECT_OPTIMIZE_SF_7_12, 2, 0); status = _mod->SPIsetRegValue(SX1278_REG_DETECT_OPTIMIZE, SX1278_DETECT_OPTIMIZE_SF_7_12, 2, 0);
status = _mod->SPIsetRegValue(SX1278_REG_DETECTION_THRESHOLD, SX1278_DETECTION_THRESHOLD_SF_7_12); status = _mod->SPIsetRegValue(SX1278_REG_DETECTION_THRESHOLD, SX1278_DETECTION_THRESHOLD_SF_7_12);
} }
@ -382,6 +366,11 @@ uint8_t SX1278::config(uint8_t bw, uint8_t sf, uint8_t cr) {
return(status); return(status);
} }
// save the new settings
_bw = bw;
_sf = sf;
_cr = cr;
return(ERR_NONE); return(ERR_NONE);
} }

7
src/SX1278.h
View file

@ -224,13 +224,16 @@ class SX1278 {
private: private:
Module* _mod; Module* _mod;
uint8_t _bw, _sf, _cr;
Bandwidth _bw;
SpreadingFactor _sf;
CodingRate _cr;
uint16_t _addrEeprom; uint16_t _addrEeprom;
uint8_t _address[8] = {0, 0, 0, 0, 0, 0, 0, 0}; uint8_t _address[8] = {0, 0, 0, 0, 0, 0, 0, 0};
void generateLoRaAdress(); void generateLoRaAdress();
uint8_t config(uint8_t bw, uint8_t sf, uint8_t cr); uint8_t config(Bandwidth bw, SpreadingFactor sf, CodingRate cr);
uint8_t setMode(uint8_t mode); uint8_t setMode(uint8_t mode);
void clearIRQFlags(); void clearIRQFlags();
int8_t getLastPacketRSSI(); int8_t getLastPacketRSSI();