From dcfe1ed7b00d352baa8530938b8a798d438cce4a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20Grome=C5=A1?= Date: Sun, 11 Mar 2018 17:38:38 +0100 Subject: [PATCH] Updated RF69 core files --- src/RF69.cpp | 151 ++++++++++++++++++++++++++++++++- src/RF69.h | 233 +++++++++++++++++++++++++++++++++++++++++++++------ 2 files changed, 358 insertions(+), 26 deletions(-) diff --git a/src/RF69.cpp b/src/RF69.cpp index 36a5c9ce..241e4155 100644 --- a/src/RF69.cpp +++ b/src/RF69.cpp @@ -4,6 +4,155 @@ RF69::RF69(Module* module) { _mod = module; } -void RF69::begin() { +uint8_t RF69::begin() { + _mod->init(USE_SPI, INT_BOTH); + + uint8_t i = 0; + bool flagFound = false; + while((i < 10) && !flagFound) { + uint8_t version = _mod->SPIreadRegister(RF69_REG_VERSION); + if(version == 0x24) { + flagFound = true; + } else { + #ifdef DEBUG + Serial.print("RF69 not found! ("); + Serial.print(i + 1); + Serial.print(" of 10 tries) RF69_REG_VERSION == "); + + char buffHex[5]; + sprintf(buffHex, "0x%02X", version); + Serial.print(buffHex); + Serial.println(); + #endif + delay(1000); + i++; + } + } + + if(!flagFound) { + #ifdef DEBUG + Serial.println("No RF69 found!"); + #endif + SPI.end(); + return(ERR_CHIP_NOT_FOUND); + } + #ifdef DEBUG + else { + Serial.println("Found RF69! (match by RF69_REG_VERSION == 0x12)"); + } + #endif + + return(config()); +} + +uint8_t RF69::transmit(Packet& pack) { } + +uint8_t RF69::receive(Packet& pack) { + +} + +uint8_t RF69::sleep() { + return(setMode(RF69_SLEEP)); +} + +uint8_t RF69::standby() { + return(setMode(RF69_STANDBY)); +} + +uint8_t RF69::config() { + uint8_t status = ERR_NONE; + + //set mode to STANDBY + status = setMode(RF69_STANDBY); + if(status != ERR_NONE) { + return(status); + } + + //set operation modes + status = _mod->SPIsetRegValue(RF69_REG_OP_MODE, RF69_SEQUENCER_ON | RF69_LISTEN_OFF, 7, 6); + if(status != ERR_NONE) { + return(status); + } + + //set data mode and modulation type + status = _mod->SPIsetRegValue(RF69_REG_DATA_MODUL, RF69_PACKET_MODE | RF69_FSK, 6, 3); + status = _mod->SPIsetRegValue(RF69_REG_DATA_MODUL, RF69_NO_SHAPING, 1, 0); + if(status != ERR_NONE) { + return(status); + } + + //set bit rate (4.8 kbps by default) + status = _mod->SPIsetRegValue(RF69_REG_BITRATE_MSB, RF69_BITRATE_MSB, 7, 0); + status = _mod->SPIsetRegValue(RF69_REG_BITRATE_LSB, RF69_BITRATE_LSB, 7, 0); + if(status != ERR_NONE) { + return(status); + } + + //set allowed frequency deviation (5 kHz by default) + status = _mod->SPIsetRegValue(RF69_REG_FDEV_MSB, RF69_FDEV_MSB, 5, 0); + status = _mod->SPIsetRegValue(RF69_REG_FDEV_LSB, RF69_FDEV_LSB, 7, 0); + if(status != ERR_NONE) { + return(status); + } + + //set carrier frequency (915 MHz by default) + status = _mod->SPIsetRegValue(RF69_REG_FRF_MSB, RF69_FRF_MSB, 7, 0); + status = _mod->SPIsetRegValue(RF69_REG_FRF_MID, RF69_FRF_MID, 7, 0); + status = _mod->SPIsetRegValue(RF69_REG_FRF_LSB, RF69_FRF_LSB, 7, 0); + if(status != ERR_NONE) { + return(status); + } + + //set Rx bandwidth + status = _mod->SPIsetRegValue(RF69_REG_RX_BW, RF69_DCC_FREQ | RF69_RX_BW_MANT_16 | RF69_RX_BW_EXP, 7, 0); + if(status != ERR_NONE) { + return(status); + } + + //set RSSI threshold (2 dB by default) + status = _mod->SPIsetRegValue(RF69_REG_RSSI_THRESH, RF69_RSSI_THRESHOLD, 7, 0); + if(status != ERR_NONE) { + return(status); + } + + //set synchronization + status = _mod->SPIsetRegValue(RF69_REG_SYNC_CONFIG, RF69_SYNC_ON | RF69_FIFO_FILL_CONDITION_SYNC | RF69_SYNC_SIZE | RF69_SYNC_TOL, 7, 0); + if(status != ERR_NONE) { + return(status); + } + + //set packet configuration and disable encryption + status = _mod->SPIsetRegValue(RF69_REG_PACKET_CONFIG_1, RF69_PACKET_FORMAT_VARIABLE | RF69_DC_FREE_NONE | RF69_CRC_ON | RF69_CRC_AUTOCLEAR_ON | RF69_ADDRESS_FILTERING_OFF, 7, 1); + status = _mod->SPIsetRegValue(RF69_REG_PACKET_CONFIG_2, RF69_INTER_PACKET_RX_DELAY, 7, 4); + status = _mod->SPIsetRegValue(RF69_REG_PACKET_CONFIG_2, RF69_AUTO_RX_RESTART_ON | RF69_AES_OFF, 1, 0); + if(status != ERR_NONE) { + return(status); + } + + //set payload length (64 by default) + status = _mod->SPIsetRegValue(RF69_REG_PAYLOAD_LENGTH, RF69_PAYLOAD_LENGTH, 7, 0); + if(status != ERR_NONE) { + return(status); + } + + //set FIFO threshold + status = _mod->SPIsetRegValue(RF69_REG_FIFO_THRESH, RF69_TX_START_CONDITION_FIFO_NOT_EMPTY | RF69_FIFO_THRESHOLD, 7, 0); + if(status != ERR_NONE) { + return(status); + } + + //set output power + status = _mod->SPIsetRegValue(RF69_REG_PA_LEVEL, RF69_PA0_ON | RF69_PA1_OFF | RF69_PA2_OFF | RF69_OUTPUT_POWER, 7, 0); + if(status != ERR_NONE) { + return(status); + } + + return(ERR_NONE); +} + +uint8_t RF69::setMode(uint8_t mode) { + _mod->SPIsetRegValue(RF69_REG_OP_MODE, mode, 4, 2); + return(ERR_NONE); +} diff --git a/src/RF69.h b/src/RF69.h index 84352bea..5f9bcfe9 100644 --- a/src/RF69.h +++ b/src/RF69.h @@ -98,12 +98,12 @@ #define RF69_RX 0b00010000 // 4 2 receive //RF69_REG_DATA_MODUL -#define RF69_PACKET_MODE 0b00000000 // 6 5 packet mode +#define RF69_PACKET_MODE 0b00000000 // 6 5 packet mode (default) #define RF69_CONTINUOUS_MODE_WITH_SYNC 0b01000000 // 6 5 continuous mode with bit synchronizer #define RF69_CONTINUOUS_MODE 0b01100000 // 6 5 continuous mode without bit synchronizer -#define RF69_FSK 0b00000000 // 4 3 FSK modulation -#define RF69_OOK 0b00001000 // 4 3 OOK modulation -#define RF69_NO_SHAPING 0b00000000 // 1 0 modulation shaping: no shaping +#define RF69_FSK 0b00000000 // 4 3 modulation: FSK (default) +#define RF69_OOK 0b00001000 // 4 3 OOK +#define RF69_NO_SHAPING 0b00000000 // 1 0 modulation shaping: no shaping (default) #define RF69_FSK_GAUSSIAN_1_0 0b00000001 // 1 0 FSK modulation Gaussian filter, BT = 1.0 #define RF69_FSK_GAUSSIAN_0_5 0b00000010 // 1 0 FSK modulation Gaussian filter, BT = 0.5 #define RF69_FSK_GAUSSIAN_0_3 0b00000011 // 1 0 FSK modulation Gaussian filter, BT = 0.3 @@ -119,9 +119,9 @@ #define RF69_FDEV_LSB 0x52 // 7 0 default value: 5 kHz //RF69_REG_FRF_MSB + REG_FRF_MID + REG_FRF_LSB -#define SX1278_FRF_MSB 0xE4 // 7 0 carrier frequency setting: f_RF = (F(XOSC) * FRF)/2^19 -#define SX1278_FRF_MID 0xC0 // 7 0 where F(XOSC) = 32 MHz -#define SX1278_FRF_LSB 0x00 // 7 0 default value: 915 MHz +#define RF69_FRF_MSB 0xE4 // 7 0 carrier frequency setting: f_RF = (F(XOSC) * FRF)/2^19 +#define RF69_FRF_MID 0xC0 // 7 0 where F(XOSC) = 32 MHz +#define RF69_FRF_LSB 0x00 // 7 0 default value: 915 MHz //RF69_REG_OSC_1 #define RF69_RC_CAL_START 0b10000000 // 7 7 force RC oscillator calibration @@ -154,9 +154,9 @@ //RF69_REG_PA_LEVEL #define RF69_PA0_OFF 0b00000000 // 7 7 PA0 disabled #define RF69_PA0_ON 0b10000000 // 7 7 PA0 enabled (default) -#define RF69_PA1_OFF 0b00000000 // 6 6 PA1 disabled +#define RF69_PA1_OFF 0b00000000 // 6 6 PA1 disabled (default) #define RF69_PA1_ON 0b01000000 // 6 6 PA1 enabled -#define RF69_PA2_OFF 0b00000000 // 5 5 PA2 disabled +#define RF69_PA2_OFF 0b00000000 // 5 5 PA2 disabled (default) #define RF69_PA2_ON 0b00100000 // 5 5 PA2 enabled #define RF69_OUTPUT_POWER 0b00011111 // 4 0 output power: P_out = -18 + OUTPUT_POWER @@ -184,54 +184,237 @@ #define RF69_OCP_TRIM 0b00001010 // 3 0 OCP current: I_max(OCP_TRIM = 0b1010) = 95 mA //RF69_REG_LNA +#define RF69_LNA_Z_IN_50_OHM 0b00000000 // 7 7 LNA input impedance: 50 ohm +#define RF69_LNA_Z_IN_200_OHM 0b10000000 // 7 7 200 ohm +#define RF69_LNA_CURRENT_GAIN 0b00001000 // 5 3 manually set LNA current gain +#define RF69_LNA_GAIN_AUTO 0b00000000 // 2 0 LNA gain setting: set automatically by AGC +#define RF69_LNA_GAIN_MAX 0b00000001 // 2 0 max gain +#define RF69_LNA_GAIN_MAX_6_DB 0b00000010 // 2 0 max gain - 6 dB +#define RF69_LNA_GAIN_MAX_12_DB 0b00000011 // 2 0 max gain - 12 dB +#define RF69_LNA_GAIN_MAX_24_DB 0b00000100 // 2 0 max gain - 24 dB +#define RF69_LNA_GAIN_MAX_36_DB 0b00000101 // 2 0 max gain - 36 dB +#define RF69_LNA_GAIN_MAX_48_DB 0b00000110 // 2 0 max gain - 48 dB + //RF69_REG_RX_BW +#define RF69_DCC_FREQ 0b01000000 // 7 5 DC offset canceller cutoff frequency (4% Rx BW by default) +#define RF69_RX_BW_MANT_16 0b00000000 // 4 3 Channel filter bandwidth FSK: RxBw = F(XOSC)/(RxBwMant * 2^(RxBwExp + 2)) +#define RF69_RX_BW_MANT_20 0b00001000 // 4 3 OOK: RxBw = F(XOSC)/(RxBwMant * 2^(RxBwExp + 3)) +#define RF69_RX_BW_MANT_24 0b00010000 // 4 3 +#define RF69_RX_BW_EXP 0b00000101 // 2 0 default RxBwExp value + //RF69_REG_AFC_BW +#define RF69_DCC_FREQ_AFC 0b10000000 // 7 5 default DccFreq parameter for AFC +#define RF69_DCC_RX_BW_MANT_AFC 0b00001000 // 4 3 default RxBwMant parameter for AFC +#define RF69_DCC_RX_BW_EXP_AFC 0b00000011 // 2 0 default RxBwExp parameter for AFC + //RF69_REG_OOK_PEAK +#define RF69_OOK_THRESH_FIXED 0b00000000 // 7 6 OOK threshold type: fixed +#define RF69_OOK_THRESH_PEAK 0b01000000 // 7 6 peak (default) +#define RF69_OOK_THRESH_AVERAGE 0b10000000 // 7 6 average +#define RF69_OOK_PEAK_THRESH_STEP_0_5_DB 0b00000000 // 5 3 OOK demodulator step size: 0.5 dB (default) +#define RF69_OOK_PEAK_THRESH_STEP_1_0_DB 0b00001000 // 5 3 1.0 dB +#define RF69_OOK_PEAK_THRESH_STEP_1_5_DB 0b00010000 // 5 3 1.5 dB +#define RF69_OOK_PEAK_THRESH_STEP_2_0_DB 0b00011000 // 5 3 2.0 dB +#define RF69_OOK_PEAK_THRESH_STEP_3_0_DB 0b00100000 // 5 3 3.0 dB +#define RF69_OOK_PEAK_THRESH_STEP_4_0_DB 0b00101000 // 5 3 4.0 dB +#define RF69_OOK_PEAK_THRESH_STEP_5_0_DB 0b00110000 // 5 3 5.0 dB +#define RF69_OOK_PEAK_THRESH_STEP_6_0_DB 0b00111000 // 5 3 6.0 dB +#define RF69_OOK_PEAK_THRESH_DEC_1_1_CHIP 0b00000000 // 2 0 OOK demodulator step period: once per chip (default) +#define RF69_OOK_PEAK_THRESH_DEC_1_2_CHIP 0b00000001 // 2 0 once every 2 chips +#define RF69_OOK_PEAK_THRESH_DEC_1_4_CHIP 0b00000010 // 2 0 once every 4 chips +#define RF69_OOK_PEAK_THRESH_DEC_1_8_CHIP 0b00000011 // 2 0 once every 8 chips +#define RF69_OOK_PEAK_THRESH_DEC_2_1_CHIP 0b00000100 // 2 0 2 times per chip +#define RF69_OOK_PEAK_THRESH_DEC_4_1_CHIP 0b00000101 // 2 0 4 times per chip +#define RF69_OOK_PEAK_THRESH_DEC_8_1_CHIP 0b00000110 // 2 0 8 times per chip +#define RF69_OOK_PEAK_THRESH_DEC_16_1_CHIP 0b00000111 // 2 0 16 times per chip + //RF69_REG_OOK_AVG +#define RF69_OOK_AVG_THRESH_FILT_32_PI 0b00000000 // 7 6 OOK average filter coefficient: chip rate / 32*pi +#define RF69_OOK_AVG_THRESH_FILT_8_PI 0b01000000 // 7 6 chip rate / 8*pi +#define RF69_OOK_AVG_THRESH_FILT_4_PI 0b10000000 // 7 6 chip rate / 4*pi (default) +#define RF69_OOK_AVG_THRESH_FILT_2_PI 0b11000000 // 7 6 chip rate / 2*pi + //RF69_REG_OOK_FIX +#define RF69_OOK_FIXED_THRESH 0b00000110 // 7 0 default OOK fixed threshold (6 dB) + //RF69_REG_AFC_FEI -//RF69_REG_AFC_MSB + REG_AFC_LSB -//RF69_REG_FEI_MSB + REG_FEI_LSB +#define RF69_FEI_RUNNING 0b00000000 // 6 6 FEI status: on-going +#define RF69_FEI_DONE 0b01000000 // 6 6 done +#define RF69_FEI_START 0b00100000 // 5 5 force new FEI measurement +#define RF69_AFC_RUNNING 0b00000000 // 4 4 AFC status: on-going +#define RF69_AFC_DONE 0b00010000 // 4 4 done +#define RF69_AFC_AUTOCLEAR_OFF 0b00000000 // 3 3 AFC register autoclear disabled +#define RF69_AFC_AUTOCLEAR_ON 0b00001000 // 3 3 AFC register autoclear enabled +#define RF69_AFC_AUTO_OFF 0b00000000 // 2 2 perform AFC only manually +#define RF69_AFC_AUTO_ON 0b00000100 // 2 2 perform AFC each time Rx mode is started +#define RF69_AFC_CLEAR 0b00000010 // 1 1 clear AFC register +#define RF69_AFC_START 0b00000001 // 0 0 start AFC + //RF69_REG_RSSI_CONFIG +#define RF69_RSSI_RUNNING 0b00000000 // 1 1 RSSI status: on-going +#define RF69_RSSI_DONE 0b00000010 // 1 1 done +#define RF69_RSSI_START 0b00000001 // 0 0 start RSSI measurement //RF69_REG_DIO_MAPPING_1 +#define RF69_DIO0_CONT_MODE_READY 0b11000000 // 7 6 +#define RF69_DIO0_CONT_PLL_LOCK 0b00000000 // 7 6 +#define RF69_DIO0_CONT_SYNC_ADDRESS 0b00000000 // 7 6 +#define RF69_DIO0_CONT_TIMEOUT 0b01000000 // 7 6 +#define RF69_DIO0_CONT_RSSI 0b10000000 // 7 6 +#define RF69_DIO0_CONT_TX_READY 0b01000000 // 7 6 +#define RF69_DIO0_PACK_PLL_LOCK 0b11000000 // 7 6 +#define RF69_DIO0_PACK_CRC_OK 0b00000000 // 7 6 +#define RF69_DIO0_PACK_PAYLOAD_READY 0b01000000 // 7 6 +#define RF69_DIO0_PACK_SYNC_ADDRESS 0b10000000 // 7 6 +#define RF69_DIO0_PACK_RSSI 0b11000000 // 7 6 +#define RF69_DIO0_PACK_PACKET_SENT 0b00000000 // 7 6 +#define RF69_DIO0_PACK_TX_READY 0b01000000 // 7 6 +#define RF69_DIO1_CONT_PLL_LOCK 0b00110000 // 5 4 +#define RF69_DIO1_CONT_DCLK 0b00000000 // 5 4 +#define RF69_DIO1_CONT_RX_READY 0b00010000 // 5 4 +#define RF69_DIO1_CONT_SYNC_ADDRESS 0b00110000 // 5 4 +#define RF69_DIO1_CONT_TX_READY 0b00010000 // 5 4 +#define RF69_DIO1_PACK_FIFO_LEVEL 0b00000000 // 5 4 +#define RF69_DIO1_PACK_FIFO_FULL 0b00010000 // 5 4 +#define RF69_DIO1_PACK_FIFO_NOT_EMPTY 0b00100000 // 5 4 +#define RF69_DIO1_PACK_PLL_LOCK 0b00110000 // 5 4 +#define RF69_DIO1_PACK_TIMEOUT 0b00110000 // 5 4 + //RF69_REG_DIO_MAPPING_2 +#define RF69_CLK_OUT_FXOSC 0b00000000 // 2 0 ClkOut frequency: F(XOSC) +#define RF69_CLK_OUT_FXOSC_2 0b00000001 // 2 0 F(XOSC) / 2 +#define RF69_CLK_OUT_FXOSC_4 0b00000010 // 2 0 F(XOSC) / 4 +#define RF69_CLK_OUT_FXOSC_8 0b00000011 // 2 0 F(XOSC) / 8 +#define RF69_CLK_OUT_FXOSC_16 0b00000100 // 2 0 F(XOSC) / 16 +#define RF69_CLK_OUT_FXOSC_32 0b00000101 // 2 0 F(XOSC) / 31 +#define RF69_CLK_OUT_RC 0b00000110 // 2 0 RC +#define RF69_CLK_OUT_OFF 0b00000111 // 2 0 disabled (default) + //RF69_REG_IRQ_FLAGS_1 +#define RF69_IRQ_MODE_READY 0b10000000 // 7 7 requested mode was set +#define RF69_IRQ_RX_READY 0b01000000 // 6 6 Rx mode ready +#define RF69_IRQ_TX_READY 0b00100000 // 5 5 Tx mode ready +#define RF69_IRQ_PLL_LOCK 0b00010000 // 4 4 PLL is locked +#define RF69_IRQ_RSSI 0b00001000 // 3 3 RSSI value exceeded RssiThreshold +#define RF69_IRQ_TIMEOUT 0b00000100 // 2 2 timeout occured +#define RF69_IRQ_AUTO_MODE 0b00000010 // 1 1 entered intermediate mode +#define RF69_SYNC_ADDRESS_MATCH 0b00000001 // 0 0 sync address detected + //RF69_REG_IRQ_FLAGS_2 +#define RF69_IRQ_FIFO_FULL 0b10000000 // 7 7 FIFO is full +#define RF69_IRQ_FIFO_NOT_EMPTY 0b01000000 // 6 6 FIFO contains at least 1 byte +#define RF69_IRQ_FIFO_LEVEL 0b00100000 // 5 5 FIFO contains more than FifoThreshold bytes +#define RF69_IRQ_FIFO_OVERRUN 0b00010000 // 4 4 FIFO overrun occured +#define RF69_IRQ_PACKET_SENT 0b00001000 // 3 3 packet was sent +#define RF69_IRQ_PAYLOAD_READY 0b00000100 // 2 2 last payload byte received and CRC check passed +#define RF69_IRQ_CRC_OK 0b00000010 // 1 1 CRC check passed + //RF69_REG_RSSI_THRESH +#define RF69_RSSI_THRESHOLD 0xE4 // 7 0 RSSI threshold level (2 dB by default) + //RF69_REG_RX_TIMEOUT_1 +#define RF69_TIMEOUT_RX_START_OFF 0x00 // 7 0 RSSI interrupt timeout disabled (default) +#define RF69_TIMEOUT_RX_START 0xFF // 7 0 timeout will occur if RSSI interrupt is not received + //RF69_REG_RX_TIMEOUT_2 +#define RF69_TIMEOUT_RSSI_THRESH_OFF 0x00 // 7 0 PayloadReady interrupt timeout disabled (default) +#define RF69_TIMEOUT_RSSI_THRESH 0xFF // 7 0 timeout will occur if PayloadReady interrupt is not received //RF69_REG_PREAMBLE_MSB + REG_PREAMBLE_MSB +#define RF69_PREAMBLE_MSB 0x00 // 7 0 2-byte preamble size value +#define RF69_PREAMBLE_LSB 0x03 // 7 0 + //RF69_REG_SYNC_CONFIG -//RF69_REG_SYNC_VALUE_1 -//RF69_REG_SYNC_VALUE_2 -//RF69_REG_SYNC_VALUE_3 -//RF69_REG_SYNC_VALUE_4 -//RF69_REG_SYNC_VALUE_5 -//RF69_REG_SYNC_VALUE_6 -//RF69_REG_SYNC_VALUE_7 -//RF69_REG_SYNC_VALUE_8 +#define RF69_SYNC_OFF 0b00000000 // 7 7 sync word detection off +#define RF69_SYNC_ON 0b10000000 // 7 7 sync word detection on (default) +#define RF69_FIFO_FILL_CONDITION_SYNC 0b00000000 // 6 6 FIFO fill condition: on SyncAddress interrupt (default) +#define RF69_FIFO_FILL_CONDITION 0b01000000 // 6 6 as long as the bit is set +#define RF69_SYNC_SIZE 0b00011000 // 5 3 size of sync word: SyncSize + 1 bytes +#define RF69_SYNC_TOL 0b00000000 // 2 0 number of tolerated errors in sync word + +//RF69_REG_SYNC_VALUE_1 - SYNC_VALUE_8 +#define RF69_SYNC_BYTE_1 0x01 // 7 0 sync word: 1st byte (MSB) +#define RF69_SYNC_BYTE_2 0x01 // 7 0 2nd byte +#define RF69_SYNC_BYTE_3 0x01 // 7 0 3rd byte +#define RF69_SYNC_BYTE_4 0x01 // 7 0 4th byte +#define RF69_SYNC_BYTE_5 0x01 // 7 0 5th byte +#define RF69_SYNC_BYTE_6 0x01 // 7 0 6th byte +#define RF69_SYNC_BYTE_7 0x01 // 7 0 7th byte +#define RF69_SYNC_BYTE_8 0x01 // 7 0 8th byte (LSB) + //RF69_REG_PACKET_CONFIG_1 +#define RF69_PACKET_FORMAT_FIXED 0b00000000 // 7 7 fixed packet length (default) +#define RF69_PACKET_FORMAT_VARIABLE 0b10000000 // 7 7 variable packet length +#define RF69_DC_FREE_NONE 0b00000000 // 6 5 DC-free encoding: none (default) +#define RF69_DC_FREE_MANCHESTER 0b00100000 // 6 5 Manchester +#define RF69_DC_FREE_WHITENING 0b01000000 // 6 5 Whitening +#define RF69_CRC_OFF 0b00000000 // 4 4 CRC disabled +#define RF69_CRC_ON 0b00010000 // 4 4 CRC enabled (default) +#define RF69_CRC_AUTOCLEAR_ON 0b00000000 // 3 3 discard packet when CRC check fails (default) +#define RF69_CRC_AUTOCLEAR_OFF 0b00001000 // 3 3 keep packet when CRC check fails +#define RF69_ADDRESS_FILTERING_OFF 0b00000000 // 2 1 address filtering: none (default) +#define RF69_ADDRESS_FILTERING_NODE 0b00000010 // 2 1 node +#define RF69_ADDRESS_FILTERING_NODE_BROADCAST 0b00000100 // 2 1 node or broadcast + //RF69_REG_PAYLOAD_LENGTH -//RF69_REG_NODE_ADRS -//RF69_REG_BROADCAST_ADRS +#define RF69_PAYLOAD_LENGTH 0x40 // 7 0 payload length + //RF69_REG_AUTO_MODES +#define RF69_ENTER_COND_NONE 0b00000000 // 7 5 condition for entering intermediate mode: none, AutoModes disabled (default) +#define RF69_ENTER_COND_FIFO_NOT_EMPTY 0b00100000 // 7 5 FifoNotEmpty rising edge +#define RF69_ENTER_COND_FIFO_LEVEL 0b01000000 // 7 5 FifoLevel rising edge +#define RF69_ENTER_COND_CRC_OK 0b01100000 // 7 5 CrcOk rising edge +#define RF69_ENTER_COND_PAYLOAD_READY 0b10000000 // 7 5 PayloadReady rising edge +#define RF69_ENTER_COND_SYNC_ADDRESS 0b10100000 // 7 5 SyncAddress rising edge +#define RF69_ENTER_COND_PACKET_SENT 0b11000000 // 7 5 PacketSent rising edge +#define RF69_ENTER_COND_FIFO_EMPTY 0b11100000 // 7 5 FifoNotEmpty falling edge +#define RF69_EXIT_COND_NONE 0b00000000 // 4 2 condition for exiting intermediate mode: none, AutoModes disabled (default) +#define RF69_EXIT_COND_FIFO_EMPTY 0b00100000 // 4 2 FifoNotEmpty falling edge +#define RF69_EXIT_COND_FIFO_LEVEL 0b01000000 // 4 2 FifoLevel rising edge +#define RF69_EXIT_COND_CRC_OK 0b01100000 // 4 2 CrcOk rising edge +#define RF69_EXIT_COND_PAYLOAD_READY 0b10000000 // 4 2 PayloadReady rising edge +#define RF69_EXIT_COND_SYNC_ADDRESS 0b10100000 // 4 2 SyncAddress rising edge +#define RF69_EXIT_COND_PACKET_SENT 0b11000000 // 4 2 PacketSent rising edge +#define RF69_EXIT_COND_TIMEOUT 0b11100000 // 4 2 timeout rising edge +#define RF69_INTER_MODE_SLEEP 0b00000000 // 1 0 intermediate mode: sleep (default) +#define RF69_INTER_MODE_STANDBY 0b00000001 // 1 0 standby +#define RF69_INTER_MODE_RX 0b00000010 // 1 0 Rx +#define RF69_INTER_MODE_TX 0b00000011 // 1 0 Tx + //RF69_REG_FIFO_THRESH -//RF69_REG_PACKET_CONFIG_1 -//RF69_REG_AES_KEY_1 - REG_AES_KEY_16 +#define RF69_TX_START_CONDITION_FIFO_LEVEL 0b00000000 // 7 7 packet transmission start condition: FifoLevel +#define RF69_TX_START_CONDITION_FIFO_NOT_EMPTY 0b10000000 // 7 7 FifoNotEmpty (default) +#define RF69_FIFO_THRESHOLD 0b00001111 // 6 0 default threshold to trigger FifoLevel interrupt + +//RF69_REG_PACKET_CONFIG_2 +#define RF69_INTER_PACKET_RX_DELAY 0b00000000 // 7 4 delay between FIFO empty and start of new RSSI phase +#define RF69_RESTART_RX 0b00000100 // 2 2 force receiver into wait mode +#define RF69_AUTO_RX_RESTART_OFF 0b00000000 // 1 1 auto Rx restart disabled +#define RF69_AUTO_RX_RESTART_ON 0b00000010 // 1 1 auto Rx restart enabled (default) +#define RF69_AES_OFF 0b00000000 // 0 0 AES encryption disabled (default) +#define RF69_AES_ON 0b00000001 // 0 0 AES encryption enabled, payload size limited to 66 bytes //RF69_REG_TEMP_1 -//RF69_REG_TEMP_2 +#define RF69_TEMP_MEAS_START 0b00001000 // 3 3 trigger temperature measurement +#define RF69_TEMP_MEAS_RUNNING 0b00000100 // 2 2 temperature measurement status: on-going +#define RF69_TEMP_MEAS_DONE 0b00000000 // 2 2 done class RF69 { public: RF69(Module* module); - void begin(); + uint8_t begin(); + uint8_t transmit(Packet& pack); + uint8_t receive(Packet& pack); + + uint8_t sleep(); + uint8_t standby(); private: Module* _mod; + + uint8_t config(); + uint8_t setMode(uint8_t mode); }; #endif