From 17f539765264b1f1be63447a871fe7117173a2dd Mon Sep 17 00:00:00 2001 From: jgromes Date: Thu, 15 Apr 2021 08:13:16 +0200 Subject: [PATCH 1/3] [RTTY] Fixed code scan alert --- src/protocols/RTTY/RTTY.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/protocols/RTTY/RTTY.cpp b/src/protocols/RTTY/RTTY.cpp index 5ee05efc..f256e54b 100644 --- a/src/protocols/RTTY/RTTY.cpp +++ b/src/protocols/RTTY/RTTY.cpp @@ -10,7 +10,7 @@ ITA2String::ITA2String(char c) { ITA2String::ITA2String(const char* str) { _len = strlen(str); - _str = new char[_len]; + _str = new char[_len + 1]; strcpy(_str, str); _ita2Len = 0; } From d49a107c7e5f713d4591a0af110f6025f6976420 Mon Sep 17 00:00:00 2001 From: jgromes Date: Thu, 15 Apr 2021 19:34:53 +0200 Subject: [PATCH 2/3] Added SPI readout check bitmask --- src/Module.cpp | 4 ++-- src/Module.h | 4 +++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/Module.cpp b/src/Module.cpp index 372ef419..48f03211 100644 --- a/src/Module.cpp +++ b/src/Module.cpp @@ -206,7 +206,7 @@ int16_t Module::SPIgetRegValue(uint8_t reg, uint8_t msb, uint8_t lsb) { return(maskedValue); } -int16_t Module::SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb, uint8_t lsb, uint8_t checkInterval) { +int16_t Module::SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb, uint8_t lsb, uint8_t checkInterval, uint8_t checkMask) { if((msb > 7) || (lsb > 7) || (lsb > msb)) { return(ERR_INVALID_BIT_RANGE); } @@ -223,7 +223,7 @@ int16_t Module::SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb, uint8_t uint8_t readValue = 0x00; while(Module::micros() - start < (checkInterval * 1000)) { readValue = SPIreadRegister(reg); - if(readValue == newValue) { + if((readValue & checkMask) == (newValue & checkMask)) { // check passed, we can stop the loop return(ERR_NONE); } diff --git a/src/Module.h b/src/Module.h index 685a2eb5..d81c4213 100644 --- a/src/Module.h +++ b/src/Module.h @@ -238,9 +238,11 @@ class Module { \param checkInterval Number of milliseconds between register writing and verification reading. Some registers need up to 10ms to process the change. + \param checkMask Mask of bits to check, only bits set to 1 will be verified. + \returns \ref status_codes */ - int16_t SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb = 7, uint8_t lsb = 0, uint8_t checkInterval = 2); + int16_t SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb = 7, uint8_t lsb = 0, uint8_t checkInterval = 2, uint8_t checkMask = 0xFF); /*! \brief SPI burst read method. From e27c3ddef525a913ce815ba32e908d4cda90757a Mon Sep 17 00:00:00 2001 From: jgromes Date: Thu, 15 Apr 2021 19:35:31 +0200 Subject: [PATCH 3/3] [SX127x] Ignore SPI readout mismatch in FSK RX (#276) --- src/modules/SX127x/SX127x.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/modules/SX127x/SX127x.cpp b/src/modules/SX127x/SX127x.cpp index b508cd7c..18612c4a 100644 --- a/src/modules/SX127x/SX127x.cpp +++ b/src/modules/SX127x/SX127x.cpp @@ -1178,7 +1178,12 @@ bool SX127x::findChip(uint8_t ver) { } int16_t SX127x::setMode(uint8_t mode) { - return(_mod->SPIsetRegValue(SX127X_REG_OP_MODE, mode, 2, 0, 5)); + uint8_t checkMask = 0xFF; + if((getActiveModem() == SX127X_FSK_OOK) && (mode == SX127X_RX)) { + // disable checking of RX bit in FSK RX mode, as it sometimes seem to fail (#276) + checkMask = 0xFE; + } + return(_mod->SPIsetRegValue(SX127X_REG_OP_MODE, mode, 2, 0, 5, checkMask)); } int16_t SX127x::getActiveModem() {