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[CI] Add unit test for SPIsetRegValue

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This commit is contained in:
jgromes 2025-01-19 21:48:39 +01:00
parent c4ac0ac68b
commit bedab1a66d
2 changed files with 129 additions and 4 deletions
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3
extras/test/unit/CMakeLists.txt
View file

@ -25,5 +25,4 @@ set_property(TARGET ${PROJECT_NAME} PROPERTY CXX_STANDARD 20)
target_compile_options(${PROJECT_NAME} PRIVATE -Wall -Wextra)
# set RadioLib debug
#target_compile_definitions(RadioLib PUBLIC RADIOLIB_DEBUG_BASIC RADIOLIB_DEBUG_SPI)
#target_compile_definitions(RadioLib PUBLIC RADIOLIB_DEBUG_PORT=stdout)
#target_compile_definitions(RadioLib PUBLIC RADIOLIB_DEBUG_BASIC RADIOLIB_DEBUG_SPI RADIOLIB_DEBUG_PROTOCOL)

130
extras/test/unit/tests/TestModule.cpp
View file

@ -48,8 +48,9 @@ BOOST_FIXTURE_TEST_SUITE(suite_Module, ModuleFixture)
// register read masking test
const uint8_t msb = 5;
const uint8_t lsb = 1;
const uint8_t maskedValue = 0x3E;
ret = mod->SPIgetRegValue(address, msb, lsb);
BOOST_TEST(ret == 0x3E);
BOOST_TEST(ret == maskedValue);
// invalid mask tests (swapped MSB and LSB, out of range bit masks)
ret = mod->SPIgetRegValue(address, lsb, msb);
@ -60,6 +61,60 @@ BOOST_FIXTURE_TEST_SUITE(suite_Module, ModuleFixture)
BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
}
BOOST_FIXTURE_TEST_CASE(Module_SPIsetRegValue_reg, ModuleFixture)
{
BOOST_TEST_MESSAGE("--- Test Module::SPIsetRegValue register access ---");
int16_t ret;
// basic register write with default config
const uint8_t address = 0x12;
const uint8_t value = 0xAB;
const uint8_t spiTxn[] = { address, 0x00, 0x80 | address, value };
ret = mod->SPIsetRegValue(address, value);
// check return code and history log
// this will return write error because the bare emulated radio has no internal logic
BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
// register write masking test
const uint8_t msb = 5;
const uint8_t lsb = 1;
const uint8_t maskedValue = 0xEB;
const uint8_t spiTxn2[] = { address, 0x00, 0x80 | address, maskedValue };
ret = mod->SPIsetRegValue(address, value, msb, lsb);
BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
BOOST_TEST(hal->spiLogMemcmp(spiTxn2, sizeof(spiTxn2)) == 0);
// invalid mask tests (swapped MSB and LSB, out of range bit masks)
ret = mod->SPIsetRegValue(address, value, lsb, msb);
BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
ret = mod->SPIsetRegValue(address, value, 10, lsb);
BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
ret = mod->SPIsetRegValue(address, value, msb, 10);
BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
// check interval test
const uint8_t interval = 200;
const unsigned long start = hal->micros();
ret = mod->SPIsetRegValue(address, value, 7, 0, interval);
const unsigned long stop = hal->micros();
BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
const unsigned long elapsed = stop - start;
BOOST_TEST(elapsed >= (unsigned long)interval*1000UL);
// disabled check mask test
ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0);
BOOST_TEST(ret == RADIOLIB_ERR_NONE);
BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
// forced write test
ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0xFF, true);
BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
}
BOOST_FIXTURE_TEST_CASE(Module_SPIgetRegValue_stream, ModuleFixture)
{
BOOST_TEST_MESSAGE("--- Test Module::SPIgetRegValue stream access ---");
@ -88,8 +143,9 @@ BOOST_FIXTURE_TEST_SUITE(suite_Module, ModuleFixture)
// register read masking test
const uint8_t msb = 5;
const uint8_t lsb = 1;
const uint8_t maskedValue = 0x3E;
ret = mod->SPIgetRegValue(address, msb, lsb);
BOOST_TEST(ret == 0x3E);
BOOST_TEST(ret == maskedValue);
// invalid mask tests (swapped MSB and LSB, out of range bit masks)
ret = mod->SPIgetRegValue(address, lsb, msb);
@ -100,4 +156,74 @@ BOOST_FIXTURE_TEST_SUITE(suite_Module, ModuleFixture)
BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
}
BOOST_FIXTURE_TEST_CASE(Module_SPIsetRegValue_stream, ModuleFixture)
{
BOOST_TEST_MESSAGE("--- Test Module::SPIsetRegValue stream access ---");
int16_t ret;
// change settings to stream type
mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] = Module::BITS_16;
mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD] = Module::BITS_8;
mod->spiConfig.statusPos = 1;
mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_SX126X_CMD_READ_REGISTER;
mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_SX126X_CMD_WRITE_REGISTER;
mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP] = RADIOLIB_SX126X_CMD_NOP;
mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] = RADIOLIB_SX126X_CMD_GET_STATUS;
mod->spiConfig.stream = true;
// basic register write with default config
const uint8_t address = 0x12;
const uint8_t value = 0xAB;
const uint8_t spiTxn[] = {
RADIOLIB_SX126X_CMD_READ_REGISTER, 0x00, address, 0x00, 0x00,
RADIOLIB_SX126X_CMD_WRITE_REGISTER, 0x00, address, value,
};
ret = mod->SPIsetRegValue(address, value);
// check return code and history log
// this will return write error because the bare emulated radio has no internal logic
BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
// register write masking test
const uint8_t msb = 5;
const uint8_t lsb = 1;
const uint8_t maskedValue = 0xEB;
const uint8_t spiTxn2[] = {
RADIOLIB_SX126X_CMD_READ_REGISTER, 0x00, address, 0x00, 0x00,
RADIOLIB_SX126X_CMD_WRITE_REGISTER, 0x00, address, maskedValue,
};
ret = mod->SPIsetRegValue(address, value, msb, lsb);
BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
BOOST_TEST(hal->spiLogMemcmp(spiTxn2, sizeof(spiTxn2)) == 0);
// invalid mask tests (swapped MSB and LSB, out of range bit masks)
ret = mod->SPIsetRegValue(address, value, lsb, msb);
BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
ret = mod->SPIsetRegValue(address, value, 10, lsb);
BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
ret = mod->SPIsetRegValue(address, value, msb, 10);
BOOST_TEST(ret == RADIOLIB_ERR_INVALID_BIT_RANGE);
// check interval test
const uint8_t interval = 200;
const unsigned long start = hal->micros();
ret = mod->SPIsetRegValue(address, value, 7, 0, interval);
const unsigned long stop = hal->micros();
BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
const unsigned long elapsed = stop - start;
BOOST_TEST(elapsed >= (unsigned long)interval*1000UL);
// disabled check mask test
ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0);
BOOST_TEST(ret == RADIOLIB_ERR_NONE);
BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
// forced write test
ret = mod->SPIsetRegValue(address, value, 7, 0, 2, 0xFF, true);
BOOST_TEST(ret == RADIOLIB_ERR_SPI_WRITE_FAILED);
BOOST_TEST(hal->spiLogMemcmp(spiTxn, sizeof(spiTxn)) == 0);
}
BOOST_AUTO_TEST_SUITE_END()