From bbe407b50fd8132d659997a9234feef69866ec2b Mon Sep 17 00:00:00 2001 From: jgromes Date: Fri, 12 Jan 2024 18:51:55 +0100 Subject: [PATCH] [SX127x] Cleanup private/protected members --- src/modules/SX127x/SX1272.cpp | 123 ++++++++++++++++-------------- src/modules/SX127x/SX1278.cpp | 137 +++++++++++++++++++--------------- src/modules/SX127x/SX127x.cpp | 8 +- src/modules/SX127x/SX127x.h | 27 ++++--- 4 files changed, 162 insertions(+), 133 deletions(-) diff --git a/src/modules/SX127x/SX1272.cpp b/src/modules/SX127x/SX1272.cpp index ae900a2a..8864297e 100644 --- a/src/modules/SX127x/SX1272.cpp +++ b/src/modules/SX127x/SX1272.cpp @@ -74,11 +74,12 @@ int16_t SX1272::beginFSK(float freq, float br, float freqDev, float rxBw, int8_t } void SX1272::reset() { - this->mod->hal->pinMode(this->mod->getRst(), this->mod->hal->GpioModeOutput); - this->mod->hal->digitalWrite(this->mod->getRst(), this->mod->hal->GpioLevelHigh); - this->mod->hal->delay(1); - this->mod->hal->digitalWrite(this->mod->getRst(), this->mod->hal->GpioLevelLow); - this->mod->hal->delay(5); + Module* mod = this->getMod(); + mod->hal->pinMode(mod->getRst(), mod->hal->GpioModeOutput); + mod->hal->digitalWrite(mod->getRst(), mod->hal->GpioLevelHigh); + mod->hal->delay(1); + mod->hal->digitalWrite(mod->getRst(), mod->hal->GpioLevelLow); + mod->hal->delay(5); } int16_t SX1272::setFrequency(float freq) { @@ -119,10 +120,11 @@ int16_t SX1272::setBandwidth(float bw) { // calculate symbol length and set low data rate optimization, if auto-configuration is enabled if(this->ldroAuto) { float symbolLength = (float)(uint32_t(1) << SX127x::spreadingFactor) / (float)SX127x::bandwidth; + Module* mod = this->getMod(); if(symbolLength >= 16.0) { - state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_ON, 0, 0); + state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_ON, 0, 0); } else { - state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_OFF, 0, 0); + state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_OFF, 0, 0); } } } @@ -171,11 +173,12 @@ int16_t SX1272::setSpreadingFactor(uint8_t sf) { // calculate symbol length and set low data rate optimization, if auto-configuration is enabled if(this->ldroAuto) { - float symbolLength = (float)(uint32_t(1) << SX127x::spreadingFactor) / (float)SX127x::bandwidth; + float symbolLength = (float)(uint32_t(1) << SX127x::spreadingFactor) / (float)SX127x::bandwidth; + Module* mod = this->getMod(); if(symbolLength >= 16.0) { - state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_ON, 0, 0); + state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_ON, 0, 0); } else { - state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_OFF, 0, 0); + state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_OFF, 0, 0); } } } @@ -263,25 +266,26 @@ int16_t SX1272::setOutputPower(int8_t power, bool useRfo) { // set mode to standby int16_t state = SX127x::standby(); + Module* mod = this->getMod(); if(useRfo) { // RFO output - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_RFO, 7, 7); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, (power + 1), 3, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX1272_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_OFF, 2, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_RFO, 7, 7); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, (power + 1), 3, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX1272_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_OFF, 2, 0); } else { if(power <= 17) { // power is 2 - 17 dBm, enable PA1 + PA2 on PA_BOOST - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_BOOST, 7, 7); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, (power - 2), 3, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX1272_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_OFF, 2, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_BOOST, 7, 7); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, (power - 2), 3, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX1272_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_OFF, 2, 0); } else { // power is 18 - 20 dBm, enable PA1 + PA2 on PA_BOOST and enable high power control - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_BOOST, 7, 7); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, (power - 5), 3, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX1272_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_ON, 2, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_BOOST, 7, 7); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, (power - 5), 3, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX1272_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_ON, 2, 0); } @@ -298,6 +302,7 @@ int16_t SX1272::setGain(uint8_t gain) { // set mode to standby int16_t state = SX127x::standby(); + Module* mod = this->getMod(); // get modem int16_t modem = getActiveModem(); @@ -305,20 +310,20 @@ int16_t SX1272::setGain(uint8_t gain) { // set gain if(gain == 0) { // gain set to 0, enable AGC loop - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX1272_AGC_AUTO_ON, 2, 2); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX1272_AGC_AUTO_ON, 2, 2); } else { - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX1272_AGC_AUTO_OFF, 2, 2); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_LNA, (gain << 5) | RADIOLIB_SX127X_LNA_BOOST_ON); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX1272_AGC_AUTO_OFF, 2, 2); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_LNA, (gain << 5) | RADIOLIB_SX127X_LNA_BOOST_ON); } } else if(modem == RADIOLIB_SX127X_FSK_OOK) { // set gain if(gain == 0) { // gain set to 0, enable AGC loop - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_RX_CONFIG, RADIOLIB_SX127X_AGC_AUTO_ON, 3, 3); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_RX_CONFIG, RADIOLIB_SX127X_AGC_AUTO_ON, 3, 3); } else { - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_RX_CONFIG, RADIOLIB_SX127X_AGC_AUTO_ON, 3, 3); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_LNA, (gain << 5) | RADIOLIB_SX127X_LNA_BOOST_ON); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_RX_CONFIG, RADIOLIB_SX127X_AGC_AUTO_ON, 3, 3); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_LNA, (gain << 5) | RADIOLIB_SX127X_LNA_BOOST_ON); } } @@ -342,15 +347,16 @@ int16_t SX1272::setDataShaping(uint8_t sh) { RADIOLIB_ASSERT(state); // set data shaping + Module* mod = this->getMod(); switch(sh) { case RADIOLIB_SHAPING_NONE: - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_NO_SHAPING, 4, 3)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_NO_SHAPING, 4, 3)); case RADIOLIB_SHAPING_0_3: - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_FSK_GAUSSIAN_0_3, 4, 3)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_FSK_GAUSSIAN_0_3, 4, 3)); case RADIOLIB_SHAPING_0_5: - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_FSK_GAUSSIAN_0_5, 4, 3)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_FSK_GAUSSIAN_0_5, 4, 3)); case RADIOLIB_SHAPING_1_0: - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_FSK_GAUSSIAN_1_0, 4, 3)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_FSK_GAUSSIAN_1_0, 4, 3)); default: return(RADIOLIB_ERR_INVALID_DATA_SHAPING); } @@ -371,15 +377,16 @@ int16_t SX1272::setDataShapingOOK(uint8_t sh) { int16_t state = SX127x::standby(); // set data shaping + Module* mod = this->getMod(); switch(sh) { case 0: - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_NO_SHAPING, 4, 3); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_NO_SHAPING, 4, 3); break; case 1: - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_OOK_FILTER_BR, 4, 3); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_OOK_FILTER_BR, 4, 3); break; case 2: - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_OOK_FILTER_2BR, 4, 3); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OP_MODE, RADIOLIB_SX1272_OOK_FILTER_2BR, 4, 3); break; default: state = RADIOLIB_ERR_INVALID_DATA_SHAPING; @@ -394,29 +401,30 @@ float SX1272::getRSSI(bool packet, bool skipReceive) { } int16_t SX1272::setCRC(bool enable, bool mode) { + Module* mod = this->getMod(); if(getActiveModem() == RADIOLIB_SX127X_LORA) { // set LoRa CRC SX127x::crcEnabled = enable; if(enable) { - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_RX_CRC_MODE_ON, 1, 1)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_RX_CRC_MODE_ON, 1, 1)); } else { - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_RX_CRC_MODE_OFF, 1, 1)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_RX_CRC_MODE_OFF, 1, 1)); } } else { // set FSK CRC int16_t state = RADIOLIB_ERR_NONE; if(enable) { - state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_ON, 4, 4); + state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_ON, 4, 4); } else { - state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_OFF, 4, 4); + state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_OFF, 4, 4); } RADIOLIB_ASSERT(state); // set FSK CRC mode if(mode) { - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_WHITENING_TYPE_IBM, 0, 0)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_WHITENING_TYPE_IBM, 0, 0)); } else { - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_WHITENING_TYPE_CCITT, 0, 0)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_WHITENING_TYPE_CCITT, 0, 0)); } } } @@ -427,10 +435,11 @@ int16_t SX1272::forceLDRO(bool enable) { } this->ldroAuto = false; + Module* mod = this->getMod(); if(enable) { - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_ON, 0, 0)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_ON, 0, 0)); } else { - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_OFF, 0, 0)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_LOW_DATA_RATE_OPT_OFF, 0, 0)); } } @@ -456,7 +465,8 @@ int16_t SX1272::setBandwidthRaw(uint8_t newBandwidth) { int16_t state = SX127x::standby(); // write register - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, newBandwidth, 7, 6); + Module* mod = this->getMod(); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, newBandwidth, 7, 6); return(state); } @@ -465,16 +475,17 @@ int16_t SX1272::setSpreadingFactorRaw(uint8_t newSpreadingFactor) { int16_t state = SX127x::standby(); // write registers + Module* mod = this->getMod(); if(newSpreadingFactor == RADIOLIB_SX127X_SF_6) { - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_HEADER_IMPL_MODE | (SX127x::crcEnabled ? RADIOLIB_SX1272_RX_CRC_MODE_ON : RADIOLIB_SX1272_RX_CRC_MODE_OFF), 2, 1); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX127X_SF_6 | RADIOLIB_SX127X_TX_MODE_SINGLE, 7, 3); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECT_OPTIMIZE, RADIOLIB_SX127X_DETECT_OPTIMIZE_SF_6, 2, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECTION_THRESHOLD, RADIOLIB_SX127X_DETECTION_THRESHOLD_SF_6); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_HEADER_IMPL_MODE | (SX127x::crcEnabled ? RADIOLIB_SX1272_RX_CRC_MODE_ON : RADIOLIB_SX1272_RX_CRC_MODE_OFF), 2, 1); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX127X_SF_6 | RADIOLIB_SX127X_TX_MODE_SINGLE, 7, 3); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECT_OPTIMIZE, RADIOLIB_SX127X_DETECT_OPTIMIZE_SF_6, 2, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECTION_THRESHOLD, RADIOLIB_SX127X_DETECTION_THRESHOLD_SF_6); } else { - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_HEADER_EXPL_MODE | (SX127x::crcEnabled ? RADIOLIB_SX1272_RX_CRC_MODE_ON : RADIOLIB_SX1272_RX_CRC_MODE_OFF), 2, 1); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, newSpreadingFactor | RADIOLIB_SX127X_TX_MODE_SINGLE, 7, 3); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECT_OPTIMIZE, RADIOLIB_SX127X_DETECT_OPTIMIZE_SF_7_12, 2, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECTION_THRESHOLD, RADIOLIB_SX127X_DETECTION_THRESHOLD_SF_7_12); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1272_HEADER_EXPL_MODE | (SX127x::crcEnabled ? RADIOLIB_SX1272_RX_CRC_MODE_ON : RADIOLIB_SX1272_RX_CRC_MODE_OFF), 2, 1); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, newSpreadingFactor | RADIOLIB_SX127X_TX_MODE_SINGLE, 7, 3); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECT_OPTIMIZE, RADIOLIB_SX127X_DETECT_OPTIMIZE_SF_7_12, 2, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECTION_THRESHOLD, RADIOLIB_SX127X_DETECTION_THRESHOLD_SF_7_12); } return(state); } @@ -484,7 +495,8 @@ int16_t SX1272::setCodingRateRaw(uint8_t newCodingRate) { int16_t state = SX127x::standby(); // write register - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, newCodingRate, 5, 3); + Module* mod = this->getMod(); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, newCodingRate, 5, 3); return(state); } @@ -495,11 +507,12 @@ int16_t SX1272::setHeaderType(uint8_t headerType, size_t len) { } // set requested packet mode - int16_t state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, headerType, 2, 2); + Module* mod = this->getMod(); + int16_t state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, headerType, 2, 2); RADIOLIB_ASSERT(state); // set length to register - state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PAYLOAD_LENGTH, len); + state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PAYLOAD_LENGTH, len); RADIOLIB_ASSERT(state); // update cached value @@ -514,7 +527,8 @@ int16_t SX1272::configFSK() { RADIOLIB_ASSERT(state); // set fast PLL hop - state = this->mod->SPIsetRegValue(RADIOLIB_SX1272_REG_PLL_HOP, RADIOLIB_SX127X_FAST_HOP_ON, 7, 7); + Module* mod = this->getMod(); + state = mod->SPIsetRegValue(RADIOLIB_SX1272_REG_PLL_HOP, RADIOLIB_SX127X_FAST_HOP_ON, 7, 7); return(state); } @@ -523,7 +537,8 @@ void SX1272::errataFix(bool rx) { // mitigation of receiver spurious response // see SX1272/73 Errata, section 2.2 for details - this->mod->SPIsetRegValue(0x31, 0b10000000, 7, 7); + Module* mod = this->getMod(); + mod->SPIsetRegValue(0x31, 0b10000000, 7, 7); } #endif diff --git a/src/modules/SX127x/SX1278.cpp b/src/modules/SX127x/SX1278.cpp index 57c9f6f9..560a10bc 100644 --- a/src/modules/SX127x/SX1278.cpp +++ b/src/modules/SX127x/SX1278.cpp @@ -74,11 +74,12 @@ int16_t SX1278::beginFSK(float freq, float br, float freqDev, float rxBw, int8_t } void SX1278::reset() { - this->mod->hal->pinMode(this->mod->getRst(), this->mod->hal->GpioModeOutput); - this->mod->hal->digitalWrite(this->mod->getRst(), this->mod->hal->GpioLevelLow); - this->mod->hal->delay(1); - this->mod->hal->digitalWrite(this->mod->getRst(), this->mod->hal->GpioLevelHigh); - this->mod->hal->delay(5); + Module* mod = this->getMod(); + mod->hal->pinMode(mod->getRst(), mod->hal->GpioModeOutput); + mod->hal->digitalWrite(mod->getRst(), mod->hal->GpioLevelLow); + mod->hal->delay(1); + mod->hal->digitalWrite(mod->getRst(), mod->hal->GpioLevelHigh); + mod->hal->delay(5); } int16_t SX1278::setFrequency(float freq) { @@ -133,10 +134,11 @@ int16_t SX1278::setBandwidth(float bw) { // calculate symbol length and set low data rate optimization, if auto-configuration is enabled if(this->ldroAuto) { float symbolLength = (float)(uint32_t(1) << SX127x::spreadingFactor) / (float)SX127x::bandwidth; + Module* mod = this->getMod(); if(symbolLength >= 16.0) { - state = this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_ON, 3, 3); + state = mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_ON, 3, 3); } else { - state = this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_OFF, 3, 3); + state = mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_OFF, 3, 3); } } } @@ -186,10 +188,11 @@ int16_t SX1278::setSpreadingFactor(uint8_t sf) { // calculate symbol length and set low data rate optimization, if auto-configuration is enabled if(this->ldroAuto) { float symbolLength = (float)(uint32_t(1) << SX127x::spreadingFactor) / (float)SX127x::bandwidth; + Module* mod = this->getMod(); if(symbolLength >= 16.0) { - state = this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_ON, 3, 3); + state = mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_ON, 3, 3); } else { - state = this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_OFF, 3, 3); + state = mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_OFF, 3, 3); } } } @@ -281,6 +284,7 @@ int16_t SX1278::setOutputPower(int8_t power, bool useRfo) { // set mode to standby int16_t state = SX127x::standby(); + Module* mod = this->getMod(); if(useRfo) { uint8_t paCfg = 0; @@ -292,22 +296,22 @@ int16_t SX1278::setOutputPower(int8_t power, bool useRfo) { paCfg = RADIOLIB_SX1278_MAX_POWER | power; } - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_RFO, 7, 7); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, paCfg, 6, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_OFF, 2, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_RFO, 7, 7); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, paCfg, 6, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX1278_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_OFF, 2, 0); } else { if(power != 20) { // power is 2 - 17 dBm, enable PA1 + PA2 on PA_BOOST - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_BOOST, 7, 7); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX1278_MAX_POWER | (power - 2), 6, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_OFF, 2, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_BOOST, 7, 7); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX1278_MAX_POWER | (power - 2), 6, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX1278_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_OFF, 2, 0); } else { // power is 20 dBm, enable PA1 + PA2 on PA_BOOST and enable high power control - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_BOOST, 7, 7); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX1278_MAX_POWER | 0x0F, 6, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_ON, 2, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX127X_PA_SELECT_BOOST, 7, 7); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_CONFIG, RADIOLIB_SX1278_MAX_POWER | 0x0F, 6, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX1278_REG_PA_DAC, RADIOLIB_SX127X_PA_BOOST_ON, 2, 0); } } @@ -323,6 +327,7 @@ int16_t SX1278::setGain(uint8_t gain) { // set mode to standby int16_t state = SX127x::standby(); + Module* mod = this->getMod(); // get modem int16_t modem = getActiveModem(); @@ -330,20 +335,20 @@ int16_t SX1278::setGain(uint8_t gain) { // set gain if(gain == 0) { // gain set to 0, enable AGC loop - state |= this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_AGC_AUTO_ON, 2, 2); + state |= mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_AGC_AUTO_ON, 2, 2); } else { - state |= this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_AGC_AUTO_OFF, 2, 2); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_LNA, (gain << 5) | RADIOLIB_SX127X_LNA_BOOST_ON); + state |= mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_AGC_AUTO_OFF, 2, 2); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_LNA, (gain << 5) | RADIOLIB_SX127X_LNA_BOOST_ON); } } else if(modem == RADIOLIB_SX127X_FSK_OOK) { // set gain if(gain == 0) { // gain set to 0, enable AGC loop - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_RX_CONFIG, RADIOLIB_SX127X_AGC_AUTO_ON, 3, 3); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_RX_CONFIG, RADIOLIB_SX127X_AGC_AUTO_ON, 3, 3); } else { - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_RX_CONFIG, RADIOLIB_SX1278_AGC_AUTO_OFF, 3, 3); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_LNA, (gain << 5) | RADIOLIB_SX127X_LNA_BOOST_ON); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_RX_CONFIG, RADIOLIB_SX1278_AGC_AUTO_OFF, 3, 3); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_LNA, (gain << 5) | RADIOLIB_SX127X_LNA_BOOST_ON); } } @@ -372,15 +377,16 @@ int16_t SX1278::setDataShaping(uint8_t sh) { RADIOLIB_ASSERT(state); // set data shaping + Module* mod = this->getMod(); switch(sh) { case RADIOLIB_SHAPING_NONE: - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_NO_SHAPING, 6, 5)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_NO_SHAPING, 6, 5)); case RADIOLIB_SHAPING_0_3: - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_FSK_GAUSSIAN_0_3, 6, 5)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_FSK_GAUSSIAN_0_3, 6, 5)); case RADIOLIB_SHAPING_0_5: - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_FSK_GAUSSIAN_0_5, 6, 5)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_FSK_GAUSSIAN_0_5, 6, 5)); case RADIOLIB_SHAPING_1_0: - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_FSK_GAUSSIAN_1_0, 6, 5)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_FSK_GAUSSIAN_1_0, 6, 5)); default: return(RADIOLIB_ERR_INVALID_DATA_SHAPING); } @@ -401,15 +407,16 @@ int16_t SX1278::setDataShapingOOK(uint8_t sh) { int16_t state = SX127x::standby(); // set data shaping + Module* mod = this->getMod(); switch(sh) { case 0: - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_NO_SHAPING, 6, 5); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_NO_SHAPING, 6, 5); break; case 1: - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_OOK_FILTER_BR, 6, 5); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_OOK_FILTER_BR, 6, 5); break; case 2: - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_OOK_FILTER_2BR, 6, 5); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PA_RAMP, RADIOLIB_SX1278_OOK_FILTER_2BR, 6, 5); break; default: return(RADIOLIB_ERR_INVALID_DATA_SHAPING); @@ -427,29 +434,30 @@ float SX1278::getRSSI(bool packet, bool skipReceive) { } int16_t SX1278::setCRC(bool enable, bool mode) { + Module* mod = this->getMod(); if(getActiveModem() == RADIOLIB_SX127X_LORA) { // set LoRa CRC SX127x::crcEnabled = enable; if(enable) { - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX1278_RX_CRC_MODE_ON, 2, 2)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX1278_RX_CRC_MODE_ON, 2, 2)); } else { - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX1278_RX_CRC_MODE_OFF, 2, 2)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX1278_RX_CRC_MODE_OFF, 2, 2)); } } else { // set FSK CRC int16_t state = RADIOLIB_ERR_NONE; if(enable) { - state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_ON, 4, 4); + state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_ON, 4, 4); } else { - state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_OFF, 4, 4); + state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_OFF, 4, 4); } RADIOLIB_ASSERT(state); // set FSK CRC mode if(mode) { - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_WHITENING_TYPE_IBM, 0, 0)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_WHITENING_TYPE_IBM, 0, 0)); } else { - return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_WHITENING_TYPE_CCITT, 0, 0)); + return(mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, RADIOLIB_SX127X_CRC_WHITENING_TYPE_CCITT, 0, 0)); } } } @@ -459,11 +467,12 @@ int16_t SX1278::forceLDRO(bool enable) { return(RADIOLIB_ERR_WRONG_MODEM); } + Module* mod = this->getMod(); this->ldroAuto = false; if(enable) { - return(this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_ON, 3, 3)); + return(mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_ON, 3, 3)); } else { - return(this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_OFF, 3, 3)); + return(mod->SPIsetRegValue(RADIOLIB_SX1278_REG_MODEM_CONFIG_3, RADIOLIB_SX1278_LOW_DATA_RATE_OPT_OFF, 3, 3)); } } @@ -489,7 +498,8 @@ int16_t SX1278::setBandwidthRaw(uint8_t newBandwidth) { int16_t state = SX127x::standby(); // write register - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, newBandwidth, 7, 4); + Module* mod = this->getMod(); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, newBandwidth, 7, 4); return(state); } @@ -498,16 +508,17 @@ int16_t SX1278::setSpreadingFactorRaw(uint8_t newSpreadingFactor) { int16_t state = SX127x::standby(); // write registers + Module* mod = this->getMod(); if(newSpreadingFactor == RADIOLIB_SX127X_SF_6) { - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1278_HEADER_IMPL_MODE, 0, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX127X_SF_6 | RADIOLIB_SX127X_TX_MODE_SINGLE, 7, 3); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECT_OPTIMIZE, RADIOLIB_SX127X_DETECT_OPTIMIZE_SF_6, 2, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECTION_THRESHOLD, RADIOLIB_SX127X_DETECTION_THRESHOLD_SF_6); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1278_HEADER_IMPL_MODE, 0, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, RADIOLIB_SX127X_SF_6 | RADIOLIB_SX127X_TX_MODE_SINGLE, 7, 3); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECT_OPTIMIZE, RADIOLIB_SX127X_DETECT_OPTIMIZE_SF_6, 2, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECTION_THRESHOLD, RADIOLIB_SX127X_DETECTION_THRESHOLD_SF_6); } else { - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1278_HEADER_EXPL_MODE, 0, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, newSpreadingFactor | RADIOLIB_SX127X_TX_MODE_SINGLE, 7, 3); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECT_OPTIMIZE, RADIOLIB_SX127X_DETECT_OPTIMIZE_SF_7_12, 2, 0); - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECTION_THRESHOLD, RADIOLIB_SX127X_DETECTION_THRESHOLD_SF_7_12); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, RADIOLIB_SX1278_HEADER_EXPL_MODE, 0, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, newSpreadingFactor | RADIOLIB_SX127X_TX_MODE_SINGLE, 7, 3); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECT_OPTIMIZE, RADIOLIB_SX127X_DETECT_OPTIMIZE_SF_7_12, 2, 0); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DETECTION_THRESHOLD, RADIOLIB_SX127X_DETECTION_THRESHOLD_SF_7_12); } return(state); } @@ -517,7 +528,8 @@ int16_t SX1278::setCodingRateRaw(uint8_t newCodingRate) { int16_t state = SX127x::standby(); // write register - state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, newCodingRate, 3, 1); + Module* mod = this->getMod(); + state |= mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, newCodingRate, 3, 1); return(state); } @@ -528,11 +540,12 @@ int16_t SX1278::setHeaderType(uint8_t headerType, size_t len) { } // set requested packet mode - int16_t state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, headerType, 0, 0); + Module* mod = this->getMod(); + int16_t state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_1, headerType, 0, 0); RADIOLIB_ASSERT(state); // set length to register - state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PAYLOAD_LENGTH, len); + state = mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PAYLOAD_LENGTH, len); RADIOLIB_ASSERT(state); // update cached value @@ -547,7 +560,8 @@ int16_t SX1278::configFSK() { RADIOLIB_ASSERT(state); // set fast PLL hop - state = this->mod->SPIsetRegValue(RADIOLIB_SX1278_REG_PLL_HOP, RADIOLIB_SX127X_FAST_HOP_ON, 7, 7); + Module* mod = this->getMod(); + state = mod->SPIsetRegValue(RADIOLIB_SX1278_REG_PLL_HOP, RADIOLIB_SX127X_FAST_HOP_ON, 7, 7); return(state); } @@ -559,13 +573,14 @@ void SX1278::errataFix(bool rx) { // sensitivity optimization for 500kHz bandwidth // see SX1276/77/78 Errata, section 2.1 for details + Module* mod = this->getMod(); if(fabs(SX127x::bandwidth - 500.0) <= 0.001) { if((frequency >= 862.0) && (frequency <= 1020.0)) { - this->mod->SPIwriteRegister(0x36, 0x02); - this->mod->SPIwriteRegister(0x3a, 0x64); + mod->SPIwriteRegister(0x36, 0x02); + mod->SPIwriteRegister(0x3a, 0x64); } else if((frequency >= 410.0) && (frequency <= 525.0)) { - this->mod->SPIwriteRegister(0x36, 0x02); - this->mod->SPIwriteRegister(0x3a, 0x7F); + mod->SPIwriteRegister(0x36, 0x02); + mod->SPIwriteRegister(0x3a, 0x7F); } } @@ -619,8 +634,8 @@ void SX1278::errataFix(bool rx) { fixedRegs[2] = 0x00; } else if(fabs(SX127x::bandwidth - 500.0) <= 0.001) { fixedRegs[0] = 0b1000000; - fixedRegs[1] = this->mod->SPIreadRegister(0x2F); - fixedRegs[2] = this->mod->SPIreadRegister(0x30); + fixedRegs[1] = mod->SPIreadRegister(0x2F); + fixedRegs[2] = mod->SPIreadRegister(0x30); } else { return; } @@ -636,9 +651,9 @@ void SX1278::errataFix(bool rx) { } // finally, apply errata fixes - this->mod->SPIsetRegValue(0x31, fixedRegs[0], 7, 7); - this->mod->SPIsetRegValue(0x2F, fixedRegs[1]); - this->mod->SPIsetRegValue(0x30, fixedRegs[2]); + mod->SPIsetRegValue(0x31, fixedRegs[0], 7, 7); + mod->SPIsetRegValue(0x2F, fixedRegs[1]); + mod->SPIsetRegValue(0x30, fixedRegs[2]); } #endif diff --git a/src/modules/SX127x/SX127x.cpp b/src/modules/SX127x/SX127x.cpp index 00fae8f2..38953a14 100644 --- a/src/modules/SX127x/SX127x.cpp +++ b/src/modules/SX127x/SX127x.cpp @@ -6,10 +6,6 @@ SX127x::SX127x(Module* mod) : PhysicalLayer(RADIOLIB_SX127X_FREQUENCY_STEP_SIZE, this->mod = mod; } -Module* SX127x::getMod() { - return(this->mod); -} - int16_t SX127x::begin(uint8_t* chipVersions, uint8_t numVersions, uint8_t syncWord, uint16_t preambleLength) { // set module properties this->mod->init(); @@ -1477,6 +1473,10 @@ int8_t SX127x::getTempRaw() { return(temp); } +Module* SX127x::getMod() { + return(this->mod); +} + int16_t SX127x::config() { // turn off frequency hopping int16_t state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_HOP_PERIOD, RADIOLIB_SX127X_HOP_PERIOD_OFF); diff --git a/src/modules/SX127x/SX127x.h b/src/modules/SX127x/SX127x.h index 721c5d48..bf09b925 100644 --- a/src/modules/SX127x/SX127x.h +++ b/src/modules/SX127x/SX127x.h @@ -596,8 +596,6 @@ class SX127x: public PhysicalLayer { */ SX127x(Module* mod); - Module* getMod(); - // basic methods /*! @@ -1221,37 +1219,38 @@ class SX127x: public PhysicalLayer { #if !RADIOLIB_GODMODE && !RADIOLIB_LOW_LEVEL protected: #endif - Module* mod; + Module* getMod(); #if !RADIOLIB_GODMODE protected: #endif - float frequency = 0; float bandwidth = 0; uint8_t spreadingFactor = 0; - uint8_t codingRate = 0; - float bitRate = 0; - bool ookEnabled = false; - bool crcEnabled = false; - bool crcOn = true; // default value used in FSK mode size_t packetLength = 0; + uint8_t codingRate = 0; + bool crcEnabled = false; + bool ookEnabled = false; - int16_t setFrequencyRaw(float newFreq); - int16_t setBitRateCommon(float br, uint8_t fracRegAddr); - int16_t config(); int16_t configFSK(); int16_t getActiveModem(); - int16_t directMode(); - int16_t setPacketMode(uint8_t mode, uint8_t len); + int16_t setFrequencyRaw(float newFreq); + int16_t setBitRateCommon(float br, uint8_t fracRegAddr); #if !RADIOLIB_GODMODE private: #endif + Module* mod; + + float bitRate = 0; + bool crcOn = true; // default value used in FSK mode float dataRate = 0; bool packetLengthQueried = false; // FSK packet length is the first byte in FIFO, length can only be queried once uint8_t packetLengthConfig = RADIOLIB_SX127X_PACKET_VARIABLE; + int16_t config(); + int16_t directMode(); + int16_t setPacketMode(uint8_t mode, uint8_t len); bool findChip(uint8_t* vers, uint8_t num); int16_t setMode(uint8_t mode); int16_t setActiveModem(uint8_t modem);