move RADIOLIB_SX127X_PREAMBLE_POLARITY_55 from ::config to ::begin & ::beginFSK

This commit is contained in:
BayCom GmbH 2023-09-21 21:10:53 +02:00
parent 74d00bb5ff
commit bb58005641

View file

@ -51,6 +51,10 @@ int16_t SX127x::begin(uint8_t chipVersion, uint8_t syncWord, uint16_t preambleLe
state = SX127x::setPreambleLength(preambleLength); state = SX127x::setPreambleLength(preambleLength);
RADIOLIB_ASSERT(state); RADIOLIB_ASSERT(state);
// set preamble polarity
state = setPreamblePolarity(RADIOLIB_SX127X_PREAMBLE_POLARITY_55);
RADIOLIB_ASSERT(state);
// disable IQ inversion // disable IQ inversion
state = SX127x::invertIQ(false); state = SX127x::invertIQ(false);
RADIOLIB_ASSERT(state); RADIOLIB_ASSERT(state);
@ -118,6 +122,10 @@ int16_t SX127x::beginFSK(uint8_t chipVersion, float freqDev, float rxBw, uint16_
state = SX127x::setPreambleLength(preambleLength); state = SX127x::setPreambleLength(preambleLength);
RADIOLIB_ASSERT(state); RADIOLIB_ASSERT(state);
// set preamble polarity
state = setPreamblePolarity(RADIOLIB_SX127X_PREAMBLE_POLARITY_55);
RADIOLIB_ASSERT(state);
// set default sync word // set default sync word
uint8_t syncWord[] = {0x12, 0xAD}; uint8_t syncWord[] = {0x12, 0xAD};
state = setSyncWord(syncWord, 2); state = setSyncWord(syncWord, 2);
@ -1453,10 +1461,6 @@ int16_t SX127x::configFSK() {
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_2, RADIOLIB_SX127X_DATA_MODE_PACKET | RADIOLIB_SX127X_IO_HOME_OFF, 6, 5); state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_2, RADIOLIB_SX127X_DATA_MODE_PACKET | RADIOLIB_SX127X_IO_HOME_OFF, 6, 5);
RADIOLIB_ASSERT(state); RADIOLIB_ASSERT(state);
// set preamble polarity
state =this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_SYNC_CONFIG, RADIOLIB_SX127X_PREAMBLE_POLARITY_55, 5, 5);
RADIOLIB_ASSERT(state);
// set FIFO threshold // set FIFO threshold
state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FIFO_THRESH, RADIOLIB_SX127X_TX_START_FIFO_NOT_EMPTY, 7, 7); state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FIFO_THRESH, RADIOLIB_SX127X_TX_START_FIFO_NOT_EMPTY, 7, 7);
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FIFO_THRESH, RADIOLIB_SX127X_FIFO_THRESH, 5, 0); state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FIFO_THRESH, RADIOLIB_SX127X_FIFO_THRESH, 5, 0);