[SX126x] Added Module overrides for all Arduino core functions

This commit is contained in:
jgromes 2020-08-01 16:34:27 +02:00
parent 71045e829b
commit 882ec98563

View file

@ -159,7 +159,7 @@ int16_t SX126x::reset(bool verify) {
// run the reset sequence
Module::pinMode(_mod->getRst(), OUTPUT);
Module::digitalWrite(_mod->getRst(), LOW);
delay(1);
Module::delay(1);
Module::digitalWrite(_mod->getRst(), HIGH);
// return immediately when verification is disabled
@ -168,7 +168,7 @@ int16_t SX126x::reset(bool verify) {
}
// set mode to standby - SX126x often refuses first few commands after reset
uint32_t start = millis();
uint32_t start = Module::millis();
while(true) {
// try to set mode to standby
int16_t state = standby();
@ -178,13 +178,13 @@ int16_t SX126x::reset(bool verify) {
}
// standby command failed, check timeout and try again
if(millis() - start >= 3000) {
if(Module::millis() - start >= 3000) {
// timed out, possibly incorrect wiring
return(state);
}
// wait a bit to not spam the module
delay(10);
Module::delay(10);
}
}
@ -223,16 +223,16 @@ int16_t SX126x::transmit(uint8_t* data, size_t len, uint8_t addr) {
RADIOLIB_ASSERT(state);
// wait for packet transmission or timeout
uint32_t start = micros();
while(!digitalRead(_mod->getIrq())) {
yield();
if(micros() - start > timeout) {
uint32_t start = Module::micros();
while(!Module::digitalRead(_mod->getIrq())) {
Module::yield();
if(Module::micros() - start > timeout) {
clearIrqStatus();
standby();
return(ERR_TX_TIMEOUT);
}
}
uint32_t elapsed = micros() - start;
uint32_t elapsed = Module::micros() - start;
// update data rate
_dataRate = (len*8.0)/((float)elapsed/1000000.0);
@ -283,10 +283,10 @@ int16_t SX126x::receive(uint8_t* data, size_t len) {
RADIOLIB_ASSERT(state);
// wait for packet reception or timeout
uint32_t start = micros();
while(!digitalRead(_mod->getIrq())) {
yield();
if(micros() - start > timeout) {
uint32_t start = Module::micros();
while(!Module::digitalRead(_mod->getIrq())) {
Module::yield();
if(Module::micros() - start > timeout) {
fixImplicitTimeout();
clearIrqStatus();
standby();
@ -354,8 +354,8 @@ int16_t SX126x::scanChannel() {
RADIOLIB_ASSERT(state);
// wait for channel activity detected or timeout
while(!digitalRead(_mod->getIrq())) {
yield();
while(!Module::digitalRead(_mod->getIrq())) {
Module::yield();
}
// check CAD result
@ -384,7 +384,7 @@ int16_t SX126x::sleep(bool retainConfig) {
int16_t state = SPIwriteCommand(SX126X_CMD_SET_SLEEP, &sleepMode, 1, false);
// wait for SX126x to safely enter sleep mode
delay(1);
Module::delay(1);
return(state);
}
@ -402,11 +402,11 @@ int16_t SX126x::standby(uint8_t mode) {
}
void SX126x::setDio1Action(void (*func)(void)) {
attachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()), func, RISING);
Module::attachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()), func, RISING);
}
void SX126x::clearDio1Action() {
detachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()));
Module::detachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()));
}
int16_t SX126x::startTransmit(uint8_t* data, size_t len, uint8_t addr) {
@ -463,8 +463,8 @@ int16_t SX126x::startTransmit(uint8_t* data, size_t len, uint8_t addr) {
RADIOLIB_ASSERT(state);
// wait for BUSY to go low (= PA ramp up done)
while(digitalRead(_mod->getGpio())) {
yield();
while(Module::digitalRead(_mod->getGpio())) {
Module::yield();
}
return(state);
@ -1531,9 +1531,9 @@ int16_t SX126x::config(uint8_t modem) {
RADIOLIB_ASSERT(state);
// wait for calibration completion
delay(5);
while(digitalRead(_mod->getGpio())) {
yield();
Module::delay(5);
while(Module::digitalRead(_mod->getGpio())) {
Module::yield();
}
return(ERR_NONE);
@ -1565,14 +1565,14 @@ int16_t SX126x::SPItransfer(uint8_t* cmd, uint8_t cmdLen, bool write, uint8_t* d
#endif
// pull NSS low
digitalWrite(_mod->getCs(), LOW);
Module::digitalWrite(_mod->getCs(), LOW);
// ensure BUSY is low (state machine ready)
uint32_t start = millis();
while(digitalRead(_mod->getGpio())) {
yield();
if(millis() - start >= timeout) {
digitalWrite(_mod->getCs(), HIGH);
uint32_t start = Module::millis();
while(Module::digitalRead(_mod->getGpio())) {
Module::yield();
if(Module::millis() - start >= timeout) {
Module::digitalWrite(_mod->getCs(), HIGH);
return(ERR_SPI_CMD_TIMEOUT);
}
}
@ -1632,15 +1632,15 @@ int16_t SX126x::SPItransfer(uint8_t* cmd, uint8_t cmdLen, bool write, uint8_t* d
// stop transfer
spi->endTransaction();
digitalWrite(_mod->getCs(), HIGH);
Module::digitalWrite(_mod->getCs(), HIGH);
// wait for BUSY to go high and then low
if(waitForBusy) {
delayMicroseconds(1);
start = millis();
while(digitalRead(_mod->getGpio())) {
yield();
if(millis() - start >= timeout) {
Module::delayMicroseconds(1);
start = Module::millis();
while(Module::digitalRead(_mod->getGpio())) {
Module::yield();
if(Module::millis() - start >= timeout) {
status = SX126X_STATUS_CMD_TIMEOUT;
break;
}
@ -1690,7 +1690,7 @@ int16_t SX126x::SPItransfer(uint8_t* cmd, uint8_t cmdLen, bool write, uint8_t* d
// not sure why, but it seems that long enough SPI transaction
// (e.g. setPacketParams for GFSK) will fail without it
#if defined(ARDUINO_ARCH_STM32) || defined(SAMD_SERIES)
delay(1);
Module::delay(1);
#endif
#endif