diff --git a/keywords.txt b/keywords.txt index e117eec2..fd9d2268 100644 --- a/keywords.txt +++ b/keywords.txt @@ -131,6 +131,7 @@ setRfSwitchPins KEYWORD2 forceLDRO KEYWORD2 autoLDRO KEYWORD2 getChipVersion KEYWORD2 +invertIQ KEYWORD2 # RF69-specific setAESKey KEYWORD2 diff --git a/src/modules/SX127x/SX127x.cpp b/src/modules/SX127x/SX127x.cpp index c57f4b56..2fac82e7 100644 --- a/src/modules/SX127x/SX127x.cpp +++ b/src/modules/SX127x/SX127x.cpp @@ -1190,4 +1190,24 @@ void SX127x::clearFIFO(size_t count) { } } +int16_t SX127x::invertIQ(bool invertIQ) { + // check active modem + if(getActiveModem() != SX127X_LORA) { + return(ERR_WRONG_MODEM); + } + + int16_t state; + if(invertIQ) { + state = _mod->SPIsetRegValue(SX127X_REG_INVERT_IQ, SX127X_INVERT_IQ_RXPATH_ON, 6, 6); + state |= _mod->SPIsetRegValue(SX127X_REG_INVERT_IQ, SX127X_INVERT_IQ_TXPATH_ON, 0, 0); + state |= _mod->SPIsetRegValue(SX127X_REG_INVERT_IQ2, SX127X_IQ2_ENABLE); + } else { + state = _mod->SPIsetRegValue(SX127X_REG_INVERT_IQ, SX127X_INVERT_IQ_RXPATH_OFF, 6, 6); + state |= _mod->SPIsetRegValue(SX127X_REG_INVERT_IQ, SX127X_INVERT_IQ_TXPATH_OFF, 0, 0); + state |= _mod->SPIsetRegValue(SX127X_REG_INVERT_IQ2, SX127X_IQ2_DISABLE); + } + + return(state); +} + #endif diff --git a/src/modules/SX127x/SX127x.h b/src/modules/SX127x/SX127x.h index 831e49a4..96692fa4 100644 --- a/src/modules/SX127x/SX127x.h +++ b/src/modules/SX127x/SX127x.h @@ -59,6 +59,7 @@ #define SX127X_REG_INVERT_IQ 0x33 #define SX127X_REG_DETECTION_THRESHOLD 0x37 #define SX127X_REG_SYNC_WORD 0x39 +#define SX127X_REG_INVERT_IQ2 0x3B #define SX127X_REG_DIO_MAPPING_1 0x40 #define SX127X_REG_DIO_MAPPING_2 0x41 #define SX127X_REG_VERSION 0x42 @@ -122,6 +123,12 @@ #define SX127X_DETECT_OPTIMIZE_SF_6 0b00000101 // 2 0 SF6 detection optimization #define SX127X_DETECT_OPTIMIZE_SF_7_12 0b00000011 // 2 0 SF7 to SF12 detection optimization +// SX127X_REG_INVERT_IQ +#define SX127X_INVERT_IQ_RXPATH_ON 0b01000000 // 6 6 I and Q signals are inverted +#define SX127X_INVERT_IQ_RXPATH_OFF 0b00000000 // 6 6 normal mode +#define SX127X_INVERT_IQ_TXPATH_ON 0b00000001 // 0 0 I and Q signals are inverted +#define SX127X_INVERT_IQ_TXPATH_OFF 0b00000000 // 0 0 normal mode + // SX127X_REG_DETECTION_THRESHOLD #define SX127X_DETECTION_THRESHOLD_SF_6 0b00001100 // 7 0 SF6 detection threshold #define SX127X_DETECTION_THRESHOLD_SF_7_12 0b00001010 // 7 0 SF7 to SF12 detection threshold @@ -172,6 +179,10 @@ #define SX127X_SYNC_WORD 0x12 // 7 0 default LoRa sync word #define SX127X_SYNC_WORD_LORAWAN 0x34 // 7 0 sync word reserved for LoRaWAN networks +// SX127X_REG_INVERT_IQ2 +#define SX127X_IQ2_ENABLE 0x19 // 7 0 enable optimize for inverted IQ +#define SX127X_IQ2_DISABLE 0x1D // 7 0 reset optimize for inverted IQ + // SX127x series common FSK registers // NOTE: FSK register names that are conflicting with LoRa registers are marked with "_FSK" suffix #define SX127X_REG_BITRATE_MSB 0x02 @@ -945,6 +956,15 @@ class SX127x: public PhysicalLayer { */ int16_t getChipVersion(); + /*! + \brief Enables/disables Invert the LoRa I and Q signals. + + \param invertIQ Enable (true) or disable (false) LoRa I and Q signals. + + \returns \ref status_codes + */ + int16_t invertIQ(bool invertIQ); + #ifndef RADIOLIB_GODMODE protected: #endif