[MOD] SPI configuration interface rework (#1057)
* [MOD] Rework SPI config interface * [CC1101] Rework SPI config interface * [nRF24] Rework SPI config interface * [SX126x] Rework SPI config interface * [SX128x] Rework SPI config interface * Fix missing moved debug info * [MOD] Fix signed warnings
This commit is contained in:
parent
f61be0d273
commit
4fa0656ddd
8 changed files with 270 additions and 165 deletions
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@ -529,6 +529,17 @@
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#define RADIOLIB_DEBUG_SPI_HEXDUMP(...) {}
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#endif
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// debug info strings
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#define RADIOLIB_VALUE_TO_STRING(x) #x
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#define RADIOLIB_VALUE(x) RADIOLIB_VALUE_TO_STRING(x)
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#define RADIOLIB_INFO "\nRadioLib Info\nVersion: \"" \
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RADIOLIB_VALUE(RADIOLIB_VERSION_MAJOR) "." \
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RADIOLIB_VALUE(RADIOLIB_VERSION_MINOR) "." \
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RADIOLIB_VALUE(RADIOLIB_VERSION_PATCH) "." \
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RADIOLIB_VALUE(RADIOLIB_VERSION_EXTRA) "\"\n" \
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"Platform: " RADIOLIB_VALUE(RADIOLIB_PLATFORM) "\n" \
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"Compiled: " RADIOLIB_VALUE(__DATE__) " " RADIOLIB_VALUE(__TIME__)
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/*!
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\brief A simple assert macro, will return on error.
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168
src/Module.cpp
168
src/Module.cpp
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@ -31,8 +31,7 @@ Module::Module(const Module& mod) {
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}
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Module& Module::operator=(const Module& mod) {
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this->SPIreadCommand = mod.SPIreadCommand;
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this->SPIwriteCommand = mod.SPIwriteCommand;
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memcpy((void*)&mod.spiConfig, &this->spiConfig, sizeof(SPIConfig_t));
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this->csPin = mod.csPin;
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this->irqPin = mod.irqPin;
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this->rstPin = mod.rstPin;
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@ -40,14 +39,12 @@ Module& Module::operator=(const Module& mod) {
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return(*this);
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}
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static const char info[] = RADIOLIB_INFO;
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void Module::init() {
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this->hal->init();
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this->hal->pinMode(csPin, this->hal->GpioModeOutput);
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this->hal->digitalWrite(csPin, this->hal->GpioLevelHigh);
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RADIOLIB_DEBUG_BASIC_PRINTLN("RadioLib Debug Info");
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RADIOLIB_DEBUG_BASIC_PRINTLN("Version: %d.%d.%d.%d", RADIOLIB_VERSION_MAJOR, RADIOLIB_VERSION_MINOR, RADIOLIB_VERSION_PATCH, RADIOLIB_VERSION_EXTRA);
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RADIOLIB_DEBUG_BASIC_PRINTLN("Platform: " RADIOLIB_PLATFORM);
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RADIOLIB_DEBUG_BASIC_PRINTLN("Compiled: " __DATE__ " " __TIME__ "\n");
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RADIOLIB_DEBUG_BASIC_PRINTLN(RADIOLIB_INFO);
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}
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void Module::term() {
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@ -55,7 +52,7 @@ void Module::term() {
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this->hal->term();
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}
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int16_t Module::SPIgetRegValue(uint16_t reg, uint8_t msb, uint8_t lsb) {
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int16_t Module::SPIgetRegValue(uint32_t reg, uint8_t msb, uint8_t lsb) {
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if((msb > 7) || (lsb > 7) || (lsb > msb)) {
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return(RADIOLIB_ERR_INVALID_BIT_RANGE);
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}
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@ -65,7 +62,7 @@ int16_t Module::SPIgetRegValue(uint16_t reg, uint8_t msb, uint8_t lsb) {
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return(maskedValue);
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}
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int16_t Module::SPIsetRegValue(uint16_t reg, uint8_t value, uint8_t msb, uint8_t lsb, uint8_t checkInterval, uint8_t checkMask) {
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int16_t Module::SPIsetRegValue(uint32_t reg, uint8_t value, uint8_t msb, uint8_t lsb, uint8_t checkInterval, uint8_t checkMask) {
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if((msb > 7) || (lsb > 7) || (lsb > msb)) {
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return(RADIOLIB_ERR_INVALID_BIT_RANGE);
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}
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@ -104,47 +101,75 @@ int16_t Module::SPIsetRegValue(uint16_t reg, uint8_t value, uint8_t msb, uint8_t
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#endif
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}
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void Module::SPIreadRegisterBurst(uint16_t reg, size_t numBytes, uint8_t* inBytes) {
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if(!SPIstreamType) {
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SPItransfer(SPIreadCommand, reg, NULL, inBytes, numBytes);
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void Module::SPIreadRegisterBurst(uint32_t reg, size_t numBytes, uint8_t* inBytes) {
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if(!this->spiConfig.stream) {
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SPItransfer(this->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ], reg, NULL, inBytes, numBytes);
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} else {
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uint8_t cmd[] = { SPIreadCommand, (uint8_t)((reg >> 8) & 0xFF), (uint8_t)(reg & 0xFF) };
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SPItransferStream(cmd, 3, false, NULL, inBytes, numBytes, true, RADIOLIB_MODULE_SPI_TIMEOUT);
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uint8_t cmd[6];
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uint8_t* cmdPtr = cmd;
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for(size_t i = 0; i < this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8; i++) {
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*(cmdPtr++) = (this->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] >> 8*i) & 0xFF;
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}
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for(int8_t i = (this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8) - 1; i >= 0; i--) {
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*(cmdPtr++) = (reg >> 8*i) & 0xFF;
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}
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SPItransferStream(cmd, this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8 + this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8, false, NULL, inBytes, numBytes, true, RADIOLIB_MODULE_SPI_TIMEOUT);
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}
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}
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uint8_t Module::SPIreadRegister(uint16_t reg) {
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uint8_t Module::SPIreadRegister(uint32_t reg) {
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uint8_t resp = 0;
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if(!SPIstreamType) {
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SPItransfer(SPIreadCommand, reg, NULL, &resp, 1);
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if(!spiConfig.stream) {
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SPItransfer(this->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ], reg, NULL, &resp, 1);
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} else {
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uint8_t cmd[] = { SPIreadCommand, (uint8_t)((reg >> 8) & 0xFF), (uint8_t)(reg & 0xFF) };
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SPItransferStream(cmd, 3, false, NULL, &resp, 1, true, RADIOLIB_MODULE_SPI_TIMEOUT);
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uint8_t cmd[6];
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uint8_t* cmdPtr = cmd;
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for(size_t i = 0; i < this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8; i++) {
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*(cmdPtr++) = (this->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] >> 8*i) & 0xFF;
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}
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for(int8_t i = (this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8) - 1; i >= 0; i--) {
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*(cmdPtr++) = (reg >> 8*i) & 0xFF;
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}
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SPItransferStream(cmd, this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8 + this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8, false, NULL, &resp, 1, true, RADIOLIB_MODULE_SPI_TIMEOUT);
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}
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return(resp);
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}
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void Module::SPIwriteRegisterBurst(uint16_t reg, uint8_t* data, size_t numBytes) {
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if(!SPIstreamType) {
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SPItransfer(SPIwriteCommand, reg, data, NULL, numBytes);
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void Module::SPIwriteRegisterBurst(uint32_t reg, uint8_t* data, size_t numBytes) {
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if(!spiConfig.stream) {
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SPItransfer(spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE], reg, data, NULL, numBytes);
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} else {
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uint8_t cmd[] = { SPIwriteCommand, (uint8_t)((reg >> 8) & 0xFF), (uint8_t)(reg & 0xFF) };
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SPItransferStream(cmd, 3, true, data, NULL, numBytes, true, RADIOLIB_MODULE_SPI_TIMEOUT);
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uint8_t cmd[6];
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uint8_t* cmdPtr = cmd;
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for(size_t i = 0; i < this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8; i++) {
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*(cmdPtr++) = (this->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] >> 8*i) & 0xFF;
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}
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for(int8_t i = (this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8) - 1; i >= 0; i--) {
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*(cmdPtr++) = (reg >> 8*i) & 0xFF;
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}
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SPItransferStream(cmd, this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8 + this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8, true, data, NULL, numBytes, true, RADIOLIB_MODULE_SPI_TIMEOUT);
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}
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}
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void Module::SPIwriteRegister(uint16_t reg, uint8_t data) {
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if(!SPIstreamType) {
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SPItransfer(SPIwriteCommand, reg, &data, NULL, 1);
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void Module::SPIwriteRegister(uint32_t reg, uint8_t data) {
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if(!spiConfig.stream) {
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SPItransfer(spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE], reg, &data, NULL, 1);
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} else {
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uint8_t cmd[] = { SPIwriteCommand, (uint8_t)((reg >> 8) & 0xFF), (uint8_t)(reg & 0xFF) };
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SPItransferStream(cmd, 3, true, &data, NULL, 1, true, RADIOLIB_MODULE_SPI_TIMEOUT);
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uint8_t cmd[6];
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uint8_t* cmdPtr = cmd;
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for(size_t i = 0; i < this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8; i++) {
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*(cmdPtr++) = (this->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] >> 8*i) & 0xFF;
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}
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for(int8_t i = (this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8) - 1; i >= 0; i--) {
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*(cmdPtr++) = (reg >> 8*i) & 0xFF;
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}
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SPItransferStream(cmd, this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8 + this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8, true, &data, NULL, 1, true, RADIOLIB_MODULE_SPI_TIMEOUT);
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}
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}
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void Module::SPItransfer(uint8_t cmd, uint16_t reg, uint8_t* dataOut, uint8_t* dataIn, size_t numBytes) {
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void Module::SPItransfer(uint16_t cmd, uint32_t reg, uint8_t* dataOut, uint8_t* dataIn, size_t numBytes) {
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// prepare the buffers
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size_t buffLen = this->SPIaddrWidth/8 + numBytes;
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size_t buffLen = this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8 + this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8 + numBytes;
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#if RADIOLIB_STATIC_ONLY
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uint8_t buffOut[RADIOLIB_STATIC_ARRAY_SIZE];
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uint8_t buffIn[RADIOLIB_STATIC_ARRAY_SIZE];
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uint8_t* buffOutPtr = buffOut;
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// copy the command
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if(this->SPIaddrWidth <= 8) {
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// TODO properly handle variable commands and addresses
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if(this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] <= 8) {
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*(buffOutPtr++) = reg | cmd;
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} else {
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*(buffOutPtr++) = (reg >> 8) | cmd;
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}
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// copy the data
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if(cmd == SPIwriteCommand) {
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if(cmd == spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE]) {
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memcpy(buffOutPtr, dataOut, numBytes);
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} else {
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memset(buffOutPtr, this->SPInopCommand, numBytes);
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memset(buffOutPtr, this->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP], numBytes);
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}
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// do the transfer
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@ -177,19 +203,19 @@ void Module::SPItransfer(uint8_t cmd, uint16_t reg, uint8_t* dataOut, uint8_t* d
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this->hal->spiEndTransaction();
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// copy the data
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if(cmd == SPIreadCommand) {
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memcpy(dataIn, &buffIn[this->SPIaddrWidth/8], numBytes);
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if(cmd == spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ]) {
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memcpy(dataIn, &buffIn[this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8], numBytes);
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}
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// print debug information
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#if RADIOLIB_DEBUG_SPI
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uint8_t* debugBuffPtr = NULL;
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if(cmd == SPIwriteCommand) {
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if(cmd == spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE]) {
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RADIOLIB_DEBUG_SPI_PRINT("W\t%X\t", reg);
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debugBuffPtr = &buffOut[this->SPIaddrWidth/8];
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} else if(cmd == SPIreadCommand) {
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debugBuffPtr = &buffOut[this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8];
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} else if(cmd == spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ]) {
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RADIOLIB_DEBUG_SPI_PRINT("R\t%X\t", reg);
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debugBuffPtr = &buffIn[this->SPIaddrWidth/8];
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debugBuffPtr = &buffIn[this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR]/8];
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}
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for(size_t n = 0; n < numBytes; n++) {
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RADIOLIB_DEBUG_SPI_PRINT_NOTAG("%X\t", debugBuffPtr[n]);
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#endif
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}
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int16_t Module::SPIreadStream(uint8_t cmd, uint8_t* data, size_t numBytes, bool waitForGpio, bool verify) {
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return(this->SPIreadStream(&cmd, 1, data, numBytes, waitForGpio, verify));
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int16_t Module::SPIreadStream(uint16_t cmd, uint8_t* data, size_t numBytes, bool waitForGpio, bool verify) {
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uint8_t cmdBuf[2];
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uint8_t* cmdPtr = cmdBuf;
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for(size_t i = 0; i < this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8; i++) {
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*(cmdPtr++) = (cmd >> 8*i) & 0xFF;
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}
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return(this->SPIreadStream(cmdBuf, this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8, data, numBytes, waitForGpio, verify));
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}
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int16_t Module::SPIreadStream(uint8_t* cmd, uint8_t cmdLen, uint8_t* data, size_t numBytes, bool waitForGpio, bool verify) {
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int16_t state = this->SPItransferStream(cmd, cmdLen, false, NULL, data, numBytes, waitForGpio, RADIOLIB_MODULE_SPI_TIMEOUT);
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RADIOLIB_ASSERT(state);
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#if !RADIOLIB_SPI_PARANOID
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(void)verify;
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return(RADIOLIB_ERR_NONE);
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#else
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// check the status
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if(verify) {
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state = this->SPIcheckStream();
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if(verify && (this->spiConfig.checkStatusCb != nullptr)) {
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state = this->spiConfig.checkStatusCb(this);
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}
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return(state);
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#endif
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}
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int16_t Module::SPIwriteStream(uint8_t cmd, uint8_t* data, size_t numBytes, bool waitForGpio, bool verify) {
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return(this->SPIwriteStream(&cmd, 1, data, numBytes, waitForGpio, verify));
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int16_t Module::SPIwriteStream(uint16_t cmd, uint8_t* data, size_t numBytes, bool waitForGpio, bool verify) {
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uint8_t cmdBuf[2];
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uint8_t* cmdPtr = cmdBuf;
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for(size_t i = 0; i < this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8; i++) {
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*(cmdPtr++) = (cmd >> 8*i) & 0xFF;
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}
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return(this->SPIwriteStream(cmdBuf, this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8, data, numBytes, waitForGpio, verify));
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}
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int16_t Module::SPIwriteStream(uint8_t* cmd, uint8_t cmdLen, uint8_t* data, size_t numBytes, bool waitForGpio, bool verify) {
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int16_t state = this->SPItransferStream(cmd, cmdLen, true, data, NULL, numBytes, waitForGpio, RADIOLIB_MODULE_SPI_TIMEOUT);
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RADIOLIB_ASSERT(state);
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#if !RADIOLIB_SPI_PARANOID
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(void)verify;
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return(RADIOLIB_ERR_NONE);
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#else
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// check the status
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if(verify) {
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state = this->SPIcheckStream();
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if(verify && (this->spiConfig.checkStatusCb != nullptr)) {
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state = this->spiConfig.checkStatusCb(this);
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}
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return(state);
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#endif
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}
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int16_t Module::SPIcheckStream() {
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#if RADIOLIB_SPI_PARANOID
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// get the status
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uint8_t spiStatus = 0;
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uint8_t cmd = this->SPIstatusCommand;
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state = this->SPItransferStream(&cmd, 1, false, NULL, &spiStatus, 0, true, RADIOLIB_MODULE_SPI_TIMEOUT);
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uint8_t cmdBuf[2];
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uint8_t* cmdPtr = cmdBuf;
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for(size_t i = 0; i < this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8; i++) {
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*(cmdPtr++) = ( this->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] >> 8*i) & 0xFF;
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}
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state = this->SPItransferStream(cmdBuf, this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD]/8, false, NULL, &spiStatus, 1, true, RADIOLIB_MODULE_SPI_TIMEOUT);
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RADIOLIB_ASSERT(state);
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// translate to RadioLib status code
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if(this->SPIparseStatusCb != nullptr) {
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this->SPIstreamError = this->SPIparseStatusCb(spiStatus);
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if(this->spiConfig.parseStatusCb != nullptr) {
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this->spiConfig.err = this->spiConfig.parseStatusCb(spiStatus);
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}
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#endif
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// prepare the buffers
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size_t buffLen = cmdLen + numBytes;
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if(!write) {
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buffLen++;
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buffLen += (this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_STATUS] / 8);
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}
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#if RADIOLIB_STATIC_ONLY
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uint8_t buffOut[RADIOLIB_STATIC_ARRAY_SIZE];
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if(write) {
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memcpy(buffOutPtr, dataOut, numBytes);
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} else {
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memset(buffOutPtr, this->SPInopCommand, numBytes + 1);
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memset(buffOutPtr, this->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP], numBytes + (this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_STATUS] / 8));
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}
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// ensure GPIO is low
|
||||
if(this->gpioPin == RADIOLIB_NC) {
|
||||
this->hal->delay(1);
|
||||
this->hal->delay(50);
|
||||
} else {
|
||||
uint32_t start = this->hal->millis();
|
||||
while(this->hal->digitalRead(this->gpioPin)) {
|
||||
|
@ -331,14 +383,14 @@ int16_t Module::SPItransferStream(uint8_t* cmd, uint8_t cmdLen, bool write, uint
|
|||
|
||||
// parse status
|
||||
int16_t state = RADIOLIB_ERR_NONE;
|
||||
if((this->SPIparseStatusCb != nullptr) && (numBytes > 0)) {
|
||||
state = this->SPIparseStatusCb(buffIn[cmdLen]);
|
||||
if((this->spiConfig.parseStatusCb != nullptr) && (numBytes > 0)) {
|
||||
state = this->spiConfig.parseStatusCb(buffIn[this->spiConfig.statusPos]);
|
||||
}
|
||||
|
||||
// copy the data
|
||||
if(!write) {
|
||||
// skip the first byte for read-type commands (status-only)
|
||||
memcpy(dataIn, &buffIn[cmdLen + 1], numBytes);
|
||||
// skip the status bytes if present
|
||||
memcpy(dataIn, &buffIn[cmdLen + (this->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_STATUS] / 8)], numBytes);
|
||||
}
|
||||
|
||||
// print debug information
|
||||
|
|
147
src/Module.h
147
src/Module.h
|
@ -13,15 +13,53 @@
|
|||
#endif
|
||||
|
||||
/*!
|
||||
\def Value to use as the last element in a mode table to indicate the
|
||||
end of the table.
|
||||
See \ref setRfSwitchTable for details.
|
||||
\def END_OF_MODE_TABLE Value to use as the last element in a mode table to indicate the
|
||||
end of the table. See \ref setRfSwitchTable for details.
|
||||
*/
|
||||
#define END_OF_MODE_TABLE { Module::MODE_END_OF_TABLE, {} }
|
||||
|
||||
// default timeout for SPI transfers
|
||||
#define RADIOLIB_MODULE_SPI_TIMEOUT (1000)
|
||||
|
||||
/*!
|
||||
\defgroup module_spi_command_pos Position of commands in Module::spiConfig command array.
|
||||
\{
|
||||
*/
|
||||
|
||||
/*! \def RADIOLIB_MODULE_SPI_COMMAND_READ Position of the read command. */
|
||||
#define RADIOLIB_MODULE_SPI_COMMAND_READ (0)
|
||||
|
||||
/*! \def RADIOLIB_MODULE_SPI_COMMAND_WRITE Position of the write command. */
|
||||
#define RADIOLIB_MODULE_SPI_COMMAND_WRITE (1)
|
||||
|
||||
/*! \def RADIOLIB_MODULE_SPI_COMMAND_NOP Position of the no-operation command. */
|
||||
#define RADIOLIB_MODULE_SPI_COMMAND_NOP (2)
|
||||
|
||||
/*! \def RADIOLIB_MODULE_SPI_COMMAND_STATUS Position of the status command. */
|
||||
#define RADIOLIB_MODULE_SPI_COMMAND_STATUS (3)
|
||||
|
||||
/*!
|
||||
\}
|
||||
*/
|
||||
|
||||
/*!
|
||||
\defgroup module_spi_width_pos Position of bit field widths in Module::spiConfig width array.
|
||||
\{
|
||||
*/
|
||||
|
||||
/*! \def RADIOLIB_MODULE_SPI_WIDTH_ADDR Position of the address width. */
|
||||
#define RADIOLIB_MODULE_SPI_WIDTH_ADDR (0)
|
||||
|
||||
/*! \def RADIOLIB_MODULE_SPI_WIDTH_CMD Position of the command width. */
|
||||
#define RADIOLIB_MODULE_SPI_WIDTH_CMD (1)
|
||||
|
||||
/*! \def RADIOLIB_MODULE_SPI_WIDTH_STATUS Position of the status width. */
|
||||
#define RADIOLIB_MODULE_SPI_WIDTH_STATUS (2)
|
||||
|
||||
/*!
|
||||
\}
|
||||
*/
|
||||
|
||||
/*!
|
||||
\class Module
|
||||
\brief Implements all common low-level methods to control the wireless module.
|
||||
|
@ -121,57 +159,52 @@ class Module {
|
|||
Module& operator=(const Module& mod);
|
||||
|
||||
// public member variables
|
||||
/*!
|
||||
\brief Hardware abstraction layer to be used.
|
||||
*/
|
||||
/*! \brief Hardware abstraction layer to be used. */
|
||||
RadioLibHal* hal = NULL;
|
||||
|
||||
/*!
|
||||
\brief Basic SPI read command. Defaults to 0x00.
|
||||
*/
|
||||
uint8_t SPIreadCommand = 0b00000000;
|
||||
|
||||
/*!
|
||||
\brief Basic SPI write command. Defaults to 0x80.
|
||||
*/
|
||||
uint8_t SPIwriteCommand = 0b10000000;
|
||||
|
||||
/*!
|
||||
\brief Basic SPI no-operation command. Defaults to 0x00.
|
||||
*/
|
||||
uint8_t SPInopCommand = 0x00;
|
||||
|
||||
/*!
|
||||
\brief Basic SPI status read command. Defaults to 0x00.
|
||||
*/
|
||||
uint8_t SPIstatusCommand = 0x00;
|
||||
|
||||
/*!
|
||||
\brief SPI address width. Defaults to 8, currently only supports 8 and 16-bit addresses.
|
||||
*/
|
||||
uint8_t SPIaddrWidth = 8;
|
||||
|
||||
/*!
|
||||
\brief Whether the SPI interface is stream-type (e.g. SX126x) or register-type (e.g. SX127x).
|
||||
Defaults to register-type SPI interfaces.
|
||||
*/
|
||||
bool SPIstreamType = false;
|
||||
|
||||
/*!
|
||||
\brief The last recorded SPI stream error.
|
||||
*/
|
||||
int16_t SPIstreamError = RADIOLIB_ERR_UNKNOWN;
|
||||
|
||||
/*!
|
||||
\brief SPI status parsing callback typedef.
|
||||
*/
|
||||
/*! \brief Callback for parsing SPI status. */
|
||||
typedef int16_t (*SPIparseStatusCb_t)(uint8_t in);
|
||||
|
||||
/*! \brief Callback for validation SPI status. */
|
||||
typedef int16_t (*SPIcheckStatusCb_t)(Module* mod);
|
||||
|
||||
/*!
|
||||
\brief Callback to function that will parse the module-specific status codes to RadioLib status codes.
|
||||
Typically used for modules with SPI stream-type interface (e.g. SX126x/SX128x).
|
||||
\struct SPIConfig_t
|
||||
\brief SPI configuration structure.
|
||||
*/
|
||||
SPIparseStatusCb_t SPIparseStatusCb = nullptr;
|
||||
struct SPIConfig_t {
|
||||
/*! \brief Whether the SPI module is stream-type (SX126x/8x) or registrer access type (SX127x, CC1101 etc). */
|
||||
bool stream;
|
||||
|
||||
/*! \brief Last recorded SPI error - only updated for modules that return status during SPI transfers. */
|
||||
int16_t err;
|
||||
|
||||
/*! \brief SPI commands */
|
||||
uint16_t cmds[4];
|
||||
|
||||
/*! \brief Bit widths of SPI addresses, commands and status bytes */
|
||||
size_t widths[3];
|
||||
|
||||
/*! \brief Byte position of status command in SPI stream */
|
||||
uint8_t statusPos;
|
||||
|
||||
/*! \brief Callback for parsing SPI status. */
|
||||
SPIparseStatusCb_t parseStatusCb;
|
||||
|
||||
/*! \brief Callback for validation SPI status. */
|
||||
SPIcheckStatusCb_t checkStatusCb;
|
||||
};
|
||||
|
||||
/*! \brief SPI configuration structure. The default configuration corresponds to register-access modules, such as SX127x. */
|
||||
SPIConfig_t spiConfig = {
|
||||
.stream = false,
|
||||
.err = RADIOLIB_ERR_UNKNOWN,
|
||||
.cmds = { 0x00, 0x80, 0x00, 0x00 },
|
||||
.widths = { 8, 0, 8 },
|
||||
.statusPos = 0,
|
||||
.parseStatusCb = nullptr,
|
||||
.checkStatusCb = nullptr,
|
||||
};
|
||||
|
||||
#if RADIOLIB_INTERRUPT_TIMING
|
||||
|
||||
|
@ -213,7 +246,7 @@ class Module {
|
|||
\param lsb Least significant bit of the register variable. Bits below this one will be masked out.
|
||||
\returns Masked register value or status code.
|
||||
*/
|
||||
int16_t SPIgetRegValue(uint16_t reg, uint8_t msb = 7, uint8_t lsb = 0);
|
||||
int16_t SPIgetRegValue(uint32_t reg, uint8_t msb = 7, uint8_t lsb = 0);
|
||||
|
||||
/*!
|
||||
\brief Overwrite-safe SPI write method with verification. This method is the preferred SPI write mechanism.
|
||||
|
@ -225,7 +258,7 @@ class Module {
|
|||
\param checkMask Mask of bits to check, only bits set to 1 will be verified.
|
||||
\returns \ref status_codes
|
||||
*/
|
||||
int16_t SPIsetRegValue(uint16_t reg, uint8_t value, uint8_t msb = 7, uint8_t lsb = 0, uint8_t checkInterval = 2, uint8_t checkMask = 0xFF);
|
||||
int16_t SPIsetRegValue(uint32_t reg, uint8_t value, uint8_t msb = 7, uint8_t lsb = 0, uint8_t checkInterval = 2, uint8_t checkMask = 0xFF);
|
||||
|
||||
/*!
|
||||
\brief SPI burst read method.
|
||||
|
@ -233,14 +266,14 @@ class Module {
|
|||
\param numBytes Number of bytes that will be read.
|
||||
\param inBytes Pointer to array that will hold the read data.
|
||||
*/
|
||||
void SPIreadRegisterBurst(uint16_t reg, size_t numBytes, uint8_t* inBytes);
|
||||
void SPIreadRegisterBurst(uint32_t reg, size_t numBytes, uint8_t* inBytes);
|
||||
|
||||
/*!
|
||||
\brief SPI basic read method. Use of this method is reserved for special cases, SPIgetRegValue should be used instead.
|
||||
\param reg Address of SPI register to read.
|
||||
\returns Value that was read from register.
|
||||
*/
|
||||
uint8_t SPIreadRegister(uint16_t reg);
|
||||
uint8_t SPIreadRegister(uint32_t reg);
|
||||
|
||||
/*!
|
||||
\brief SPI burst write method.
|
||||
|
@ -248,14 +281,14 @@ class Module {
|
|||
\param data Pointer to array that holds the data that will be written.
|
||||
\param numBytes Number of bytes that will be written.
|
||||
*/
|
||||
void SPIwriteRegisterBurst(uint16_t reg, uint8_t* data, size_t numBytes);
|
||||
void SPIwriteRegisterBurst(uint32_t reg, uint8_t* data, size_t numBytes);
|
||||
|
||||
/*!
|
||||
\brief SPI basic write method. Use of this method is reserved for special cases, SPIsetRegValue should be used instead.
|
||||
\param reg Address of SPI register to write.
|
||||
\param data Value that will be written to the register.
|
||||
*/
|
||||
void SPIwriteRegister(uint16_t reg, uint8_t data);
|
||||
void SPIwriteRegister(uint32_t reg, uint8_t data);
|
||||
|
||||
/*!
|
||||
\brief SPI single transfer method.
|
||||
|
@ -265,7 +298,7 @@ class Module {
|
|||
\param dataIn Data that was transferred from slave to master.
|
||||
\param numBytes Number of bytes to transfer.
|
||||
*/
|
||||
void SPItransfer(uint8_t cmd, uint16_t reg, uint8_t* dataOut, uint8_t* dataIn, size_t numBytes);
|
||||
void SPItransfer(uint16_t cmd, uint32_t reg, uint8_t* dataOut, uint8_t* dataIn, size_t numBytes);
|
||||
|
||||
/*!
|
||||
\brief Method to check the result of last SPI stream transfer.
|
||||
|
@ -282,7 +315,7 @@ class Module {
|
|||
\param verify Whether to verify the result of the transaction after it is finished.
|
||||
\returns \ref status_codes
|
||||
*/
|
||||
int16_t SPIreadStream(uint8_t cmd, uint8_t* data, size_t numBytes, bool waitForGpio = true, bool verify = true);
|
||||
int16_t SPIreadStream(uint16_t cmd, uint8_t* data, size_t numBytes, bool waitForGpio = true, bool verify = true);
|
||||
|
||||
/*!
|
||||
\brief Method to perform a read transaction with SPI stream.
|
||||
|
@ -305,7 +338,7 @@ class Module {
|
|||
\param verify Whether to verify the result of the transaction after it is finished.
|
||||
\returns \ref status_codes
|
||||
*/
|
||||
int16_t SPIwriteStream(uint8_t cmd, uint8_t* data, size_t numBytes, bool waitForGpio = true, bool verify = true);
|
||||
int16_t SPIwriteStream(uint16_t cmd, uint8_t* data, size_t numBytes, bool waitForGpio = true, bool verify = true);
|
||||
|
||||
/*!
|
||||
\brief Method to perform a write transaction with SPI stream.
|
||||
|
|
|
@ -53,16 +53,7 @@
|
|||
|
||||
// print debug info
|
||||
#if RADIOLIB_DEBUG
|
||||
#define RADIOLIB_VALUE_TO_STRING(x) #x
|
||||
#define RADIOLIB_VALUE(x) RADIOLIB_VALUE_TO_STRING(x)
|
||||
#pragma message("\nRadioLib Debug Info\nVersion: \"" \
|
||||
RADIOLIB_VALUE(RADIOLIB_VERSION_MAJOR) "." \
|
||||
RADIOLIB_VALUE(RADIOLIB_VERSION_MINOR) "." \
|
||||
RADIOLIB_VALUE(RADIOLIB_VERSION_PATCH) "." \
|
||||
RADIOLIB_VALUE(RADIOLIB_VERSION_EXTRA) "\"\n" \
|
||||
"Platform: " RADIOLIB_VALUE(RADIOLIB_PLATFORM) "\n" \
|
||||
"Compiled: " RADIOLIB_VALUE(__DATE__) " " RADIOLIB_VALUE(__TIME__) \
|
||||
)
|
||||
#pragma message(RADIOLIB_INFO)
|
||||
#endif
|
||||
|
||||
// check unknown/unsupported platform
|
||||
|
|
|
@ -8,8 +8,8 @@ CC1101::CC1101(Module* module) : PhysicalLayer(RADIOLIB_CC1101_FREQUENCY_STEP_SI
|
|||
|
||||
int16_t CC1101::begin(float freq, float br, float freqDev, float rxBw, int8_t pwr, uint8_t preambleLength) {
|
||||
// set module properties
|
||||
this->mod->SPIreadCommand = RADIOLIB_CC1101_CMD_READ;
|
||||
this->mod->SPIwriteCommand = RADIOLIB_CC1101_CMD_WRITE;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_CC1101_CMD_READ;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_CC1101_CMD_WRITE;
|
||||
this->mod->init();
|
||||
this->mod->hal->pinMode(this->mod->getIrq(), this->mod->hal->GpioModeInput);
|
||||
|
||||
|
|
|
@ -14,12 +14,15 @@ int16_t SX126x::begin(uint8_t cr, uint8_t syncWord, uint16_t preambleLength, flo
|
|||
this->mod->init();
|
||||
this->mod->hal->pinMode(this->mod->getIrq(), this->mod->hal->GpioModeInput);
|
||||
this->mod->hal->pinMode(this->mod->getGpio(), this->mod->hal->GpioModeInput);
|
||||
this->mod->SPIreadCommand = RADIOLIB_SX126X_CMD_READ_REGISTER;
|
||||
this->mod->SPIwriteCommand = RADIOLIB_SX126X_CMD_WRITE_REGISTER;
|
||||
this->mod->SPInopCommand = RADIOLIB_SX126X_CMD_NOP;
|
||||
this->mod->SPIstatusCommand = RADIOLIB_SX126X_CMD_GET_STATUS;
|
||||
this->mod->SPIstreamType = true;
|
||||
this->mod->SPIparseStatusCb = SPIparseStatus;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] = 16;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD] = 8;
|
||||
this->mod->spiConfig.statusPos = 1;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_SX126X_CMD_READ_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_SX126X_CMD_WRITE_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP] = RADIOLIB_SX126X_CMD_NOP;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] = RADIOLIB_SX126X_CMD_GET_STATUS;
|
||||
this->mod->spiConfig.stream = true;
|
||||
this->mod->spiConfig.parseStatusCb = SPIparseStatus;
|
||||
|
||||
// try to find the SX126x chip
|
||||
if(!SX126x::findChip(this->chipType)) {
|
||||
|
@ -99,12 +102,15 @@ int16_t SX126x::beginFSK(float br, float freqDev, float rxBw, uint16_t preambleL
|
|||
this->mod->init();
|
||||
this->mod->hal->pinMode(this->mod->getIrq(), this->mod->hal->GpioModeInput);
|
||||
this->mod->hal->pinMode(this->mod->getGpio(), this->mod->hal->GpioModeInput);
|
||||
this->mod->SPIreadCommand = RADIOLIB_SX126X_CMD_READ_REGISTER;
|
||||
this->mod->SPIwriteCommand = RADIOLIB_SX126X_CMD_WRITE_REGISTER;
|
||||
this->mod->SPInopCommand = RADIOLIB_SX126X_CMD_NOP;
|
||||
this->mod->SPIstatusCommand = RADIOLIB_SX126X_CMD_GET_STATUS;
|
||||
this->mod->SPIstreamType = true;
|
||||
this->mod->SPIparseStatusCb = SPIparseStatus;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] = 16;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD] = 8;
|
||||
this->mod->spiConfig.statusPos = 1;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_SX126X_CMD_READ_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_SX126X_CMD_WRITE_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP] = RADIOLIB_SX126X_CMD_NOP;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] = RADIOLIB_SX126X_CMD_GET_STATUS;
|
||||
this->mod->spiConfig.stream = true;
|
||||
this->mod->spiConfig.parseStatusCb = SPIparseStatus;
|
||||
|
||||
// try to find the SX126x chip
|
||||
if(!SX126x::findChip(this->chipType)) {
|
||||
|
|
|
@ -11,12 +11,15 @@ int16_t SX128x::begin(float freq, float bw, uint8_t sf, uint8_t cr, uint8_t sync
|
|||
this->mod->init();
|
||||
this->mod->hal->pinMode(this->mod->getIrq(), this->mod->hal->GpioModeInput);
|
||||
this->mod->hal->pinMode(this->mod->getGpio(), this->mod->hal->GpioModeInput);
|
||||
this->mod->SPIreadCommand = RADIOLIB_SX128X_CMD_READ_REGISTER;
|
||||
this->mod->SPIwriteCommand = RADIOLIB_SX128X_CMD_WRITE_REGISTER;
|
||||
this->mod->SPInopCommand = RADIOLIB_SX128X_CMD_NOP;
|
||||
this->mod->SPIstatusCommand = RADIOLIB_SX128X_CMD_GET_STATUS;
|
||||
this->mod->SPIstreamType = true;
|
||||
this->mod->SPIparseStatusCb = SPIparseStatus;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] = 16;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD] = 8;
|
||||
this->mod->spiConfig.statusPos = 1;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_SX128X_CMD_READ_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_SX128X_CMD_WRITE_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP] = RADIOLIB_SX128X_CMD_NOP;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] = RADIOLIB_SX128X_CMD_GET_STATUS;
|
||||
this->mod->spiConfig.stream = true;
|
||||
this->mod->spiConfig.parseStatusCb = SPIparseStatus;
|
||||
RADIOLIB_DEBUG_BASIC_PRINTLN("M\tSX128x");
|
||||
|
||||
// initialize LoRa modulation variables
|
||||
|
@ -72,12 +75,15 @@ int16_t SX128x::beginGFSK(float freq, uint16_t br, float freqDev, int8_t pwr, ui
|
|||
this->mod->init();
|
||||
this->mod->hal->pinMode(this->mod->getIrq(), this->mod->hal->GpioModeInput);
|
||||
this->mod->hal->pinMode(this->mod->getGpio(), this->mod->hal->GpioModeInput);
|
||||
this->mod->SPIreadCommand = RADIOLIB_SX128X_CMD_READ_REGISTER;
|
||||
this->mod->SPIwriteCommand = RADIOLIB_SX128X_CMD_WRITE_REGISTER;
|
||||
this->mod->SPInopCommand = RADIOLIB_SX128X_CMD_NOP;
|
||||
this->mod->SPIstatusCommand = RADIOLIB_SX128X_CMD_GET_STATUS;
|
||||
this->mod->SPIstreamType = true;
|
||||
this->mod->SPIparseStatusCb = SPIparseStatus;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] = 16;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD] = 8;
|
||||
this->mod->spiConfig.statusPos = 1;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_SX128X_CMD_READ_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_SX128X_CMD_WRITE_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP] = RADIOLIB_SX128X_CMD_NOP;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] = RADIOLIB_SX128X_CMD_GET_STATUS;
|
||||
this->mod->spiConfig.stream = true;
|
||||
this->mod->spiConfig.parseStatusCb = SPIparseStatus;
|
||||
RADIOLIB_DEBUG_BASIC_PRINTLN("M\tSX128x");
|
||||
|
||||
// initialize GFSK modulation variables
|
||||
|
@ -141,12 +147,15 @@ int16_t SX128x::beginBLE(float freq, uint16_t br, float freqDev, int8_t pwr, uin
|
|||
this->mod->init();
|
||||
this->mod->hal->pinMode(this->mod->getIrq(), this->mod->hal->GpioModeInput);
|
||||
this->mod->hal->pinMode(this->mod->getGpio(), this->mod->hal->GpioModeInput);
|
||||
this->mod->SPIreadCommand = RADIOLIB_SX128X_CMD_READ_REGISTER;
|
||||
this->mod->SPIwriteCommand = RADIOLIB_SX128X_CMD_WRITE_REGISTER;
|
||||
this->mod->SPInopCommand = RADIOLIB_SX128X_CMD_NOP;
|
||||
this->mod->SPIstatusCommand = RADIOLIB_SX128X_CMD_GET_STATUS;
|
||||
this->mod->SPIstreamType = true;
|
||||
this->mod->SPIparseStatusCb = SPIparseStatus;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] = 16;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD] = 8;
|
||||
this->mod->spiConfig.statusPos = 1;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_SX128X_CMD_READ_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_SX128X_CMD_WRITE_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP] = RADIOLIB_SX128X_CMD_NOP;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] = RADIOLIB_SX128X_CMD_GET_STATUS;
|
||||
this->mod->spiConfig.stream = true;
|
||||
this->mod->spiConfig.parseStatusCb = SPIparseStatus;
|
||||
RADIOLIB_DEBUG_BASIC_PRINTLN("M\tSX128x");
|
||||
|
||||
// initialize BLE modulation variables
|
||||
|
@ -196,12 +205,15 @@ int16_t SX128x::beginFLRC(float freq, uint16_t br, uint8_t cr, int8_t pwr, uint1
|
|||
this->mod->init();
|
||||
this->mod->hal->pinMode(this->mod->getIrq(), this->mod->hal->GpioModeInput);
|
||||
this->mod->hal->pinMode(this->mod->getGpio(), this->mod->hal->GpioModeInput);
|
||||
this->mod->SPIreadCommand = RADIOLIB_SX128X_CMD_READ_REGISTER;
|
||||
this->mod->SPIwriteCommand = RADIOLIB_SX128X_CMD_WRITE_REGISTER;
|
||||
this->mod->SPInopCommand = RADIOLIB_SX128X_CMD_NOP;
|
||||
this->mod->SPIstatusCommand = RADIOLIB_SX128X_CMD_GET_STATUS;
|
||||
this->mod->SPIstreamType = true;
|
||||
this->mod->SPIparseStatusCb = SPIparseStatus;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_ADDR] = 16;
|
||||
this->mod->spiConfig.widths[RADIOLIB_MODULE_SPI_WIDTH_CMD] = 8;
|
||||
this->mod->spiConfig.statusPos = 1;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_SX128X_CMD_READ_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_SX128X_CMD_WRITE_REGISTER;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_NOP] = RADIOLIB_SX128X_CMD_NOP;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_STATUS] = RADIOLIB_SX128X_CMD_GET_STATUS;
|
||||
this->mod->spiConfig.stream = true;
|
||||
this->mod->spiConfig.parseStatusCb = SPIparseStatus;
|
||||
RADIOLIB_DEBUG_BASIC_PRINTLN("M\tSX128x");
|
||||
|
||||
// initialize FLRC modulation variables
|
||||
|
|
|
@ -8,8 +8,8 @@ nRF24::nRF24(Module* mod) : PhysicalLayer(RADIOLIB_NRF24_FREQUENCY_STEP_SIZE, RA
|
|||
|
||||
int16_t nRF24::begin(int16_t freq, int16_t dr, int8_t pwr, uint8_t addrWidth) {
|
||||
// set module properties
|
||||
this->mod->SPIreadCommand = RADIOLIB_NRF24_CMD_READ;
|
||||
this->mod->SPIwriteCommand = RADIOLIB_NRF24_CMD_WRITE;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_READ] = RADIOLIB_NRF24_CMD_READ;
|
||||
this->mod->spiConfig.cmds[RADIOLIB_MODULE_SPI_COMMAND_WRITE] = RADIOLIB_NRF24_CMD_WRITE;
|
||||
this->mod->init();
|
||||
this->mod->hal->pinMode(this->mod->getIrq(), this->mod->hal->GpioModeInput);
|
||||
|
||||
|
|
Loading…
Add table
Reference in a new issue