From 432e36b043cccb89b4d7e212528a8df8d45640da Mon Sep 17 00:00:00 2001 From: jgromes Date: Sat, 5 Dec 2020 11:07:00 +0000 Subject: [PATCH] =?UTF-8?q?Deploying=20to=20gh-pages=20from=20=20@=202096a?= =?UTF-8?q?811d4230640c6abc92fb19cf060419b7840=20=F0=9F=9A=80?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- _r_f_m95_8h_source.html | 2 +- _r_f_m96_8h_source.html | 2 +- _s_x126x_8h_source.html | 102 ++++++++++++++++++++-------------------- _s_x127x_8h_source.html | 80 +++++++++++++++---------------- _s_x128x_8h_source.html | 76 +++++++++++++++--------------- _si4430_8h_source.html | 4 +- _si4431_8h_source.html | 2 +- _si4432_8h_source.html | 4 +- n_r_f24_8h_source.html | 52 ++++++++++---------- 9 files changed, 162 insertions(+), 162 deletions(-) diff --git a/_r_f_m95_8h_source.html b/_r_f_m95_8h_source.html index 1c3a9061..10ebe10f 100644 --- a/_r_f_m95_8h_source.html +++ b/_r_f_m95_8h_source.html @@ -87,7 +87,7 @@ $(document).ready(function(){initNavTree('_r_f_m95_8h_source.html','');});
1 #if !defined(_RADIOLIB_RFM95_H)
2 #define _RADIOLIB_RFM95_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_RFM9X)
7 
8 #include "../../Module.h"
9 #include "../SX127x/SX127x.h"
10 #include "../SX127x/SX1278.h"
11 
12 // SX127X_REG_VERSION
13 #define RFM9X_CHIP_VERSION_OFFICIAL 0x11
14 #define RFM9X_CHIP_VERSION_UNOFFICIAL 0x12 // according to datasheet, only 0x11 should be possible, but some modules seem to have 0x12
15 
21 class RFM95: public SX1278 {
22  public:
23 
24  // constructor
25 
31  RFM95(Module* mod);
32 
33  // basic methods
34 
58  int16_t begin(float freq = 915.0, float bw = 125.0, uint8_t sf = 9, uint8_t cr = 7, uint8_t syncWord = SX127X_SYNC_WORD, int8_t power = 10, uint16_t preambleLength = 8, uint8_t gain = 0);
59 
60  // configuration methods
61 
69  int16_t setFrequency(float freq);
70 
71 #ifndef RADIOLIB_GODMODE
72  private:
73 #endif
74 
75 };
76 
77 #endif
78 
79 #endif
RFM95::begin
int16_t begin(float freq=915.0, float bw=125.0, uint8_t sf=9, uint8_t cr=7, uint8_t syncWord=SX127X_SYNC_WORD, int8_t power=10, uint16_t preambleLength=8, uint8_t gain=0)
LoRa modem initialization method. Must be called at least once from Arduino sketch to initialize the ...
Definition: RFM95.cpp:8
Module
Implements all common low-level SPI/UART/I2C methods to control the wireless module. Every module class contains one private instance of this class.
Definition: Module.h:17
SX1278
Derived class for SX1278 modules. Also used as base class for SX1276, SX1277, SX1279, RFM95 and RFM96. All of these modules use the same basic hardware and only differ in parameter ranges (and names).
Definition: SX1278.h:104
-
RFM95::setFrequency
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values range from 868.0 MHz to 915.0 MHz.
Definition: RFM95.cpp:45
+
RFM95::setFrequency
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values range from 868.0 MHz to 915.0 MHz.
Definition: RFM95.cpp:47
RFM95::RFM95
RFM95(Module *mod)
Default constructor. Called from Arduino sketch when creating new LoRa instance.
Definition: RFM95.cpp:4
RFM95
Derived class for RFM95 modules. Overrides some methods from SX1278 due to different parameter ranges...
Definition: RFM95.h:21
diff --git a/_r_f_m96_8h_source.html b/_r_f_m96_8h_source.html index b2faa4fd..c5f923cd 100644 --- a/_r_f_m96_8h_source.html +++ b/_r_f_m96_8h_source.html @@ -84,7 +84,7 @@ $(document).ready(function(){initNavTree('_r_f_m96_8h_source.html','');});
RFM96.h
-
1 #if !defined(_RADIOLIB_RFM96_H)
2 #define _RADIOLIB_RFM96_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_RFM9X)
7 
8 #include "../../Module.h"
9 #include "../SX127x/SX127x.h"
10 #include "../SX127x/SX1278.h"
11 
12 // SX127X_REG_VERSION
13 #define RFM9X_CHIP_VERSION_OFFICIAL 0x11
14 #define RFM9X_CHIP_VERSION_UNOFFICIAL 0x12 // according to datasheet, only 0x11 should be possible, but some modules seem to have 0x12
15 
21 class RFM96: public SX1278 {
22  public:
23 
24  // constructor
25 
31  RFM96(Module* mod);
32 
33  // basic methods
34 
58  int16_t begin(float freq = 434.0, float bw = 125.0, uint8_t sf = 9, uint8_t cr = 7, uint8_t syncWord = SX127X_SYNC_WORD, int8_t power = 10, uint16_t preambleLength = 8, uint8_t gain = 0);
59 
60  // configuration methods
61 
69  int16_t setFrequency(float freq);
70 
71 #ifndef RADIOLIB_GODMODE
72  private:
73 #endif
74 
75 };
76 
82 using RFM98 = RFM96;
83 
84 #endif
85 
86 #endif
RFM96::setFrequency
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values range from 433.0 MHz to 470.0 MHz.
Definition: RFM96.cpp:46
+
1 #if !defined(_RADIOLIB_RFM96_H)
2 #define _RADIOLIB_RFM96_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_RFM9X)
7 
8 #include "../../Module.h"
9 #include "../SX127x/SX127x.h"
10 #include "../SX127x/SX1278.h"
11 
12 // SX127X_REG_VERSION
13 #define RFM9X_CHIP_VERSION_OFFICIAL 0x11
14 #define RFM9X_CHIP_VERSION_UNOFFICIAL 0x12 // according to datasheet, only 0x11 should be possible, but some modules seem to have 0x12
15 
21 class RFM96: public SX1278 {
22  public:
23 
24  // constructor
25 
31  RFM96(Module* mod);
32 
33  // basic methods
34 
58  int16_t begin(float freq = 434.0, float bw = 125.0, uint8_t sf = 9, uint8_t cr = 7, uint8_t syncWord = SX127X_SYNC_WORD, int8_t power = 10, uint16_t preambleLength = 8, uint8_t gain = 0);
59 
60  // configuration methods
61 
69  int16_t setFrequency(float freq);
70 
71 #ifndef RADIOLIB_GODMODE
72  private:
73 #endif
74 
75 };
76 
82 using RFM98 = RFM96;
83 
84 #endif
85 
86 #endif
RFM96::setFrequency
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values range from 433.0 MHz to 470.0 MHz.
Definition: RFM96.cpp:48
RFM98
Only exists as alias for RFM96, since there seems to be no difference between RFM96 and RFM98 modules...
RFM96::RFM96
RFM96(Module *mod)
Default constructor. Called from Arduino sketch when creating new LoRa instance.
Definition: RFM96.cpp:4
Module
Implements all common low-level SPI/UART/I2C methods to control the wireless module. Every module class contains one private instance of this class.
Definition: Module.h:17
diff --git a/_s_x126x_8h_source.html b/_s_x126x_8h_source.html index 87a21b80..b29e8207 100644 --- a/_s_x126x_8h_source.html +++ b/_s_x126x_8h_source.html @@ -84,66 +84,66 @@ $(document).ready(function(){initNavTree('_s_x126x_8h_source.html','');});
SX126x.h
-
1 #if !defined(_RADIOLIB_SX126X_H)
2 #define _RADIOLIB_SX126X_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SX126X)
7 
8 #include "../../Module.h"
9 
10 #include "../../protocols/PhysicalLayer/PhysicalLayer.h"
11 
12 // SX126X physical layer properties
13 #define SX126X_FREQUENCY_STEP_SIZE 0.9536743164
14 #define SX126X_MAX_PACKET_LENGTH 255
15 #define SX126X_CRYSTAL_FREQ 32.0
16 #define SX126X_DIV_EXPONENT 25
17 
18 // SX126X SPI commands
19 // operational modes commands
20 #define SX126X_CMD_NOP 0x00
21 #define SX126X_CMD_SET_SLEEP 0x84
22 #define SX126X_CMD_SET_STANDBY 0x80
23 #define SX126X_CMD_SET_FS 0xC1
24 #define SX126X_CMD_SET_TX 0x83
25 #define SX126X_CMD_SET_RX 0x82
26 #define SX126X_CMD_STOP_TIMER_ON_PREAMBLE 0x9F
27 #define SX126X_CMD_SET_RX_DUTY_CYCLE 0x94
28 #define SX126X_CMD_SET_CAD 0xC5
29 #define SX126X_CMD_SET_TX_CONTINUOUS_WAVE 0xD1
30 #define SX126X_CMD_SET_TX_INFINITE_PREAMBLE 0xD2
31 #define SX126X_CMD_SET_REGULATOR_MODE 0x96
32 #define SX126X_CMD_CALIBRATE 0x89
33 #define SX126X_CMD_CALIBRATE_IMAGE 0x98
34 #define SX126X_CMD_SET_PA_CONFIG 0x95
35 #define SX126X_CMD_SET_RX_TX_FALLBACK_MODE 0x93
36 
37 // register and buffer access commands
38 #define SX126X_CMD_WRITE_REGISTER 0x0D
39 #define SX126X_CMD_READ_REGISTER 0x1D
40 #define SX126X_CMD_WRITE_BUFFER 0x0E
41 #define SX126X_CMD_READ_BUFFER 0x1E
42 
43 // DIO and IRQ control
44 #define SX126X_CMD_SET_DIO_IRQ_PARAMS 0x08
45 #define SX126X_CMD_GET_IRQ_STATUS 0x12
46 #define SX126X_CMD_CLEAR_IRQ_STATUS 0x02
47 #define SX126X_CMD_SET_DIO2_AS_RF_SWITCH_CTRL 0x9D
48 #define SX126X_CMD_SET_DIO3_AS_TCXO_CTRL 0x97
49 
50 // RF, modulation and packet commands
51 #define SX126X_CMD_SET_RF_FREQUENCY 0x86
52 #define SX126X_CMD_SET_PACKET_TYPE 0x8A
53 #define SX126X_CMD_GET_PACKET_TYPE 0x11
54 #define SX126X_CMD_SET_TX_PARAMS 0x8E
55 #define SX126X_CMD_SET_MODULATION_PARAMS 0x8B
56 #define SX126X_CMD_SET_PACKET_PARAMS 0x8C
57 #define SX126X_CMD_SET_CAD_PARAMS 0x88
58 #define SX126X_CMD_SET_BUFFER_BASE_ADDRESS 0x8F
59 #define SX126X_CMD_SET_LORA_SYMB_NUM_TIMEOUT 0x0A
60 
61 // status commands
62 #define SX126X_CMD_GET_STATUS 0xC0
63 #define SX126X_CMD_GET_RSSI_INST 0x15
64 #define SX126X_CMD_GET_RX_BUFFER_STATUS 0x13
65 #define SX126X_CMD_GET_PACKET_STATUS 0x14
66 #define SX126X_CMD_GET_DEVICE_ERRORS 0x17
67 #define SX126X_CMD_CLEAR_DEVICE_ERRORS 0x07
68 #define SX126X_CMD_GET_STATS 0x10
69 #define SX126X_CMD_RESET_STATS 0x00
70 
71 
72 // SX126X register map
73 #define SX126X_REG_WHITENING_INITIAL_MSB 0x06B8
74 #define SX126X_REG_WHITENING_INITIAL_LSB 0x06B9
75 #define SX126X_REG_CRC_INITIAL_MSB 0x06BC
76 #define SX126X_REG_CRC_INITIAL_LSB 0x06BD
77 #define SX126X_REG_CRC_POLYNOMIAL_MSB 0x06BE
78 #define SX126X_REG_CRC_POLYNOMIAL_LSB 0x06BF
79 #define SX126X_REG_SYNC_WORD_0 0x06C0
80 #define SX126X_REG_SYNC_WORD_1 0x06C1
81 #define SX126X_REG_SYNC_WORD_2 0x06C2
82 #define SX126X_REG_SYNC_WORD_3 0x06C3
83 #define SX126X_REG_SYNC_WORD_4 0x06C4
84 #define SX126X_REG_SYNC_WORD_5 0x06C5
85 #define SX126X_REG_SYNC_WORD_6 0x06C6
86 #define SX126X_REG_SYNC_WORD_7 0x06C7
87 #define SX126X_REG_NODE_ADDRESS 0x06CD
88 #define SX126X_REG_BROADCAST_ADDRESS 0x06CE
89 #define SX126X_REG_LORA_SYNC_WORD_MSB 0x0740
90 #define SX126X_REG_LORA_SYNC_WORD_LSB 0x0741
91 #define SX126X_REG_RANDOM_NUMBER_0 0x0819
92 #define SX126X_REG_RANDOM_NUMBER_1 0x081A
93 #define SX126X_REG_RANDOM_NUMBER_2 0x081B
94 #define SX126X_REG_RANDOM_NUMBER_3 0x081C
95 #define SX126X_REG_RX_GAIN 0x08AC
96 #define SX126X_REG_OCP_CONFIGURATION 0x08E7
97 #define SX126X_REG_XTA_TRIM 0x0911
98 #define SX126X_REG_XTB_TRIM 0x0912
99 
100 // undocumented registers
101 #define SX126X_REG_SENSITIVITY_CONFIG 0x0889 // SX1268 datasheet v1.1, section 15.1
102 #define SX126X_REG_TX_CLAMP_CONFIG 0x08D8 // SX1268 datasheet v1.1, section 15.2
103 #define SX126X_REG_RTC_STOP 0x0920 // SX1268 datasheet v1.1, section 15.3
104 #define SX126X_REG_RTC_EVENT 0x0944 // SX1268 datasheet v1.1, section 15.3
105 #define SX126X_REG_IQ_CONFIG 0x0736 // SX1268 datasheet v1.1, section 15.4
106 #define SX126X_REG_RX_GAIN_RETENTION_0 0x029F // SX1268 datasheet v1.1, section 9.6
107 #define SX126X_REG_RX_GAIN_RETENTION_1 0x02A0 // SX1268 datasheet v1.1, section 9.6
108 #define SX126X_REG_RX_GAIN_RETENTION_2 0x02A1 // SX1268 datasheet v1.1, section 9.6
109 
110 
111 // SX126X SPI command variables
112 //SX126X_CMD_SET_SLEEP MSB LSB DESCRIPTION
113 #define SX126X_SLEEP_START_COLD 0b00000000 // 2 2 sleep mode: cold start, configuration is lost (default)
114 #define SX126X_SLEEP_START_WARM 0b00000100 // 2 2 warm start, configuration is retained
115 #define SX126X_SLEEP_RTC_OFF 0b00000000 // 0 0 wake on RTC timeout: disabled
116 #define SX126X_SLEEP_RTC_ON 0b00000001 // 0 0 enabled
117 
118 //SX126X_CMD_SET_STANDBY
119 #define SX126X_STANDBY_RC 0x00 // 7 0 standby mode: 13 MHz RC oscillator
120 #define SX126X_STANDBY_XOSC 0x01 // 7 0 32 MHz crystal oscillator
121 
122 //SX126X_CMD_SET_RX
123 #define SX126X_RX_TIMEOUT_NONE 0x000000 // 23 0 Rx timeout duration: no timeout (Rx single mode)
124 #define SX126X_RX_TIMEOUT_INF 0xFFFFFF // 23 0 infinite (Rx continuous mode)
125 
126 //SX126X_CMD_SET_TX
127 #define SX126X_TX_TIMEOUT_NONE 0x000000 // 23 0 Tx timeout duration: no timeout (Tx single mode)
128 
129 //SX126X_CMD_STOP_TIMER_ON_PREAMBLE
130 #define SX126X_STOP_ON_PREAMBLE_OFF 0x00 // 7 0 stop timer on: sync word or header (default)
131 #define SX126X_STOP_ON_PREAMBLE_ON 0x01 // 7 0 preamble detection
132 
133 //SX126X_CMD_SET_REGULATOR_MODE
134 #define SX126X_REGULATOR_LDO 0x00 // 7 0 set regulator mode: LDO (default)
135 #define SX126X_REGULATOR_DC_DC 0x01 // 7 0 DC-DC
136 
137 //SX126X_CMD_CALIBRATE
138 #define SX126X_CALIBRATE_IMAGE_OFF 0b00000000 // 6 6 image calibration: disabled
139 #define SX126X_CALIBRATE_IMAGE_ON 0b01000000 // 6 6 enabled
140 #define SX126X_CALIBRATE_ADC_BULK_P_OFF 0b00000000 // 5 5 ADC bulk P calibration: disabled
141 #define SX126X_CALIBRATE_ADC_BULK_P_ON 0b00100000 // 5 5 enabled
142 #define SX126X_CALIBRATE_ADC_BULK_N_OFF 0b00000000 // 4 4 ADC bulk N calibration: disabled
143 #define SX126X_CALIBRATE_ADC_BULK_N_ON 0b00010000 // 4 4 enabled
144 #define SX126X_CALIBRATE_ADC_PULSE_OFF 0b00000000 // 3 3 ADC pulse calibration: disabled
145 #define SX126X_CALIBRATE_ADC_PULSE_ON 0b00001000 // 3 3 enabled
146 #define SX126X_CALIBRATE_PLL_OFF 0b00000000 // 2 2 PLL calibration: disabled
147 #define SX126X_CALIBRATE_PLL_ON 0b00000100 // 2 2 enabled
148 #define SX126X_CALIBRATE_RC13M_OFF 0b00000000 // 1 1 13 MHz RC osc. calibration: disabled
149 #define SX126X_CALIBRATE_RC13M_ON 0b00000010 // 1 1 enabled
150 #define SX126X_CALIBRATE_RC64K_OFF 0b00000000 // 0 0 64 kHz RC osc. calibration: disabled
151 #define SX126X_CALIBRATE_RC64K_ON 0b00000001 // 0 0 enabled
152 #define SX126X_CALIBRATE_ALL 0b01111111 // 6 0 calibrate all blocks
153 
154 //SX126X_CMD_CALIBRATE_IMAGE
155 #define SX126X_CAL_IMG_430_MHZ_1 0x6B
156 #define SX126X_CAL_IMG_430_MHZ_2 0x6F
157 #define SX126X_CAL_IMG_470_MHZ_1 0x75
158 #define SX126X_CAL_IMG_470_MHZ_2 0x81
159 #define SX126X_CAL_IMG_779_MHZ_1 0xC1
160 #define SX126X_CAL_IMG_779_MHZ_2 0xC5
161 #define SX126X_CAL_IMG_863_MHZ_1 0xD7
162 #define SX126X_CAL_IMG_863_MHZ_2 0xDB
163 #define SX126X_CAL_IMG_902_MHZ_1 0xE1
164 #define SX126X_CAL_IMG_902_MHZ_2 0xE9
165 
166 //SX126X_CMD_SET_PA_CONFIG
167 #define SX126X_PA_CONFIG_HP_MAX 0x07
168 #define SX126X_PA_CONFIG_PA_LUT 0x01
169 #define SX126X_PA_CONFIG_SX1262_8 0x00
170 
171 //SX126X_CMD_SET_RX_TX_FALLBACK_MODE
172 #define SX126X_RX_TX_FALLBACK_MODE_FS 0x40 // 7 0 after Rx/Tx go to: FS mode
173 #define SX126X_RX_TX_FALLBACK_MODE_STDBY_XOSC 0x30 // 7 0 standby with crystal oscillator
174 #define SX126X_RX_TX_FALLBACK_MODE_STDBY_RC 0x20 // 7 0 standby with RC oscillator (default)
175 
176 //SX126X_CMD_SET_DIO_IRQ_PARAMS
177 #define SX126X_IRQ_TIMEOUT 0b1000000000 // 9 9 Rx or Tx timeout
178 #define SX126X_IRQ_CAD_DETECTED 0b0100000000 // 8 8 channel activity detected
179 #define SX126X_IRQ_CAD_DONE 0b0010000000 // 7 7 channel activity detection finished
180 #define SX126X_IRQ_CRC_ERR 0b0001000000 // 6 6 wrong CRC received
181 #define SX126X_IRQ_HEADER_ERR 0b0000100000 // 5 5 LoRa header CRC error
182 #define SX126X_IRQ_HEADER_VALID 0b0000010000 // 4 4 valid LoRa header received
183 #define SX126X_IRQ_SYNC_WORD_VALID 0b0000001000 // 3 3 valid sync word detected
184 #define SX126X_IRQ_PREAMBLE_DETECTED 0b0000000100 // 2 2 preamble detected
185 #define SX126X_IRQ_RX_DONE 0b0000000010 // 1 1 packet received
186 #define SX126X_IRQ_TX_DONE 0b0000000001 // 0 0 packet transmission completed
187 #define SX126X_IRQ_ALL 0b1111111111 // 9 0 all interrupts
188 #define SX126X_IRQ_NONE 0b0000000000 // 9 0 no interrupts
189 
190 //SX126X_CMD_SET_DIO2_AS_RF_SWITCH_CTRL
191 #define SX126X_DIO2_AS_IRQ 0x00 // 7 0 DIO2 configuration: IRQ
192 #define SX126X_DIO2_AS_RF_SWITCH 0x01 // 7 0 RF switch control
193 
194 //SX126X_CMD_SET_DIO3_AS_TCXO_CTRL
195 #define SX126X_DIO3_OUTPUT_1_6 0x00 // 7 0 DIO3 voltage output for TCXO: 1.6 V
196 #define SX126X_DIO3_OUTPUT_1_7 0x01 // 7 0 1.7 V
197 #define SX126X_DIO3_OUTPUT_1_8 0x02 // 7 0 1.8 V
198 #define SX126X_DIO3_OUTPUT_2_2 0x03 // 7 0 2.2 V
199 #define SX126X_DIO3_OUTPUT_2_4 0x04 // 7 0 2.4 V
200 #define SX126X_DIO3_OUTPUT_2_7 0x05 // 7 0 2.7 V
201 #define SX126X_DIO3_OUTPUT_3_0 0x06 // 7 0 3.0 V
202 #define SX126X_DIO3_OUTPUT_3_3 0x07 // 7 0 3.3 V
203 
204 //SX126X_CMD_SET_PACKET_TYPE
205 #define SX126X_PACKET_TYPE_GFSK 0x00 // 7 0 packet type: GFSK
206 #define SX126X_PACKET_TYPE_LORA 0x01 // 7 0 LoRa
207 
208 //SX126X_CMD_SET_TX_PARAMS
209 #define SX126X_PA_RAMP_10U 0x00 // 7 0 ramp time: 10 us
210 #define SX126X_PA_RAMP_20U 0x01 // 7 0 20 us
211 #define SX126X_PA_RAMP_40U 0x02 // 7 0 40 us
212 #define SX126X_PA_RAMP_80U 0x03 // 7 0 80 us
213 #define SX126X_PA_RAMP_200U 0x04 // 7 0 200 us
214 #define SX126X_PA_RAMP_800U 0x05 // 7 0 800 us
215 #define SX126X_PA_RAMP_1700U 0x06 // 7 0 1700 us
216 #define SX126X_PA_RAMP_3400U 0x07 // 7 0 3400 us
217 
218 //SX126X_CMD_SET_MODULATION_PARAMS
219 #define SX126X_GFSK_FILTER_NONE 0x00 // 7 0 GFSK filter: none
220 #define SX126X_GFSK_FILTER_GAUSS_0_3 0x08 // 7 0 Gaussian, BT = 0.3
221 #define SX126X_GFSK_FILTER_GAUSS_0_5 0x09 // 7 0 Gaussian, BT = 0.5
222 #define SX126X_GFSK_FILTER_GAUSS_0_7 0x0A // 7 0 Gaussian, BT = 0.7
223 #define SX126X_GFSK_FILTER_GAUSS_1 0x0B // 7 0 Gaussian, BT = 1
224 #define SX126X_GFSK_RX_BW_4_8 0x1F // 7 0 GFSK Rx bandwidth: 4.8 kHz
225 #define SX126X_GFSK_RX_BW_5_8 0x17 // 7 0 5.8 kHz
226 #define SX126X_GFSK_RX_BW_7_3 0x0F // 7 0 7.3 kHz
227 #define SX126X_GFSK_RX_BW_9_7 0x1E // 7 0 9.7 kHz
228 #define SX126X_GFSK_RX_BW_11_7 0x16 // 7 0 11.7 kHz
229 #define SX126X_GFSK_RX_BW_14_6 0x0E // 7 0 14.6 kHz
230 #define SX126X_GFSK_RX_BW_19_5 0x1D // 7 0 19.5 kHz
231 #define SX126X_GFSK_RX_BW_23_4 0x15 // 7 0 23.4 kHz
232 #define SX126X_GFSK_RX_BW_29_3 0x0D // 7 0 29.3 kHz
233 #define SX126X_GFSK_RX_BW_39_0 0x1C // 7 0 39.0 kHz
234 #define SX126X_GFSK_RX_BW_46_9 0x14 // 7 0 46.9 kHz
235 #define SX126X_GFSK_RX_BW_58_6 0x0C // 7 0 58.6 kHz
236 #define SX126X_GFSK_RX_BW_78_2 0x1B // 7 0 78.2 kHz
237 #define SX126X_GFSK_RX_BW_93_8 0x13 // 7 0 93.8 kHz
238 #define SX126X_GFSK_RX_BW_117_3 0x0B // 7 0 117.3 kHz
239 #define SX126X_GFSK_RX_BW_156_2 0x1A // 7 0 156.2 kHz
240 #define SX126X_GFSK_RX_BW_187_2 0x12 // 7 0 187.2 kHz
241 #define SX126X_GFSK_RX_BW_234_3 0x0A // 7 0 234.3 kHz
242 #define SX126X_GFSK_RX_BW_312_0 0x19 // 7 0 312.0 kHz
243 #define SX126X_GFSK_RX_BW_373_6 0x11 // 7 0 373.6 kHz
244 #define SX126X_GFSK_RX_BW_467_0 0x09 // 7 0 467.0 kHz
245 #define SX126X_LORA_BW_7_8 0x00 // 7 0 LoRa bandwidth: 7.8 kHz
246 #define SX126X_LORA_BW_10_4 0x08 // 7 0 10.4 kHz
247 #define SX126X_LORA_BW_15_6 0x01 // 7 0 15.6 kHz
248 #define SX126X_LORA_BW_20_8 0x09 // 7 0 20.8 kHz
249 #define SX126X_LORA_BW_31_25 0x02 // 7 0 31.25 kHz
250 #define SX126X_LORA_BW_41_7 0x0A // 7 0 41.7 kHz
251 #define SX126X_LORA_BW_62_5 0x03 // 7 0 62.5 kHz
252 #define SX126X_LORA_BW_125_0 0x04 // 7 0 125.0 kHz
253 #define SX126X_LORA_BW_250_0 0x05 // 7 0 250.0 kHz
254 #define SX126X_LORA_BW_500_0 0x06 // 7 0 500.0 kHz
255 #define SX126X_LORA_CR_4_5 0x01 // 7 0 LoRa coding rate: 4/5
256 #define SX126X_LORA_CR_4_6 0x02 // 7 0 4/6
257 #define SX126X_LORA_CR_4_7 0x03 // 7 0 4/7
258 #define SX126X_LORA_CR_4_8 0x04 // 7 0 4/8
259 #define SX126X_LORA_LOW_DATA_RATE_OPTIMIZE_OFF 0x00 // 7 0 LoRa low data rate optimization: disabled
260 #define SX126X_LORA_LOW_DATA_RATE_OPTIMIZE_ON 0x01 // 7 0 enabled
261 
262 //SX126X_CMD_SET_PACKET_PARAMS
263 #define SX126X_GFSK_PREAMBLE_DETECT_OFF 0x00 // 7 0 GFSK minimum preamble length before reception starts: detector disabled
264 #define SX126X_GFSK_PREAMBLE_DETECT_8 0x04 // 7 0 8 bits
265 #define SX126X_GFSK_PREAMBLE_DETECT_16 0x05 // 7 0 16 bits
266 #define SX126X_GFSK_PREAMBLE_DETECT_24 0x06 // 7 0 24 bits
267 #define SX126X_GFSK_PREAMBLE_DETECT_32 0x07 // 7 0 32 bits
268 #define SX126X_GFSK_ADDRESS_FILT_OFF 0x00 // 7 0 GFSK address filtering: disabled
269 #define SX126X_GFSK_ADDRESS_FILT_NODE 0x01 // 7 0 node only
270 #define SX126X_GFSK_ADDRESS_FILT_NODE_BROADCAST 0x02 // 7 0 node and broadcast
271 #define SX126X_GFSK_PACKET_FIXED 0x00 // 7 0 GFSK packet type: fixed (payload length known in advance to both sides)
272 #define SX126X_GFSK_PACKET_VARIABLE 0x01 // 7 0 variable (payload length added to packet)
273 #define SX126X_GFSK_CRC_OFF 0x01 // 7 0 GFSK packet CRC: disabled
274 #define SX126X_GFSK_CRC_1_BYTE 0x00 // 7 0 1 byte
275 #define SX126X_GFSK_CRC_2_BYTE 0x02 // 7 0 2 byte
276 #define SX126X_GFSK_CRC_1_BYTE_INV 0x04 // 7 0 1 byte, inverted
277 #define SX126X_GFSK_CRC_2_BYTE_INV 0x06 // 7 0 2 byte, inverted
278 #define SX126X_GFSK_WHITENING_OFF 0x00 // 7 0 GFSK data whitening: disabled
279 #define SX126X_GFSK_WHITENING_ON 0x01 // 7 0 enabled
280 #define SX126X_LORA_HEADER_EXPLICIT 0x00 // 7 0 LoRa header mode: explicit
281 #define SX126X_LORA_HEADER_IMPLICIT 0x01 // 7 0 implicit
282 #define SX126X_LORA_CRC_OFF 0x00 // 7 0 LoRa CRC mode: disabled
283 #define SX126X_LORA_CRC_ON 0x01 // 7 0 enabled
284 #define SX126X_LORA_IQ_STANDARD 0x00 // 7 0 LoRa IQ setup: standard
285 #define SX126X_LORA_IQ_INVERTED 0x01 // 7 0 inverted
286 
287 //SX126X_CMD_SET_CAD_PARAMS
288 #define SX126X_CAD_ON_1_SYMB 0x00 // 7 0 number of symbols used for CAD: 1
289 #define SX126X_CAD_ON_2_SYMB 0x01 // 7 0 2
290 #define SX126X_CAD_ON_4_SYMB 0x02 // 7 0 4
291 #define SX126X_CAD_ON_8_SYMB 0x03 // 7 0 8
292 #define SX126X_CAD_ON_16_SYMB 0x04 // 7 0 16
293 #define SX126X_CAD_GOTO_STDBY 0x00 // 7 0 after CAD is done, always go to STDBY_RC mode
294 #define SX126X_CAD_GOTO_RX 0x01 // 7 0 after CAD is done, go to Rx mode if activity is detected
295 
296 //SX126X_CMD_GET_STATUS
297 #define SX126X_STATUS_MODE_STDBY_RC 0b00100000 // 6 4 current chip mode: STDBY_RC
298 #define SX126X_STATUS_MODE_STDBY_XOSC 0b00110000 // 6 4 STDBY_XOSC
299 #define SX126X_STATUS_MODE_FS 0b01000000 // 6 4 FS
300 #define SX126X_STATUS_MODE_RX 0b01010000 // 6 4 RX
301 #define SX126X_STATUS_MODE_TX 0b01100000 // 6 4 TX
302 #define SX126X_STATUS_DATA_AVAILABLE 0b00000100 // 3 1 command status: packet received and data can be retrieved
303 #define SX126X_STATUS_CMD_TIMEOUT 0b00000110 // 3 1 SPI command timed out
304 #define SX126X_STATUS_CMD_INVALID 0b00001000 // 3 1 invalid SPI command
305 #define SX126X_STATUS_CMD_FAILED 0b00001010 // 3 1 SPI command failed to execute
306 #define SX126X_STATUS_TX_DONE 0b00001100 // 3 1 packet transmission done
307 #define SX126X_STATUS_SPI_FAILED 0b11111111 // 7 0 SPI transaction failed
308 
309 //SX126X_CMD_GET_PACKET_STATUS
310 #define SX126X_GFSK_RX_STATUS_PREAMBLE_ERR 0b10000000 // 7 7 GFSK Rx status: preamble error
311 #define SX126X_GFSK_RX_STATUS_SYNC_ERR 0b01000000 // 6 6 sync word error
312 #define SX126X_GFSK_RX_STATUS_ADRS_ERR 0b00100000 // 5 5 address error
313 #define SX126X_GFSK_RX_STATUS_CRC_ERR 0b00010000 // 4 4 CRC error
314 #define SX126X_GFSK_RX_STATUS_LENGTH_ERR 0b00001000 // 3 3 length error
315 #define SX126X_GFSK_RX_STATUS_ABORT_ERR 0b00000100 // 2 2 abort error
316 #define SX126X_GFSK_RX_STATUS_PACKET_RECEIVED 0b00000010 // 2 2 packet received
317 #define SX126X_GFSK_RX_STATUS_PACKET_SENT 0b00000001 // 2 2 packet sent
318 
319 //SX126X_CMD_GET_DEVICE_ERRORS
320 #define SX126X_PA_RAMP_ERR 0b100000000 // 8 8 device errors: PA ramping failed
321 #define SX126X_PLL_LOCK_ERR 0b001000000 // 6 6 PLL failed to lock
322 #define SX126X_XOSC_START_ERR 0b000100000 // 5 5 crystal oscillator failed to start
323 #define SX126X_IMG_CALIB_ERR 0b000010000 // 4 4 image calibration failed
324 #define SX126X_ADC_CALIB_ERR 0b000001000 // 3 3 ADC calibration failed
325 #define SX126X_PLL_CALIB_ERR 0b000000100 // 2 2 PLL calibration failed
326 #define SX126X_RC13M_CALIB_ERR 0b000000010 // 1 1 RC13M calibration failed
327 #define SX126X_RC64K_CALIB_ERR 0b000000001 // 0 0 RC64K calibration failed
328 
329 
330 // SX126X SPI register variables
331 //SX126X_REG_LORA_SYNC_WORD_MSB + LSB
332 #define SX126X_SYNC_WORD_PUBLIC 0x34 // actually 0x3444 NOTE: The low nibbles in each byte (0x_4_4) are masked out since apparently, they're reserved.
333 #define SX126X_SYNC_WORD_PRIVATE 0x12 // actually 0x1424 You couldn't make this up if you tried.
334 
335 
342 class SX126x: public PhysicalLayer {
343  public:
344  // introduce PhysicalLayer overloads
345  using PhysicalLayer::transmit;
346  using PhysicalLayer::receive;
347  using PhysicalLayer::startTransmit;
348  using PhysicalLayer::readData;
349 
355  SX126x(Module* mod);
356 
357  // basic methods
358 
378  int16_t begin(float bw, uint8_t sf, uint8_t cr, uint8_t syncWord, uint16_t preambleLength, float tcxoVoltage, bool useRegulatorLDO = false);
379 
397  int16_t beginFSK(float br, float freqDev, float rxBw, uint16_t preambleLength, float tcxoVoltage, bool useRegulatorLDO = false);
398 
407  int16_t reset(bool verify = true);
408 
421  int16_t transmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
422 
433  int16_t receive(uint8_t* data, size_t len) override;
434 
442  int16_t transmitDirect(uint32_t frf = 0) override;
443 
450  int16_t receiveDirect() override;
451 
457  int16_t scanChannel();
458 
466  int16_t sleep(bool retainConfig = true);
467 
473  int16_t standby() override;
474 
482  int16_t standby(uint8_t mode);
483 
484  // interrupt methods
485 
491  void setDio1Action(void (*func)(void));
492 
496  void clearDio1Action();
497 
510  int16_t startTransmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
511 
519  int16_t startReceive(uint32_t timeout = SX126X_RX_TIMEOUT_INF);
520 
531  int16_t startReceiveDutyCycle(uint32_t rxPeriod, uint32_t sleepPeriod);
532 
544  int16_t startReceiveDutyCycleAuto(uint16_t senderPreambleLength = 0, uint16_t minSymbols = 8);
545 
555  int16_t readData(uint8_t* data, size_t len) override;
556 
557  // configuration methods
558 
566  int16_t setBandwidth(float bw);
567 
575  int16_t setSpreadingFactor(uint8_t sf);
576 
584  int16_t setCodingRate(uint8_t cr);
585 
595  int16_t setSyncWord(uint8_t syncWord, uint8_t controlBits = 0x44);
596 
604  int16_t setCurrentLimit(float currentLimit);
605 
611  float getCurrentLimit();
612 
620  int16_t setPreambleLength(uint16_t preambleLength);
621 
629  int16_t setFrequencyDeviation(float freqDev) override;
630 
638  int16_t setBitRate(float br);
639 
647  int16_t setRxBandwidth(float rxBw);
648 
658  int16_t setDataShaping(uint8_t sh) override;
659 
669  int16_t setSyncWord(uint8_t* syncWord, uint8_t len);
670 
680  int16_t setSyncBits(uint8_t *syncWord, uint8_t bitsLen);
681 
689  int16_t setNodeAddress(uint8_t nodeAddr);
690 
698  int16_t setBroadcastAddress(uint8_t broadAddr);
699 
705  int16_t disableAddressFiltering();
706 
720  int16_t setCRC(uint8_t len, uint16_t initial = 0x1D0F, uint16_t polynomial = 0x1021, bool inverted = true);
721 
731  int16_t setWhitening(bool enabled, uint16_t initial = 0x0100);
732 
743  int16_t setTCXO(float voltage, uint32_t delay = 5000);
744 
750  int16_t setDio2AsRfSwitch(bool enable = true);
751 
757  float getDataRate() const;
758 
764  float getRSSI();
765 
771  float getSNR();
772 
780  size_t getPacketLength(bool update = true) override;
781 
789  int16_t fixedPacketLengthMode(uint8_t len = SX126X_MAX_PACKET_LENGTH);
790 
798  int16_t variablePacketLengthMode(uint8_t maxLen = SX126X_MAX_PACKET_LENGTH);
799 
807  uint32_t getTimeOnAir(size_t len);
808 
814  int16_t implicitHeader(size_t len);
815 
823  int16_t explicitHeader();
824 
830  int16_t setRegulatorLDO();
831 
837  int16_t setRegulatorDCDC();
838 
846  int16_t setEncoding(uint8_t encoding) override;
847 
856  void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn);
857 
866  int16_t forceLDRO(bool enable);
867 
874  int16_t autoLDRO();
875 
881  uint8_t random();
882 
883 #ifndef RADIOLIB_GODMODE
884  protected:
885 #endif
886  // SX126x SPI command implementations
887  int16_t setTx(uint32_t timeout = 0);
888  int16_t setRx(uint32_t timeout);
889  int16_t setCad();
890  int16_t setPaConfig(uint8_t paDutyCycle, uint8_t deviceSel, uint8_t hpMax = SX126X_PA_CONFIG_HP_MAX, uint8_t paLut = SX126X_PA_CONFIG_PA_LUT);
891  int16_t writeRegister(uint16_t addr, uint8_t* data, uint8_t numBytes);
892  int16_t readRegister(uint16_t addr, uint8_t* data, uint8_t numBytes);
893  int16_t writeBuffer(uint8_t* data, uint8_t numBytes, uint8_t offset = 0x00);
894  int16_t readBuffer(uint8_t* data, uint8_t numBytes);
895  int16_t setDioIrqParams(uint16_t irqMask, uint16_t dio1Mask, uint16_t dio2Mask = SX126X_IRQ_NONE, uint16_t dio3Mask = SX126X_IRQ_NONE);
896  uint16_t getIrqStatus();
897  int16_t clearIrqStatus(uint16_t clearIrqParams = SX126X_IRQ_ALL);
898  int16_t setRfFrequency(uint32_t frf);
899  int16_t calibrateImage(uint8_t* data);
900  uint8_t getPacketType();
901  int16_t setTxParams(uint8_t power, uint8_t rampTime = SX126X_PA_RAMP_200U);
902  int16_t setModulationParams(uint8_t sf, uint8_t bw, uint8_t cr, uint8_t ldro);
903  int16_t setModulationParamsFSK(uint32_t br, uint8_t pulseShape, uint8_t rxBw, uint32_t freqDev);
904  int16_t setPacketParams(uint16_t preambleLength, uint8_t crcType, uint8_t payloadLength, uint8_t headerType, uint8_t invertIQ = SX126X_LORA_IQ_STANDARD);
905  int16_t setPacketParamsFSK(uint16_t preambleLength, uint8_t crcType, uint8_t syncWordLength, uint8_t addrComp, uint8_t whitening, uint8_t packetType = SX126X_GFSK_PACKET_VARIABLE, uint8_t payloadLength = 0xFF, uint8_t preambleDetectorLength = SX126X_GFSK_PREAMBLE_DETECT_16);
906  int16_t setBufferBaseAddress(uint8_t txBaseAddress = 0x00, uint8_t rxBaseAddress = 0x00);
907  int16_t setRegulatorMode(uint8_t mode);
908  uint8_t getStatus();
909  uint32_t getPacketStatus();
910  uint16_t getDeviceErrors();
911  int16_t clearDeviceErrors();
912 
913  int16_t startReceiveCommon();
914  int16_t setFrequencyRaw(float freq);
915  int16_t setPacketMode(uint8_t mode, uint8_t len);
916  int16_t setHeaderType(uint8_t headerType, size_t len = 0xFF);
917 
918  // fixes to errata
919  int16_t fixSensitivity();
920  int16_t fixPaClamping();
921  int16_t fixImplicitTimeout();
922  int16_t fixInvertedIQ(uint8_t iqConfig);
923 
924 #ifndef RADIOLIB_GODMODE
925  private:
926 #endif
927  Module* _mod;
928 
929  uint8_t _bw = 0, _sf = 0, _cr = 0, _ldro = 0, _crcType = 0, _headerType = 0;
930  uint16_t _preambleLength = 0;
931  float _bwKhz = 0;
932  bool _ldroAuto = true;
933 
934  uint32_t _br = 0, _freqDev = 0;
935  uint8_t _rxBw = 0, _pulseShape = 0, _crcTypeFSK = 0, _syncWordLength = 0, _addrComp = 0, _whitening = 0, _packetType = 0;
936  uint16_t _preambleLengthFSK = 0;
937  float _rxBwKhz = 0;
938 
939  float _dataRate = 0;
940 
941  uint32_t _tcxoDelay = 0;
942 
943  size_t _implicitLen = 0;
944 
945  int16_t config(uint8_t modem);
946 
947  // common low-level SPI interface
948  int16_t SPIwriteCommand(uint8_t cmd, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
949  int16_t SPIwriteCommand(uint8_t* cmd, uint8_t cmdLen, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
950  int16_t SPIreadCommand(uint8_t cmd, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
951  int16_t SPIreadCommand(uint8_t* cmd, uint8_t cmdLen, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
952  int16_t SPItransfer(uint8_t* cmd, uint8_t cmdLen, bool write, uint8_t* dataOut, uint8_t* dataIn, uint8_t numBytes, bool waitForBusy, uint32_t timeout = 5000);
953 };
954 
955 #endif
956 
957 #endif
SX126x::setRfSwitchPins
void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)
Some modules contain external RF switch controlled by two pins. This function gives RadioLib control ...
Definition: SX126x.cpp:1151
-
SX126x::setBroadcastAddress
int16_t setBroadcastAddress(uint8_t broadAddr)
Sets broadcast address. Calling this method will also enable address filtering for node and broadcast...
Definition: SX126x.cpp:930
-
SX126x::setSyncWord
int16_t setSyncWord(uint8_t syncWord, uint8_t controlBits=0x44)
Sets LoRa sync word.
Definition: SX126x.cpp:682
-
SX126x::getCurrentLimit
float getCurrentLimit()
Reads current protection limit.
Definition: SX126x.cpp:706
+
1 #if !defined(_RADIOLIB_SX126X_H)
2 #define _RADIOLIB_SX126X_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SX126X)
7 
8 #include "../../Module.h"
9 
10 #include "../../protocols/PhysicalLayer/PhysicalLayer.h"
11 
12 // SX126X physical layer properties
13 #define SX126X_FREQUENCY_STEP_SIZE 0.9536743164
14 #define SX126X_MAX_PACKET_LENGTH 255
15 #define SX126X_CRYSTAL_FREQ 32.0
16 #define SX126X_DIV_EXPONENT 25
17 
18 // SX126X SPI commands
19 // operational modes commands
20 #define SX126X_CMD_NOP 0x00
21 #define SX126X_CMD_SET_SLEEP 0x84
22 #define SX126X_CMD_SET_STANDBY 0x80
23 #define SX126X_CMD_SET_FS 0xC1
24 #define SX126X_CMD_SET_TX 0x83
25 #define SX126X_CMD_SET_RX 0x82
26 #define SX126X_CMD_STOP_TIMER_ON_PREAMBLE 0x9F
27 #define SX126X_CMD_SET_RX_DUTY_CYCLE 0x94
28 #define SX126X_CMD_SET_CAD 0xC5
29 #define SX126X_CMD_SET_TX_CONTINUOUS_WAVE 0xD1
30 #define SX126X_CMD_SET_TX_INFINITE_PREAMBLE 0xD2
31 #define SX126X_CMD_SET_REGULATOR_MODE 0x96
32 #define SX126X_CMD_CALIBRATE 0x89
33 #define SX126X_CMD_CALIBRATE_IMAGE 0x98
34 #define SX126X_CMD_SET_PA_CONFIG 0x95
35 #define SX126X_CMD_SET_RX_TX_FALLBACK_MODE 0x93
36 
37 // register and buffer access commands
38 #define SX126X_CMD_WRITE_REGISTER 0x0D
39 #define SX126X_CMD_READ_REGISTER 0x1D
40 #define SX126X_CMD_WRITE_BUFFER 0x0E
41 #define SX126X_CMD_READ_BUFFER 0x1E
42 
43 // DIO and IRQ control
44 #define SX126X_CMD_SET_DIO_IRQ_PARAMS 0x08
45 #define SX126X_CMD_GET_IRQ_STATUS 0x12
46 #define SX126X_CMD_CLEAR_IRQ_STATUS 0x02
47 #define SX126X_CMD_SET_DIO2_AS_RF_SWITCH_CTRL 0x9D
48 #define SX126X_CMD_SET_DIO3_AS_TCXO_CTRL 0x97
49 
50 // RF, modulation and packet commands
51 #define SX126X_CMD_SET_RF_FREQUENCY 0x86
52 #define SX126X_CMD_SET_PACKET_TYPE 0x8A
53 #define SX126X_CMD_GET_PACKET_TYPE 0x11
54 #define SX126X_CMD_SET_TX_PARAMS 0x8E
55 #define SX126X_CMD_SET_MODULATION_PARAMS 0x8B
56 #define SX126X_CMD_SET_PACKET_PARAMS 0x8C
57 #define SX126X_CMD_SET_CAD_PARAMS 0x88
58 #define SX126X_CMD_SET_BUFFER_BASE_ADDRESS 0x8F
59 #define SX126X_CMD_SET_LORA_SYMB_NUM_TIMEOUT 0x0A
60 
61 // status commands
62 #define SX126X_CMD_GET_STATUS 0xC0
63 #define SX126X_CMD_GET_RSSI_INST 0x15
64 #define SX126X_CMD_GET_RX_BUFFER_STATUS 0x13
65 #define SX126X_CMD_GET_PACKET_STATUS 0x14
66 #define SX126X_CMD_GET_DEVICE_ERRORS 0x17
67 #define SX126X_CMD_CLEAR_DEVICE_ERRORS 0x07
68 #define SX126X_CMD_GET_STATS 0x10
69 #define SX126X_CMD_RESET_STATS 0x00
70 
71 
72 // SX126X register map
73 #define SX126X_REG_WHITENING_INITIAL_MSB 0x06B8
74 #define SX126X_REG_WHITENING_INITIAL_LSB 0x06B9
75 #define SX126X_REG_CRC_INITIAL_MSB 0x06BC
76 #define SX126X_REG_CRC_INITIAL_LSB 0x06BD
77 #define SX126X_REG_CRC_POLYNOMIAL_MSB 0x06BE
78 #define SX126X_REG_CRC_POLYNOMIAL_LSB 0x06BF
79 #define SX126X_REG_SYNC_WORD_0 0x06C0
80 #define SX126X_REG_SYNC_WORD_1 0x06C1
81 #define SX126X_REG_SYNC_WORD_2 0x06C2
82 #define SX126X_REG_SYNC_WORD_3 0x06C3
83 #define SX126X_REG_SYNC_WORD_4 0x06C4
84 #define SX126X_REG_SYNC_WORD_5 0x06C5
85 #define SX126X_REG_SYNC_WORD_6 0x06C6
86 #define SX126X_REG_SYNC_WORD_7 0x06C7
87 #define SX126X_REG_NODE_ADDRESS 0x06CD
88 #define SX126X_REG_BROADCAST_ADDRESS 0x06CE
89 #define SX126X_REG_LORA_SYNC_WORD_MSB 0x0740
90 #define SX126X_REG_LORA_SYNC_WORD_LSB 0x0741
91 #define SX126X_REG_RANDOM_NUMBER_0 0x0819
92 #define SX126X_REG_RANDOM_NUMBER_1 0x081A
93 #define SX126X_REG_RANDOM_NUMBER_2 0x081B
94 #define SX126X_REG_RANDOM_NUMBER_3 0x081C
95 #define SX126X_REG_RX_GAIN 0x08AC
96 #define SX126X_REG_OCP_CONFIGURATION 0x08E7
97 #define SX126X_REG_XTA_TRIM 0x0911
98 #define SX126X_REG_XTB_TRIM 0x0912
99 
100 // undocumented registers
101 #define SX126X_REG_SENSITIVITY_CONFIG 0x0889 // SX1268 datasheet v1.1, section 15.1
102 #define SX126X_REG_TX_CLAMP_CONFIG 0x08D8 // SX1268 datasheet v1.1, section 15.2
103 #define SX126X_REG_RTC_STOP 0x0920 // SX1268 datasheet v1.1, section 15.3
104 #define SX126X_REG_RTC_EVENT 0x0944 // SX1268 datasheet v1.1, section 15.3
105 #define SX126X_REG_IQ_CONFIG 0x0736 // SX1268 datasheet v1.1, section 15.4
106 #define SX126X_REG_RX_GAIN_RETENTION_0 0x029F // SX1268 datasheet v1.1, section 9.6
107 #define SX126X_REG_RX_GAIN_RETENTION_1 0x02A0 // SX1268 datasheet v1.1, section 9.6
108 #define SX126X_REG_RX_GAIN_RETENTION_2 0x02A1 // SX1268 datasheet v1.1, section 9.6
109 
110 
111 // SX126X SPI command variables
112 //SX126X_CMD_SET_SLEEP MSB LSB DESCRIPTION
113 #define SX126X_SLEEP_START_COLD 0b00000000 // 2 2 sleep mode: cold start, configuration is lost (default)
114 #define SX126X_SLEEP_START_WARM 0b00000100 // 2 2 warm start, configuration is retained
115 #define SX126X_SLEEP_RTC_OFF 0b00000000 // 0 0 wake on RTC timeout: disabled
116 #define SX126X_SLEEP_RTC_ON 0b00000001 // 0 0 enabled
117 
118 //SX126X_CMD_SET_STANDBY
119 #define SX126X_STANDBY_RC 0x00 // 7 0 standby mode: 13 MHz RC oscillator
120 #define SX126X_STANDBY_XOSC 0x01 // 7 0 32 MHz crystal oscillator
121 
122 //SX126X_CMD_SET_RX
123 #define SX126X_RX_TIMEOUT_NONE 0x000000 // 23 0 Rx timeout duration: no timeout (Rx single mode)
124 #define SX126X_RX_TIMEOUT_INF 0xFFFFFF // 23 0 infinite (Rx continuous mode)
125 
126 //SX126X_CMD_SET_TX
127 #define SX126X_TX_TIMEOUT_NONE 0x000000 // 23 0 Tx timeout duration: no timeout (Tx single mode)
128 
129 //SX126X_CMD_STOP_TIMER_ON_PREAMBLE
130 #define SX126X_STOP_ON_PREAMBLE_OFF 0x00 // 7 0 stop timer on: sync word or header (default)
131 #define SX126X_STOP_ON_PREAMBLE_ON 0x01 // 7 0 preamble detection
132 
133 //SX126X_CMD_SET_REGULATOR_MODE
134 #define SX126X_REGULATOR_LDO 0x00 // 7 0 set regulator mode: LDO (default)
135 #define SX126X_REGULATOR_DC_DC 0x01 // 7 0 DC-DC
136 
137 //SX126X_CMD_CALIBRATE
138 #define SX126X_CALIBRATE_IMAGE_OFF 0b00000000 // 6 6 image calibration: disabled
139 #define SX126X_CALIBRATE_IMAGE_ON 0b01000000 // 6 6 enabled
140 #define SX126X_CALIBRATE_ADC_BULK_P_OFF 0b00000000 // 5 5 ADC bulk P calibration: disabled
141 #define SX126X_CALIBRATE_ADC_BULK_P_ON 0b00100000 // 5 5 enabled
142 #define SX126X_CALIBRATE_ADC_BULK_N_OFF 0b00000000 // 4 4 ADC bulk N calibration: disabled
143 #define SX126X_CALIBRATE_ADC_BULK_N_ON 0b00010000 // 4 4 enabled
144 #define SX126X_CALIBRATE_ADC_PULSE_OFF 0b00000000 // 3 3 ADC pulse calibration: disabled
145 #define SX126X_CALIBRATE_ADC_PULSE_ON 0b00001000 // 3 3 enabled
146 #define SX126X_CALIBRATE_PLL_OFF 0b00000000 // 2 2 PLL calibration: disabled
147 #define SX126X_CALIBRATE_PLL_ON 0b00000100 // 2 2 enabled
148 #define SX126X_CALIBRATE_RC13M_OFF 0b00000000 // 1 1 13 MHz RC osc. calibration: disabled
149 #define SX126X_CALIBRATE_RC13M_ON 0b00000010 // 1 1 enabled
150 #define SX126X_CALIBRATE_RC64K_OFF 0b00000000 // 0 0 64 kHz RC osc. calibration: disabled
151 #define SX126X_CALIBRATE_RC64K_ON 0b00000001 // 0 0 enabled
152 #define SX126X_CALIBRATE_ALL 0b01111111 // 6 0 calibrate all blocks
153 
154 //SX126X_CMD_CALIBRATE_IMAGE
155 #define SX126X_CAL_IMG_430_MHZ_1 0x6B
156 #define SX126X_CAL_IMG_430_MHZ_2 0x6F
157 #define SX126X_CAL_IMG_470_MHZ_1 0x75
158 #define SX126X_CAL_IMG_470_MHZ_2 0x81
159 #define SX126X_CAL_IMG_779_MHZ_1 0xC1
160 #define SX126X_CAL_IMG_779_MHZ_2 0xC5
161 #define SX126X_CAL_IMG_863_MHZ_1 0xD7
162 #define SX126X_CAL_IMG_863_MHZ_2 0xDB
163 #define SX126X_CAL_IMG_902_MHZ_1 0xE1
164 #define SX126X_CAL_IMG_902_MHZ_2 0xE9
165 
166 //SX126X_CMD_SET_PA_CONFIG
167 #define SX126X_PA_CONFIG_HP_MAX 0x07
168 #define SX126X_PA_CONFIG_PA_LUT 0x01
169 #define SX126X_PA_CONFIG_SX1262_8 0x00
170 
171 //SX126X_CMD_SET_RX_TX_FALLBACK_MODE
172 #define SX126X_RX_TX_FALLBACK_MODE_FS 0x40 // 7 0 after Rx/Tx go to: FS mode
173 #define SX126X_RX_TX_FALLBACK_MODE_STDBY_XOSC 0x30 // 7 0 standby with crystal oscillator
174 #define SX126X_RX_TX_FALLBACK_MODE_STDBY_RC 0x20 // 7 0 standby with RC oscillator (default)
175 
176 //SX126X_CMD_SET_DIO_IRQ_PARAMS
177 #define SX126X_IRQ_TIMEOUT 0b1000000000 // 9 9 Rx or Tx timeout
178 #define SX126X_IRQ_CAD_DETECTED 0b0100000000 // 8 8 channel activity detected
179 #define SX126X_IRQ_CAD_DONE 0b0010000000 // 7 7 channel activity detection finished
180 #define SX126X_IRQ_CRC_ERR 0b0001000000 // 6 6 wrong CRC received
181 #define SX126X_IRQ_HEADER_ERR 0b0000100000 // 5 5 LoRa header CRC error
182 #define SX126X_IRQ_HEADER_VALID 0b0000010000 // 4 4 valid LoRa header received
183 #define SX126X_IRQ_SYNC_WORD_VALID 0b0000001000 // 3 3 valid sync word detected
184 #define SX126X_IRQ_PREAMBLE_DETECTED 0b0000000100 // 2 2 preamble detected
185 #define SX126X_IRQ_RX_DONE 0b0000000010 // 1 1 packet received
186 #define SX126X_IRQ_TX_DONE 0b0000000001 // 0 0 packet transmission completed
187 #define SX126X_IRQ_ALL 0b1111111111 // 9 0 all interrupts
188 #define SX126X_IRQ_NONE 0b0000000000 // 9 0 no interrupts
189 
190 //SX126X_CMD_SET_DIO2_AS_RF_SWITCH_CTRL
191 #define SX126X_DIO2_AS_IRQ 0x00 // 7 0 DIO2 configuration: IRQ
192 #define SX126X_DIO2_AS_RF_SWITCH 0x01 // 7 0 RF switch control
193 
194 //SX126X_CMD_SET_DIO3_AS_TCXO_CTRL
195 #define SX126X_DIO3_OUTPUT_1_6 0x00 // 7 0 DIO3 voltage output for TCXO: 1.6 V
196 #define SX126X_DIO3_OUTPUT_1_7 0x01 // 7 0 1.7 V
197 #define SX126X_DIO3_OUTPUT_1_8 0x02 // 7 0 1.8 V
198 #define SX126X_DIO3_OUTPUT_2_2 0x03 // 7 0 2.2 V
199 #define SX126X_DIO3_OUTPUT_2_4 0x04 // 7 0 2.4 V
200 #define SX126X_DIO3_OUTPUT_2_7 0x05 // 7 0 2.7 V
201 #define SX126X_DIO3_OUTPUT_3_0 0x06 // 7 0 3.0 V
202 #define SX126X_DIO3_OUTPUT_3_3 0x07 // 7 0 3.3 V
203 
204 //SX126X_CMD_SET_PACKET_TYPE
205 #define SX126X_PACKET_TYPE_GFSK 0x00 // 7 0 packet type: GFSK
206 #define SX126X_PACKET_TYPE_LORA 0x01 // 7 0 LoRa
207 
208 //SX126X_CMD_SET_TX_PARAMS
209 #define SX126X_PA_RAMP_10U 0x00 // 7 0 ramp time: 10 us
210 #define SX126X_PA_RAMP_20U 0x01 // 7 0 20 us
211 #define SX126X_PA_RAMP_40U 0x02 // 7 0 40 us
212 #define SX126X_PA_RAMP_80U 0x03 // 7 0 80 us
213 #define SX126X_PA_RAMP_200U 0x04 // 7 0 200 us
214 #define SX126X_PA_RAMP_800U 0x05 // 7 0 800 us
215 #define SX126X_PA_RAMP_1700U 0x06 // 7 0 1700 us
216 #define SX126X_PA_RAMP_3400U 0x07 // 7 0 3400 us
217 
218 //SX126X_CMD_SET_MODULATION_PARAMS
219 #define SX126X_GFSK_FILTER_NONE 0x00 // 7 0 GFSK filter: none
220 #define SX126X_GFSK_FILTER_GAUSS_0_3 0x08 // 7 0 Gaussian, BT = 0.3
221 #define SX126X_GFSK_FILTER_GAUSS_0_5 0x09 // 7 0 Gaussian, BT = 0.5
222 #define SX126X_GFSK_FILTER_GAUSS_0_7 0x0A // 7 0 Gaussian, BT = 0.7
223 #define SX126X_GFSK_FILTER_GAUSS_1 0x0B // 7 0 Gaussian, BT = 1
224 #define SX126X_GFSK_RX_BW_4_8 0x1F // 7 0 GFSK Rx bandwidth: 4.8 kHz
225 #define SX126X_GFSK_RX_BW_5_8 0x17 // 7 0 5.8 kHz
226 #define SX126X_GFSK_RX_BW_7_3 0x0F // 7 0 7.3 kHz
227 #define SX126X_GFSK_RX_BW_9_7 0x1E // 7 0 9.7 kHz
228 #define SX126X_GFSK_RX_BW_11_7 0x16 // 7 0 11.7 kHz
229 #define SX126X_GFSK_RX_BW_14_6 0x0E // 7 0 14.6 kHz
230 #define SX126X_GFSK_RX_BW_19_5 0x1D // 7 0 19.5 kHz
231 #define SX126X_GFSK_RX_BW_23_4 0x15 // 7 0 23.4 kHz
232 #define SX126X_GFSK_RX_BW_29_3 0x0D // 7 0 29.3 kHz
233 #define SX126X_GFSK_RX_BW_39_0 0x1C // 7 0 39.0 kHz
234 #define SX126X_GFSK_RX_BW_46_9 0x14 // 7 0 46.9 kHz
235 #define SX126X_GFSK_RX_BW_58_6 0x0C // 7 0 58.6 kHz
236 #define SX126X_GFSK_RX_BW_78_2 0x1B // 7 0 78.2 kHz
237 #define SX126X_GFSK_RX_BW_93_8 0x13 // 7 0 93.8 kHz
238 #define SX126X_GFSK_RX_BW_117_3 0x0B // 7 0 117.3 kHz
239 #define SX126X_GFSK_RX_BW_156_2 0x1A // 7 0 156.2 kHz
240 #define SX126X_GFSK_RX_BW_187_2 0x12 // 7 0 187.2 kHz
241 #define SX126X_GFSK_RX_BW_234_3 0x0A // 7 0 234.3 kHz
242 #define SX126X_GFSK_RX_BW_312_0 0x19 // 7 0 312.0 kHz
243 #define SX126X_GFSK_RX_BW_373_6 0x11 // 7 0 373.6 kHz
244 #define SX126X_GFSK_RX_BW_467_0 0x09 // 7 0 467.0 kHz
245 #define SX126X_LORA_BW_7_8 0x00 // 7 0 LoRa bandwidth: 7.8 kHz
246 #define SX126X_LORA_BW_10_4 0x08 // 7 0 10.4 kHz
247 #define SX126X_LORA_BW_15_6 0x01 // 7 0 15.6 kHz
248 #define SX126X_LORA_BW_20_8 0x09 // 7 0 20.8 kHz
249 #define SX126X_LORA_BW_31_25 0x02 // 7 0 31.25 kHz
250 #define SX126X_LORA_BW_41_7 0x0A // 7 0 41.7 kHz
251 #define SX126X_LORA_BW_62_5 0x03 // 7 0 62.5 kHz
252 #define SX126X_LORA_BW_125_0 0x04 // 7 0 125.0 kHz
253 #define SX126X_LORA_BW_250_0 0x05 // 7 0 250.0 kHz
254 #define SX126X_LORA_BW_500_0 0x06 // 7 0 500.0 kHz
255 #define SX126X_LORA_CR_4_5 0x01 // 7 0 LoRa coding rate: 4/5
256 #define SX126X_LORA_CR_4_6 0x02 // 7 0 4/6
257 #define SX126X_LORA_CR_4_7 0x03 // 7 0 4/7
258 #define SX126X_LORA_CR_4_8 0x04 // 7 0 4/8
259 #define SX126X_LORA_LOW_DATA_RATE_OPTIMIZE_OFF 0x00 // 7 0 LoRa low data rate optimization: disabled
260 #define SX126X_LORA_LOW_DATA_RATE_OPTIMIZE_ON 0x01 // 7 0 enabled
261 
262 //SX126X_CMD_SET_PACKET_PARAMS
263 #define SX126X_GFSK_PREAMBLE_DETECT_OFF 0x00 // 7 0 GFSK minimum preamble length before reception starts: detector disabled
264 #define SX126X_GFSK_PREAMBLE_DETECT_8 0x04 // 7 0 8 bits
265 #define SX126X_GFSK_PREAMBLE_DETECT_16 0x05 // 7 0 16 bits
266 #define SX126X_GFSK_PREAMBLE_DETECT_24 0x06 // 7 0 24 bits
267 #define SX126X_GFSK_PREAMBLE_DETECT_32 0x07 // 7 0 32 bits
268 #define SX126X_GFSK_ADDRESS_FILT_OFF 0x00 // 7 0 GFSK address filtering: disabled
269 #define SX126X_GFSK_ADDRESS_FILT_NODE 0x01 // 7 0 node only
270 #define SX126X_GFSK_ADDRESS_FILT_NODE_BROADCAST 0x02 // 7 0 node and broadcast
271 #define SX126X_GFSK_PACKET_FIXED 0x00 // 7 0 GFSK packet type: fixed (payload length known in advance to both sides)
272 #define SX126X_GFSK_PACKET_VARIABLE 0x01 // 7 0 variable (payload length added to packet)
273 #define SX126X_GFSK_CRC_OFF 0x01 // 7 0 GFSK packet CRC: disabled
274 #define SX126X_GFSK_CRC_1_BYTE 0x00 // 7 0 1 byte
275 #define SX126X_GFSK_CRC_2_BYTE 0x02 // 7 0 2 byte
276 #define SX126X_GFSK_CRC_1_BYTE_INV 0x04 // 7 0 1 byte, inverted
277 #define SX126X_GFSK_CRC_2_BYTE_INV 0x06 // 7 0 2 byte, inverted
278 #define SX126X_GFSK_WHITENING_OFF 0x00 // 7 0 GFSK data whitening: disabled
279 #define SX126X_GFSK_WHITENING_ON 0x01 // 7 0 enabled
280 #define SX126X_LORA_HEADER_EXPLICIT 0x00 // 7 0 LoRa header mode: explicit
281 #define SX126X_LORA_HEADER_IMPLICIT 0x01 // 7 0 implicit
282 #define SX126X_LORA_CRC_OFF 0x00 // 7 0 LoRa CRC mode: disabled
283 #define SX126X_LORA_CRC_ON 0x01 // 7 0 enabled
284 #define SX126X_LORA_IQ_STANDARD 0x00 // 7 0 LoRa IQ setup: standard
285 #define SX126X_LORA_IQ_INVERTED 0x01 // 7 0 inverted
286 
287 //SX126X_CMD_SET_CAD_PARAMS
288 #define SX126X_CAD_ON_1_SYMB 0x00 // 7 0 number of symbols used for CAD: 1
289 #define SX126X_CAD_ON_2_SYMB 0x01 // 7 0 2
290 #define SX126X_CAD_ON_4_SYMB 0x02 // 7 0 4
291 #define SX126X_CAD_ON_8_SYMB 0x03 // 7 0 8
292 #define SX126X_CAD_ON_16_SYMB 0x04 // 7 0 16
293 #define SX126X_CAD_GOTO_STDBY 0x00 // 7 0 after CAD is done, always go to STDBY_RC mode
294 #define SX126X_CAD_GOTO_RX 0x01 // 7 0 after CAD is done, go to Rx mode if activity is detected
295 
296 //SX126X_CMD_GET_STATUS
297 #define SX126X_STATUS_MODE_STDBY_RC 0b00100000 // 6 4 current chip mode: STDBY_RC
298 #define SX126X_STATUS_MODE_STDBY_XOSC 0b00110000 // 6 4 STDBY_XOSC
299 #define SX126X_STATUS_MODE_FS 0b01000000 // 6 4 FS
300 #define SX126X_STATUS_MODE_RX 0b01010000 // 6 4 RX
301 #define SX126X_STATUS_MODE_TX 0b01100000 // 6 4 TX
302 #define SX126X_STATUS_DATA_AVAILABLE 0b00000100 // 3 1 command status: packet received and data can be retrieved
303 #define SX126X_STATUS_CMD_TIMEOUT 0b00000110 // 3 1 SPI command timed out
304 #define SX126X_STATUS_CMD_INVALID 0b00001000 // 3 1 invalid SPI command
305 #define SX126X_STATUS_CMD_FAILED 0b00001010 // 3 1 SPI command failed to execute
306 #define SX126X_STATUS_TX_DONE 0b00001100 // 3 1 packet transmission done
307 #define SX126X_STATUS_SPI_FAILED 0b11111111 // 7 0 SPI transaction failed
308 
309 //SX126X_CMD_GET_PACKET_STATUS
310 #define SX126X_GFSK_RX_STATUS_PREAMBLE_ERR 0b10000000 // 7 7 GFSK Rx status: preamble error
311 #define SX126X_GFSK_RX_STATUS_SYNC_ERR 0b01000000 // 6 6 sync word error
312 #define SX126X_GFSK_RX_STATUS_ADRS_ERR 0b00100000 // 5 5 address error
313 #define SX126X_GFSK_RX_STATUS_CRC_ERR 0b00010000 // 4 4 CRC error
314 #define SX126X_GFSK_RX_STATUS_LENGTH_ERR 0b00001000 // 3 3 length error
315 #define SX126X_GFSK_RX_STATUS_ABORT_ERR 0b00000100 // 2 2 abort error
316 #define SX126X_GFSK_RX_STATUS_PACKET_RECEIVED 0b00000010 // 2 2 packet received
317 #define SX126X_GFSK_RX_STATUS_PACKET_SENT 0b00000001 // 2 2 packet sent
318 
319 //SX126X_CMD_GET_DEVICE_ERRORS
320 #define SX126X_PA_RAMP_ERR 0b100000000 // 8 8 device errors: PA ramping failed
321 #define SX126X_PLL_LOCK_ERR 0b001000000 // 6 6 PLL failed to lock
322 #define SX126X_XOSC_START_ERR 0b000100000 // 5 5 crystal oscillator failed to start
323 #define SX126X_IMG_CALIB_ERR 0b000010000 // 4 4 image calibration failed
324 #define SX126X_ADC_CALIB_ERR 0b000001000 // 3 3 ADC calibration failed
325 #define SX126X_PLL_CALIB_ERR 0b000000100 // 2 2 PLL calibration failed
326 #define SX126X_RC13M_CALIB_ERR 0b000000010 // 1 1 RC13M calibration failed
327 #define SX126X_RC64K_CALIB_ERR 0b000000001 // 0 0 RC64K calibration failed
328 
329 
330 // SX126X SPI register variables
331 //SX126X_REG_LORA_SYNC_WORD_MSB + LSB
332 #define SX126X_SYNC_WORD_PUBLIC 0x34 // actually 0x3444 NOTE: The low nibbles in each byte (0x_4_4) are masked out since apparently, they're reserved.
333 #define SX126X_SYNC_WORD_PRIVATE 0x12 // actually 0x1424 You couldn't make this up if you tried.
334 
335 
342 class SX126x: public PhysicalLayer {
343  public:
344  // introduce PhysicalLayer overloads
345  using PhysicalLayer::transmit;
346  using PhysicalLayer::receive;
347  using PhysicalLayer::startTransmit;
348  using PhysicalLayer::readData;
349 
355  SX126x(Module* mod);
356 
357  // basic methods
358 
378  int16_t begin(float bw, uint8_t sf, uint8_t cr, uint8_t syncWord, uint16_t preambleLength, float tcxoVoltage, bool useRegulatorLDO = false);
379 
397  int16_t beginFSK(float br, float freqDev, float rxBw, uint16_t preambleLength, float tcxoVoltage, bool useRegulatorLDO = false);
398 
407  int16_t reset(bool verify = true);
408 
421  int16_t transmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
422 
433  int16_t receive(uint8_t* data, size_t len) override;
434 
442  int16_t transmitDirect(uint32_t frf = 0) override;
443 
450  int16_t receiveDirect() override;
451 
457  int16_t scanChannel();
458 
466  int16_t sleep(bool retainConfig = true);
467 
473  int16_t standby() override;
474 
482  int16_t standby(uint8_t mode);
483 
484  // interrupt methods
485 
491  void setDio1Action(void (*func)(void));
492 
496  void clearDio1Action();
497 
510  int16_t startTransmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
511 
519  int16_t startReceive(uint32_t timeout = SX126X_RX_TIMEOUT_INF);
520 
531  int16_t startReceiveDutyCycle(uint32_t rxPeriod, uint32_t sleepPeriod);
532 
544  int16_t startReceiveDutyCycleAuto(uint16_t senderPreambleLength = 0, uint16_t minSymbols = 8);
545 
555  int16_t readData(uint8_t* data, size_t len) override;
556 
557  // configuration methods
558 
566  int16_t setBandwidth(float bw);
567 
575  int16_t setSpreadingFactor(uint8_t sf);
576 
584  int16_t setCodingRate(uint8_t cr);
585 
595  int16_t setSyncWord(uint8_t syncWord, uint8_t controlBits = 0x44);
596 
604  int16_t setCurrentLimit(float currentLimit);
605 
611  float getCurrentLimit();
612 
620  int16_t setPreambleLength(uint16_t preambleLength);
621 
629  int16_t setFrequencyDeviation(float freqDev) override;
630 
638  int16_t setBitRate(float br);
639 
647  int16_t setRxBandwidth(float rxBw);
648 
658  int16_t setDataShaping(uint8_t sh) override;
659 
669  int16_t setSyncWord(uint8_t* syncWord, uint8_t len);
670 
680  int16_t setSyncBits(uint8_t *syncWord, uint8_t bitsLen);
681 
689  int16_t setNodeAddress(uint8_t nodeAddr);
690 
698  int16_t setBroadcastAddress(uint8_t broadAddr);
699 
705  int16_t disableAddressFiltering();
706 
720  int16_t setCRC(uint8_t len, uint16_t initial = 0x1D0F, uint16_t polynomial = 0x1021, bool inverted = true);
721 
731  int16_t setWhitening(bool enabled, uint16_t initial = 0x0100);
732 
743  int16_t setTCXO(float voltage, uint32_t delay = 5000);
744 
750  int16_t setDio2AsRfSwitch(bool enable = true);
751 
757  float getDataRate() const;
758 
764  float getRSSI();
765 
771  float getSNR();
772 
780  size_t getPacketLength(bool update = true) override;
781 
789  int16_t fixedPacketLengthMode(uint8_t len = SX126X_MAX_PACKET_LENGTH);
790 
798  int16_t variablePacketLengthMode(uint8_t maxLen = SX126X_MAX_PACKET_LENGTH);
799 
807  uint32_t getTimeOnAir(size_t len);
808 
814  int16_t implicitHeader(size_t len);
815 
823  int16_t explicitHeader();
824 
830  int16_t setRegulatorLDO();
831 
837  int16_t setRegulatorDCDC();
838 
846  int16_t setEncoding(uint8_t encoding) override;
847 
856  void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn);
857 
866  int16_t forceLDRO(bool enable);
867 
874  int16_t autoLDRO();
875 
881  uint8_t random();
882 
883 #ifndef RADIOLIB_GODMODE
884  protected:
885 #endif
886  // SX126x SPI command implementations
887  int16_t setTx(uint32_t timeout = 0);
888  int16_t setRx(uint32_t timeout);
889  int16_t setCad();
890  int16_t setPaConfig(uint8_t paDutyCycle, uint8_t deviceSel, uint8_t hpMax = SX126X_PA_CONFIG_HP_MAX, uint8_t paLut = SX126X_PA_CONFIG_PA_LUT);
891  int16_t writeRegister(uint16_t addr, uint8_t* data, uint8_t numBytes);
892  int16_t readRegister(uint16_t addr, uint8_t* data, uint8_t numBytes);
893  int16_t writeBuffer(uint8_t* data, uint8_t numBytes, uint8_t offset = 0x00);
894  int16_t readBuffer(uint8_t* data, uint8_t numBytes);
895  int16_t setDioIrqParams(uint16_t irqMask, uint16_t dio1Mask, uint16_t dio2Mask = SX126X_IRQ_NONE, uint16_t dio3Mask = SX126X_IRQ_NONE);
896  uint16_t getIrqStatus();
897  int16_t clearIrqStatus(uint16_t clearIrqParams = SX126X_IRQ_ALL);
898  int16_t setRfFrequency(uint32_t frf);
899  int16_t calibrateImage(uint8_t* data);
900  uint8_t getPacketType();
901  int16_t setTxParams(uint8_t power, uint8_t rampTime = SX126X_PA_RAMP_200U);
902  int16_t setModulationParams(uint8_t sf, uint8_t bw, uint8_t cr, uint8_t ldro);
903  int16_t setModulationParamsFSK(uint32_t br, uint8_t pulseShape, uint8_t rxBw, uint32_t freqDev);
904  int16_t setPacketParams(uint16_t preambleLength, uint8_t crcType, uint8_t payloadLength, uint8_t headerType, uint8_t invertIQ = SX126X_LORA_IQ_STANDARD);
905  int16_t setPacketParamsFSK(uint16_t preambleLength, uint8_t crcType, uint8_t syncWordLength, uint8_t addrComp, uint8_t whitening, uint8_t packetType = SX126X_GFSK_PACKET_VARIABLE, uint8_t payloadLength = 0xFF, uint8_t preambleDetectorLength = SX126X_GFSK_PREAMBLE_DETECT_16);
906  int16_t setBufferBaseAddress(uint8_t txBaseAddress = 0x00, uint8_t rxBaseAddress = 0x00);
907  int16_t setRegulatorMode(uint8_t mode);
908  uint8_t getStatus();
909  uint32_t getPacketStatus();
910  uint16_t getDeviceErrors();
911  int16_t clearDeviceErrors();
912 
913  int16_t startReceiveCommon();
914  int16_t setFrequencyRaw(float freq);
915  int16_t setPacketMode(uint8_t mode, uint8_t len);
916  int16_t setHeaderType(uint8_t headerType, size_t len = 0xFF);
917 
918  // fixes to errata
919  int16_t fixSensitivity();
920  int16_t fixPaClamping();
921  int16_t fixImplicitTimeout();
922  int16_t fixInvertedIQ(uint8_t iqConfig);
923 
924 #ifndef RADIOLIB_GODMODE
925  private:
926 #endif
927  Module* _mod;
928 
929  uint8_t _bw = 0, _sf = 0, _cr = 0, _ldro = 0, _crcType = 0, _headerType = 0;
930  uint16_t _preambleLength = 0;
931  float _bwKhz = 0;
932  bool _ldroAuto = true;
933 
934  uint32_t _br = 0, _freqDev = 0;
935  uint8_t _rxBw = 0, _pulseShape = 0, _crcTypeFSK = 0, _syncWordLength = 0, _addrComp = 0, _whitening = 0, _packetType = 0;
936  uint16_t _preambleLengthFSK = 0;
937  float _rxBwKhz = 0;
938 
939  float _dataRate = 0;
940 
941  uint32_t _tcxoDelay = 0;
942 
943  size_t _implicitLen = 0;
944 
945  int16_t config(uint8_t modem);
946 
947  // common low-level SPI interface
948  int16_t SPIwriteCommand(uint8_t cmd, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
949  int16_t SPIwriteCommand(uint8_t* cmd, uint8_t cmdLen, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
950  int16_t SPIreadCommand(uint8_t cmd, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
951  int16_t SPIreadCommand(uint8_t* cmd, uint8_t cmdLen, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
952  int16_t SPItransfer(uint8_t* cmd, uint8_t cmdLen, bool write, uint8_t* dataOut, uint8_t* dataIn, uint8_t numBytes, bool waitForBusy, uint32_t timeout = 5000);
953 };
954 
955 #endif
956 
957 #endif
SX126x::setRfSwitchPins
void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)
Some modules contain external RF switch controlled by two pins. This function gives RadioLib control ...
Definition: SX126x.cpp:1153
+
SX126x::setBroadcastAddress
int16_t setBroadcastAddress(uint8_t broadAddr)
Sets broadcast address. Calling this method will also enable address filtering for node and broadcast...
Definition: SX126x.cpp:932
+
SX126x::setSyncWord
int16_t setSyncWord(uint8_t syncWord, uint8_t controlBits=0x44)
Sets LoRa sync word.
Definition: SX126x.cpp:684
+
SX126x::getCurrentLimit
float getCurrentLimit()
Reads current protection limit.
Definition: SX126x.cpp:708
PhysicalLayer::startTransmit
int16_t startTransmit(String &str, uint8_t addr=0)
Interrupt-driven Arduino String transmit method. Unlike the standard transmit method, this one is non-blocking. Interrupt pin will be activated when transmission finishes.
Definition: PhysicalLayer.cpp:49
-
SX126x::startReceiveDutyCycle
int16_t startReceiveDutyCycle(uint32_t rxPeriod, uint32_t sleepPeriod)
Interrupt-driven receive method where the device mostly sleeps and periodically wakes to listen...
Definition: SX126x.cpp:486
+
SX126x::startReceiveDutyCycle
int16_t startReceiveDutyCycle(uint32_t rxPeriod, uint32_t sleepPeriod)
Interrupt-driven receive method where the device mostly sleeps and periodically wakes to listen...
Definition: SX126x.cpp:488
SX126x::SX126x
SX126x(Module *mod)
Default constructor.
Definition: SX126x.cpp:4
-
SX126x::setSyncBits
int16_t setSyncBits(uint8_t *syncWord, uint8_t bitsLen)
Sets FSK sync word in the form of array of up to 8 bytes.
Definition: SX126x.cpp:886
-
SX126x::random
uint8_t random()
Get one truly random byte from RSSI noise.
Definition: SX126x.cpp:1176
-
SX126x::readData
int16_t readData(uint8_t *data, size_t len) override
Reads data received after calling startReceive method.
Definition: SX126x.cpp:574
-
SX126x::setDio2AsRfSwitch
int16_t setDio2AsRfSwitch(bool enable=true)
Set DIO2 to function as RF switch (default in Semtech example designs).
Definition: SX126x.cpp:1245
-
SX126x::setDataShaping
int16_t setDataShaping(uint8_t sh) override
Sets time-bandwidth product of Gaussian filter applied for shaping. Allowed values are RADIOLIB_SHAPI...
Definition: SX126x.cpp:833
-
SX126x::explicitHeader
int16_t explicitHeader()
Set explicit header mode for future reception/transmission.
Definition: SX126x.cpp:1135
-
SX126x::setBitRate
int16_t setBitRate(float br)
Sets FSK bit rate. Allowed values range from 0.6 to 300.0 kbps.
Definition: SX126x.cpp:749
-
SX126x::startReceiveDutyCycleAuto
int16_t startReceiveDutyCycleAuto(uint16_t senderPreambleLength=0, uint16_t minSymbols=8)
Calls startReceiveDutyCycle with rxPeriod and sleepPeriod set so the unit shouldn't miss any messages...
Definition: SX126x.cpp:513
-
SX126x::standby
int16_t standby() override
Sets the module to standby mode (overload for PhysicalLayer compatibility, uses 13 MHz RC oscillator)...
Definition: SX126x.cpp:392
-
SX126x::scanChannel
int16_t scanChannel()
Performs scan for LoRa transmission in the current channel. Detects both preamble and payload...
Definition: SX126x.cpp:331
-
SX126x::variablePacketLengthMode
int16_t variablePacketLengthMode(uint8_t maxLen=SX126X_MAX_PACKET_LENGTH)
Set modem in variable packet length mode. Available in FSK mode only.
Definition: SX126x.cpp:1092
-
SX126x::getDataRate
float getDataRate() const
Gets effective data rate for the last transmitted packet. The value is calculated only for payload by...
Definition: SX126x.cpp:1054
-
SX126x::clearDio1Action
void clearDio1Action()
Clears interrupt service routine to call when DIO1 activates.
Definition: SX126x.cpp:408
-
SX126x::startTransmit
int16_t startTransmit(uint8_t *data, size_t len, uint8_t addr=0) override
Interrupt-driven binary transmit method. Overloads for string-based transmissions are implemented in ...
Definition: SX126x.cpp:412
-
SX126x::reset
int16_t reset(bool verify=true)
Reset method. Will reset the chip to the default state using RST pin.
Definition: SX126x.cpp:158
-
SX126x::beginFSK
int16_t beginFSK(float br, float freqDev, float rxBw, uint16_t preambleLength, float tcxoVoltage, bool useRegulatorLDO=false)
Initialization method for FSK modem.
Definition: SX126x.cpp:78
+
SX126x::setSyncBits
int16_t setSyncBits(uint8_t *syncWord, uint8_t bitsLen)
Sets FSK sync word in the form of array of up to 8 bytes.
Definition: SX126x.cpp:888
+
SX126x::random
uint8_t random()
Get one truly random byte from RSSI noise.
Definition: SX126x.cpp:1178
+
SX126x::readData
int16_t readData(uint8_t *data, size_t len) override
Reads data received after calling startReceive method.
Definition: SX126x.cpp:576
+
SX126x::setDio2AsRfSwitch
int16_t setDio2AsRfSwitch(bool enable=true)
Set DIO2 to function as RF switch (default in Semtech example designs).
Definition: SX126x.cpp:1247
+
SX126x::setDataShaping
int16_t setDataShaping(uint8_t sh) override
Sets time-bandwidth product of Gaussian filter applied for shaping. Allowed values are RADIOLIB_SHAPI...
Definition: SX126x.cpp:835
+
SX126x::explicitHeader
int16_t explicitHeader()
Set explicit header mode for future reception/transmission.
Definition: SX126x.cpp:1137
+
SX126x::setBitRate
int16_t setBitRate(float br)
Sets FSK bit rate. Allowed values range from 0.6 to 300.0 kbps.
Definition: SX126x.cpp:751
+
SX126x::startReceiveDutyCycleAuto
int16_t startReceiveDutyCycleAuto(uint16_t senderPreambleLength=0, uint16_t minSymbols=8)
Calls startReceiveDutyCycle with rxPeriod and sleepPeriod set so the unit shouldn't miss any messages...
Definition: SX126x.cpp:515
+
SX126x::standby
int16_t standby() override
Sets the module to standby mode (overload for PhysicalLayer compatibility, uses 13 MHz RC oscillator)...
Definition: SX126x.cpp:394
+
SX126x::scanChannel
int16_t scanChannel()
Performs scan for LoRa transmission in the current channel. Detects both preamble and payload...
Definition: SX126x.cpp:333
+
SX126x::variablePacketLengthMode
int16_t variablePacketLengthMode(uint8_t maxLen=SX126X_MAX_PACKET_LENGTH)
Set modem in variable packet length mode. Available in FSK mode only.
Definition: SX126x.cpp:1094
+
SX126x::getDataRate
float getDataRate() const
Gets effective data rate for the last transmitted packet. The value is calculated only for payload by...
Definition: SX126x.cpp:1056
+
SX126x::clearDio1Action
void clearDio1Action()
Clears interrupt service routine to call when DIO1 activates.
Definition: SX126x.cpp:410
+
SX126x::startTransmit
int16_t startTransmit(uint8_t *data, size_t len, uint8_t addr=0) override
Interrupt-driven binary transmit method. Overloads for string-based transmissions are implemented in ...
Definition: SX126x.cpp:414
+
SX126x::reset
int16_t reset(bool verify=true)
Reset method. Will reset the chip to the default state using RST pin.
Definition: SX126x.cpp:160
+
SX126x::beginFSK
int16_t beginFSK(float br, float freqDev, float rxBw, uint16_t preambleLength, float tcxoVoltage, bool useRegulatorLDO=false)
Initialization method for FSK modem.
Definition: SX126x.cpp:79
SX126x::begin
int16_t begin(float bw, uint8_t sf, uint8_t cr, uint8_t syncWord, uint16_t preambleLength, float tcxoVoltage, bool useRegulatorLDO=false)
Initialization method for LoRa modem.
Definition: SX126x.cpp:8
SX126x
Base class for SX126x series. All derived classes for SX126x (e.g. SX1262 or SX1268) inherit from thi...
Definition: SX126x.h:342
-
SX126x::setWhitening
int16_t setWhitening(bool enabled, uint16_t initial=0x0100)
Sets FSK whitening parameters.
Definition: SX126x.cpp:1017
-
SX126x::startReceive
int16_t startReceive(uint32_t timeout=SX126X_RX_TIMEOUT_INF)
Interrupt-driven receive method. DIO1 will be activated when full packet is received.
Definition: SX126x.cpp:473
-
SX126x::transmit
int16_t transmit(uint8_t *data, size_t len, uint8_t addr=0) override
Blocking binary transmit method. Overloads for string-based transmissions are implemented in Physical...
Definition: SX126x.cpp:191
-
SX126x::getRSSI
float getRSSI()
Gets RSSI (Recorded Signal Strength Indicator) of the last received packet.
Definition: SX126x.cpp:1058
+
SX126x::setWhitening
int16_t setWhitening(bool enabled, uint16_t initial=0x0100)
Sets FSK whitening parameters.
Definition: SX126x.cpp:1019
+
SX126x::startReceive
int16_t startReceive(uint32_t timeout=SX126X_RX_TIMEOUT_INF)
Interrupt-driven receive method. DIO1 will be activated when full packet is received.
Definition: SX126x.cpp:475
+
SX126x::transmit
int16_t transmit(uint8_t *data, size_t len, uint8_t addr=0) override
Blocking binary transmit method. Overloads for string-based transmissions are implemented in Physical...
Definition: SX126x.cpp:193
+
SX126x::getRSSI
float getRSSI()
Gets RSSI (Recorded Signal Strength Indicator) of the last received packet.
Definition: SX126x.cpp:1060
Module
Implements all common low-level SPI/UART/I2C methods to control the wireless module. Every module class contains one private instance of this class.
Definition: Module.h:17
PhysicalLayer::transmit
int16_t transmit(__FlashStringHelper *fstr, uint8_t addr=0)
Arduino Flash String transmit method.
Definition: PhysicalLayer.cpp:8
-
SX126x::getSNR
float getSNR()
Gets SNR (Signal to Noise Ratio) of the last received packet. Only available for LoRa modem...
Definition: SX126x.cpp:1065
-
SX126x::setFrequencyDeviation
int16_t setFrequencyDeviation(float freqDev) override
Sets FSK frequency deviation. Allowed values range from 0.0 to 200.0 kHz.
Definition: SX126x.cpp:728
-
SX126x::setCurrentLimit
int16_t setCurrentLimit(float currentLimit)
Sets current protection limit. Can be set in 0.25 mA steps.
Definition: SX126x.cpp:693
+
SX126x::getSNR
float getSNR()
Gets SNR (Signal to Noise Ratio) of the last received packet. Only available for LoRa modem...
Definition: SX126x.cpp:1067
+
SX126x::setFrequencyDeviation
int16_t setFrequencyDeviation(float freqDev) override
Sets FSK frequency deviation. Allowed values range from 0.0 to 200.0 kHz.
Definition: SX126x.cpp:730
+
SX126x::setCurrentLimit
int16_t setCurrentLimit(float currentLimit)
Sets current protection limit. Can be set in 0.25 mA steps.
Definition: SX126x.cpp:695
PhysicalLayer::receive
int16_t receive(String &str, size_t len=0)
Arduino String receive method.
Definition: PhysicalLayer.cpp:98
-
SX126x::setRxBandwidth
int16_t setRxBandwidth(float rxBw)
Sets FSK receiver bandwidth. Allowed values are 4.8, 5.8, 7.3, 9.7, 11.7, 14.6, 19.5, 23.4, 29.3, 39.0, 46.9, 58.6, 78.2, 93.8, 117.3, 156.2, 187.2, 234.3, 312.0, 373.6 and 467.0 kHz.
Definition: SX126x.cpp:770
-
SX126x::setDio1Action
void setDio1Action(void(*func)(void))
Sets interrupt service routine to call when DIO1 activates.
Definition: SX126x.cpp:404
-
SX126x::autoLDRO
int16_t autoLDRO()
Re-enables automatic LDRO configuration. Only available in LoRa mode. After calling this method...
Definition: SX126x.cpp:1167
-
SX126x::setCodingRate
int16_t setCodingRate(uint8_t cr)
Sets LoRa coding rate denominator. Allowed values range from 5 to 8.
Definition: SX126x.cpp:669
-
SX126x::setEncoding
int16_t setEncoding(uint8_t encoding) override
Sets transmission encoding. Available in FSK mode only. Serves only as alias for PhysicalLayer compat...
Definition: SX126x.cpp:1147
-
SX126x::transmitDirect
int16_t transmitDirect(uint32_t frf=0) override
Starts direct mode transmission.
Definition: SX126x.cpp:307
+
SX126x::setRxBandwidth
int16_t setRxBandwidth(float rxBw)
Sets FSK receiver bandwidth. Allowed values are 4.8, 5.8, 7.3, 9.7, 11.7, 14.6, 19.5, 23.4, 29.3, 39.0, 46.9, 58.6, 78.2, 93.8, 117.3, 156.2, 187.2, 234.3, 312.0, 373.6 and 467.0 kHz.
Definition: SX126x.cpp:772
+
SX126x::setDio1Action
void setDio1Action(void(*func)(void))
Sets interrupt service routine to call when DIO1 activates.
Definition: SX126x.cpp:406
+
SX126x::autoLDRO
int16_t autoLDRO()
Re-enables automatic LDRO configuration. Only available in LoRa mode. After calling this method...
Definition: SX126x.cpp:1169
+
SX126x::setCodingRate
int16_t setCodingRate(uint8_t cr)
Sets LoRa coding rate denominator. Allowed values range from 5 to 8.
Definition: SX126x.cpp:671
+
SX126x::setEncoding
int16_t setEncoding(uint8_t encoding) override
Sets transmission encoding. Available in FSK mode only. Serves only as alias for PhysicalLayer compat...
Definition: SX126x.cpp:1149
+
SX126x::transmitDirect
int16_t transmitDirect(uint32_t frf=0) override
Starts direct mode transmission.
Definition: SX126x.cpp:309
PhysicalLayer
Provides common interface for protocols that run on LoRa/FSK modules, such as RTTY or LoRaWAN...
Definition: PhysicalLayer.h:13
-
SX126x::getTimeOnAir
uint32_t getTimeOnAir(size_t len)
Get expected time-on-air for a given size of payload.
Definition: SX126x.cpp:1096
-
SX126x::setBandwidth
int16_t setBandwidth(float bw)
Sets LoRa bandwidth. Allowed values are 7.8, 10.4, 15.6, 20.8, 31.25, 41.7, 62.5, 125...
Definition: SX126x.cpp:605
-
SX126x::fixedPacketLengthMode
int16_t fixedPacketLengthMode(uint8_t len=SX126X_MAX_PACKET_LENGTH)
Set modem in fixed packet length mode. Available in FSK mode only.
Definition: SX126x.cpp:1088
-
SX126x::setRegulatorDCDC
int16_t setRegulatorDCDC()
Set regulator mode to DC-DC.
Definition: SX126x.cpp:1143
-
SX126x::setNodeAddress
int16_t setNodeAddress(uint8_t nodeAddr)
Sets node address. Calling this method will also enable address filtering for node address only...
Definition: SX126x.cpp:913
-
SX126x::receiveDirect
int16_t receiveDirect() override
Starts direct mode reception. Only implemented for PhysicalLayer compatibility, as SX126x series does...
Definition: SX126x.cpp:323
-
SX126x::setRegulatorLDO
int16_t setRegulatorLDO()
Set regulator mode to LDO.
Definition: SX126x.cpp:1139
-
SX126x::setCRC
int16_t setCRC(uint8_t len, uint16_t initial=0x1D0F, uint16_t polynomial=0x1021, bool inverted=true)
Sets CRC configuration.
Definition: SX126x.cpp:958
-
SX126x::setPreambleLength
int16_t setPreambleLength(uint16_t preambleLength)
Sets preamble length for LoRa or FSK modem. Allowed values range from 1 to 65535. ...
Definition: SX126x.cpp:715
-
SX126x::implicitHeader
int16_t implicitHeader(size_t len)
Set implicit header mode for future reception/transmission.
Definition: SX126x.cpp:1131
-
SX126x::sleep
int16_t sleep(bool retainConfig=true)
Sets the module to sleep mode.
Definition: SX126x.cpp:376
-
SX126x::disableAddressFiltering
int16_t disableAddressFiltering()
Disables address filtering. Calling this method will also erase previously set addresses.
Definition: SX126x.cpp:947
-
SX126x::setSpreadingFactor
int16_t setSpreadingFactor(uint8_t sf)
Sets LoRa spreading factor. Allowed values range from 5 to 12.
Definition: SX126x.cpp:656
-
SX126x::setTCXO
int16_t setTCXO(float voltage, uint32_t delay=5000)
Sets TCXO (Temperature Compensated Crystal Oscillator) configuration.
Definition: SX126x.cpp:1197
-
SX126x::receive
int16_t receive(uint8_t *data, size_t len) override
Blocking binary receive method. Overloads for string-based transmissions are implemented in PhysicalL...
Definition: SX126x.cpp:250
-
SX126x::forceLDRO
int16_t forceLDRO(bool enable)
Forces LoRa low data rate optimization. Only available in LoRa mode. After calling this method...
Definition: SX126x.cpp:1155
+
SX126x::getTimeOnAir
uint32_t getTimeOnAir(size_t len)
Get expected time-on-air for a given size of payload.
Definition: SX126x.cpp:1098
+
SX126x::setBandwidth
int16_t setBandwidth(float bw)
Sets LoRa bandwidth. Allowed values are 7.8, 10.4, 15.6, 20.8, 31.25, 41.7, 62.5, 125...
Definition: SX126x.cpp:607
+
SX126x::fixedPacketLengthMode
int16_t fixedPacketLengthMode(uint8_t len=SX126X_MAX_PACKET_LENGTH)
Set modem in fixed packet length mode. Available in FSK mode only.
Definition: SX126x.cpp:1090
+
SX126x::setRegulatorDCDC
int16_t setRegulatorDCDC()
Set regulator mode to DC-DC.
Definition: SX126x.cpp:1145
+
SX126x::setNodeAddress
int16_t setNodeAddress(uint8_t nodeAddr)
Sets node address. Calling this method will also enable address filtering for node address only...
Definition: SX126x.cpp:915
+
SX126x::receiveDirect
int16_t receiveDirect() override
Starts direct mode reception. Only implemented for PhysicalLayer compatibility, as SX126x series does...
Definition: SX126x.cpp:325
+
SX126x::setRegulatorLDO
int16_t setRegulatorLDO()
Set regulator mode to LDO.
Definition: SX126x.cpp:1141
+
SX126x::setCRC
int16_t setCRC(uint8_t len, uint16_t initial=0x1D0F, uint16_t polynomial=0x1021, bool inverted=true)
Sets CRC configuration.
Definition: SX126x.cpp:960
+
SX126x::setPreambleLength
int16_t setPreambleLength(uint16_t preambleLength)
Sets preamble length for LoRa or FSK modem. Allowed values range from 1 to 65535. ...
Definition: SX126x.cpp:717
+
SX126x::implicitHeader
int16_t implicitHeader(size_t len)
Set implicit header mode for future reception/transmission.
Definition: SX126x.cpp:1133
+
SX126x::sleep
int16_t sleep(bool retainConfig=true)
Sets the module to sleep mode.
Definition: SX126x.cpp:378
+
SX126x::disableAddressFiltering
int16_t disableAddressFiltering()
Disables address filtering. Calling this method will also erase previously set addresses.
Definition: SX126x.cpp:949
+
SX126x::setSpreadingFactor
int16_t setSpreadingFactor(uint8_t sf)
Sets LoRa spreading factor. Allowed values range from 5 to 12.
Definition: SX126x.cpp:658
+
SX126x::setTCXO
int16_t setTCXO(float voltage, uint32_t delay=5000)
Sets TCXO (Temperature Compensated Crystal Oscillator) configuration.
Definition: SX126x.cpp:1199
+
SX126x::receive
int16_t receive(uint8_t *data, size_t len) override
Blocking binary receive method. Overloads for string-based transmissions are implemented in PhysicalL...
Definition: SX126x.cpp:252
+
SX126x::forceLDRO
int16_t forceLDRO(bool enable)
Forces LoRa low data rate optimization. Only available in LoRa mode. After calling this method...
Definition: SX126x.cpp:1157
PhysicalLayer::readData
int16_t readData(String &str, size_t len=0)
Reads data that was received after calling startReceive method.
Definition: PhysicalLayer.cpp:57
-
SX126x::getPacketLength
size_t getPacketLength(bool update=true) override
Query modem for the packet length of received payload.
Definition: SX126x.cpp:1081
+
SX126x::getPacketLength
size_t getPacketLength(bool update=true) override
Query modem for the packet length of received payload.
Definition: SX126x.cpp:1083
diff --git a/_s_x127x_8h_source.html b/_s_x127x_8h_source.html index 9971f627..df4b9857 100644 --- a/_s_x127x_8h_source.html +++ b/_s_x127x_8h_source.html @@ -84,56 +84,56 @@ $(document).ready(function(){initNavTree('_s_x127x_8h_source.html','');});
SX127x.h
-
1 #if !defined(_RADIOLIB_SX127X_H)
2 #define _RADIOLIB_SX127X_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SX127X)
7 
8 #include "../../Module.h"
9 
10 #include "../../protocols/PhysicalLayer/PhysicalLayer.h"
11 
12 // SX127x physical layer properties
13 #define SX127X_FREQUENCY_STEP_SIZE 61.03515625
14 #define SX127X_MAX_PACKET_LENGTH 255
15 #define SX127X_MAX_PACKET_LENGTH_FSK 64
16 #define SX127X_CRYSTAL_FREQ 32.0
17 #define SX127X_DIV_EXPONENT 19
18 
19 // SX127x series common LoRa registers
20 #define SX127X_REG_FIFO 0x00
21 #define SX127X_REG_OP_MODE 0x01
22 #define SX127X_REG_FRF_MSB 0x06
23 #define SX127X_REG_FRF_MID 0x07
24 #define SX127X_REG_FRF_LSB 0x08
25 #define SX127X_REG_PA_CONFIG 0x09
26 #define SX127X_REG_PA_RAMP 0x0A
27 #define SX127X_REG_OCP 0x0B
28 #define SX127X_REG_LNA 0x0C
29 #define SX127X_REG_FIFO_ADDR_PTR 0x0D
30 #define SX127X_REG_FIFO_TX_BASE_ADDR 0x0E
31 #define SX127X_REG_FIFO_RX_BASE_ADDR 0x0F
32 #define SX127X_REG_FIFO_RX_CURRENT_ADDR 0x10
33 #define SX127X_REG_IRQ_FLAGS_MASK 0x11
34 #define SX127X_REG_IRQ_FLAGS 0x12
35 #define SX127X_REG_RX_NB_BYTES 0x13
36 #define SX127X_REG_RX_HEADER_CNT_VALUE_MSB 0x14
37 #define SX127X_REG_RX_HEADER_CNT_VALUE_LSB 0x15
38 #define SX127X_REG_RX_PACKET_CNT_VALUE_MSB 0x16
39 #define SX127X_REG_RX_PACKET_CNT_VALUE_LSB 0x17
40 #define SX127X_REG_MODEM_STAT 0x18
41 #define SX127X_REG_PKT_SNR_VALUE 0x19
42 #define SX127X_REG_PKT_RSSI_VALUE 0x1A
43 #define SX127X_REG_RSSI_VALUE 0x1B
44 #define SX127X_REG_HOP_CHANNEL 0x1C
45 #define SX127X_REG_MODEM_CONFIG_1 0x1D
46 #define SX127X_REG_MODEM_CONFIG_2 0x1E
47 #define SX127X_REG_SYMB_TIMEOUT_LSB 0x1F
48 #define SX127X_REG_PREAMBLE_MSB 0x20
49 #define SX127X_REG_PREAMBLE_LSB 0x21
50 #define SX127X_REG_PAYLOAD_LENGTH 0x22
51 #define SX127X_REG_MAX_PAYLOAD_LENGTH 0x23
52 #define SX127X_REG_HOP_PERIOD 0x24
53 #define SX127X_REG_FIFO_RX_BYTE_ADDR 0x25
54 #define SX127X_REG_FEI_MSB 0x28
55 #define SX127X_REG_FEI_MID 0x29
56 #define SX127X_REG_FEI_LSB 0x2A
57 #define SX127X_REG_RSSI_WIDEBAND 0x2C
58 #define SX127X_REG_DETECT_OPTIMIZE 0x31
59 #define SX127X_REG_INVERT_IQ 0x33
60 #define SX127X_REG_DETECTION_THRESHOLD 0x37
61 #define SX127X_REG_SYNC_WORD 0x39
62 #define SX127X_REG_DIO_MAPPING_1 0x40
63 #define SX127X_REG_DIO_MAPPING_2 0x41
64 #define SX127X_REG_VERSION 0x42
65 
66 // SX127x common LoRa modem settings
67 // SX127X_REG_OP_MODE MSB LSB DESCRIPTION
68 #define SX127X_FSK_OOK 0b00000000 // 7 7 FSK/OOK mode
69 #define SX127X_LORA 0b10000000 // 7 7 LoRa mode
70 #define SX127X_ACCESS_SHARED_REG_OFF 0b00000000 // 6 6 access LoRa registers (0x0D:0x3F) in LoRa mode
71 #define SX127X_ACCESS_SHARED_REG_ON 0b01000000 // 6 6 access FSK registers (0x0D:0x3F) in LoRa mode
72 #define SX127X_SLEEP 0b00000000 // 2 0 sleep
73 #define SX127X_STANDBY 0b00000001 // 2 0 standby
74 #define SX127X_FSTX 0b00000010 // 2 0 frequency synthesis TX
75 #define SX127X_TX 0b00000011 // 2 0 transmit
76 #define SX127X_FSRX 0b00000100 // 2 0 frequency synthesis RX
77 #define SX127X_RXCONTINUOUS 0b00000101 // 2 0 receive continuous
78 #define SX127X_RXSINGLE 0b00000110 // 2 0 receive single
79 #define SX127X_CAD 0b00000111 // 2 0 channel activity detection
80 
81 // SX127X_REG_PA_CONFIG
82 #define SX127X_PA_SELECT_RFO 0b00000000 // 7 7 RFO pin output, power limited to +14 dBm
83 #define SX127X_PA_SELECT_BOOST 0b10000000 // 7 7 PA_BOOST pin output, power limited to +20 dBm
84 #define SX127X_OUTPUT_POWER 0b00001111 // 3 0 output power: P_out = 2 + OUTPUT_POWER [dBm] for PA_SELECT_BOOST
85  // P_out = -1 + OUTPUT_POWER [dBm] for PA_SELECT_RFO
86 
87 // SX127X_REG_OCP
88 #define SX127X_OCP_OFF 0b00000000 // 5 5 PA overload current protection disabled
89 #define SX127X_OCP_ON 0b00100000 // 5 5 PA overload current protection enabled
90 #define SX127X_OCP_TRIM 0b00001011 // 4 0 OCP current: I_max(OCP_TRIM = 0b1011) = 100 mA
91 
92 // SX127X_REG_LNA
93 #define SX127X_LNA_GAIN_1 0b00100000 // 7 5 LNA gain setting: max gain
94 #define SX127X_LNA_GAIN_2 0b01000000 // 7 5 .
95 #define SX127X_LNA_GAIN_3 0b01100000 // 7 5 .
96 #define SX127X_LNA_GAIN_4 0b10000000 // 7 5 .
97 #define SX127X_LNA_GAIN_5 0b10100000 // 7 5 .
98 #define SX127X_LNA_GAIN_6 0b11000000 // 7 5 min gain
99 #define SX127X_LNA_BOOST_OFF 0b00000000 // 1 0 default LNA current
100 #define SX127X_LNA_BOOST_ON 0b00000011 // 1 0 150% LNA current
101 
102 // SX127X_REG_MODEM_CONFIG_2
103 #define SX127X_SF_6 0b01100000 // 7 4 spreading factor: 64 chips/bit
104 #define SX127X_SF_7 0b01110000 // 7 4 128 chips/bit
105 #define SX127X_SF_8 0b10000000 // 7 4 256 chips/bit
106 #define SX127X_SF_9 0b10010000 // 7 4 512 chips/bit
107 #define SX127X_SF_10 0b10100000 // 7 4 1024 chips/bit
108 #define SX127X_SF_11 0b10110000 // 7 4 2048 chips/bit
109 #define SX127X_SF_12 0b11000000 // 7 4 4096 chips/bit
110 #define SX127X_TX_MODE_SINGLE 0b00000000 // 3 3 single TX
111 #define SX127X_TX_MODE_CONT 0b00001000 // 3 3 continuous TX
112 #define SX127X_RX_TIMEOUT_MSB 0b00000000 // 1 0
113 
114 // SX127X_REG_SYMB_TIMEOUT_LSB
115 #define SX127X_RX_TIMEOUT_LSB 0b01100100 // 7 0 10 bit RX operation timeout
116 
117 // SX127X_REG_PREAMBLE_MSB + REG_PREAMBLE_LSB
118 #define SX127X_PREAMBLE_LENGTH_MSB 0b00000000 // 7 0 2 byte preamble length setting: l_P = PREAMBLE_LENGTH + 4.25
119 #define SX127X_PREAMBLE_LENGTH_LSB 0b00001000 // 7 0 where l_p = preamble length
120 
121 // SX127X_REG_DETECT_OPTIMIZE
122 #define SX127X_DETECT_OPTIMIZE_SF_6 0b00000101 // 2 0 SF6 detection optimization
123 #define SX127X_DETECT_OPTIMIZE_SF_7_12 0b00000011 // 2 0 SF7 to SF12 detection optimization
124 
125 // SX127X_REG_DETECTION_THRESHOLD
126 #define SX127X_DETECTION_THRESHOLD_SF_6 0b00001100 // 7 0 SF6 detection threshold
127 #define SX127X_DETECTION_THRESHOLD_SF_7_12 0b00001010 // 7 0 SF7 to SF12 detection threshold
128 
129 // SX127X_REG_PA_DAC
130 #define SX127X_PA_BOOST_OFF 0b00000100 // 2 0 PA_BOOST disabled
131 #define SX127X_PA_BOOST_ON 0b00000111 // 2 0 +20 dBm on PA_BOOST when OUTPUT_POWER = 0b1111
132 
133 // SX127X_REG_HOP_PERIOD
134 #define SX127X_HOP_PERIOD_OFF 0b00000000 // 7 0 number of periods between frequency hops; 0 = disabled
135 #define SX127X_HOP_PERIOD_MAX 0b11111111 // 7 0
136 
137 // SX127X_REG_DIO_MAPPING_1
138 #define SX127X_DIO0_RX_DONE 0b00000000 // 7 6
139 #define SX127X_DIO0_TX_DONE 0b01000000 // 7 6
140 #define SX127X_DIO0_CAD_DONE 0b10000000 // 7 6
141 #define SX127X_DIO1_RX_TIMEOUT 0b00000000 // 5 4
142 #define SX127X_DIO1_FHSS_CHANGE_CHANNEL 0b00010000 // 5 4
143 #define SX127X_DIO1_CAD_DETECTED 0b00100000 // 5 4
144 
145 // SX127X_REG_IRQ_FLAGS
146 #define SX127X_CLEAR_IRQ_FLAG_RX_TIMEOUT 0b10000000 // 7 7 timeout
147 #define SX127X_CLEAR_IRQ_FLAG_RX_DONE 0b01000000 // 6 6 packet reception complete
148 #define SX127X_CLEAR_IRQ_FLAG_PAYLOAD_CRC_ERROR 0b00100000 // 5 5 payload CRC error
149 #define SX127X_CLEAR_IRQ_FLAG_VALID_HEADER 0b00010000 // 4 4 valid header received
150 #define SX127X_CLEAR_IRQ_FLAG_TX_DONE 0b00001000 // 3 3 payload transmission complete
151 #define SX127X_CLEAR_IRQ_FLAG_CAD_DONE 0b00000100 // 2 2 CAD complete
152 #define SX127X_CLEAR_IRQ_FLAG_FHSS_CHANGE_CHANNEL 0b00000010 // 1 1 FHSS change channel
153 #define SX127X_CLEAR_IRQ_FLAG_CAD_DETECTED 0b00000001 // 0 0 valid LoRa signal detected during CAD operation
154 
155 // SX127X_REG_IRQ_FLAGS_MASK
156 #define SX127X_MASK_IRQ_FLAG_RX_TIMEOUT 0b01111111 // 7 7 timeout
157 #define SX127X_MASK_IRQ_FLAG_RX_DONE 0b10111111 // 6 6 packet reception complete
158 #define SX127X_MASK_IRQ_FLAG_PAYLOAD_CRC_ERROR 0b11011111 // 5 5 payload CRC error
159 #define SX127X_MASK_IRQ_FLAG_VALID_HEADER 0b11101111 // 4 4 valid header received
160 #define SX127X_MASK_IRQ_FLAG_TX_DONE 0b11110111 // 3 3 payload transmission complete
161 #define SX127X_MASK_IRQ_FLAG_CAD_DONE 0b11111011 // 2 2 CAD complete
162 #define SX127X_MASK_IRQ_FLAG_FHSS_CHANGE_CHANNEL 0b11111101 // 1 1 FHSS change channel
163 #define SX127X_MASK_IRQ_FLAG_CAD_DETECTED 0b11111110 // 0 0 valid LoRa signal detected during CAD operation
164 
165 // SX127X_REG_FIFO_TX_BASE_ADDR
166 #define SX127X_FIFO_TX_BASE_ADDR_MAX 0b00000000 // 7 0 allocate the entire FIFO buffer for TX only
167 
168 // SX127X_REG_FIFO_RX_BASE_ADDR
169 #define SX127X_FIFO_RX_BASE_ADDR_MAX 0b00000000 // 7 0 allocate the entire FIFO buffer for RX only
170 
171 // SX127X_REG_SYNC_WORD
172 #define SX127X_SYNC_WORD 0x12 // 7 0 default LoRa sync word
173 #define SX127X_SYNC_WORD_LORAWAN 0x34 // 7 0 sync word reserved for LoRaWAN networks
174 
175 // SX127x series common FSK registers
176 // NOTE: FSK register names that are conflicting with LoRa registers are marked with "_FSK" suffix
177 #define SX127X_REG_BITRATE_MSB 0x02
178 #define SX127X_REG_BITRATE_LSB 0x03
179 #define SX127X_REG_FDEV_MSB 0x04
180 #define SX127X_REG_FDEV_LSB 0x05
181 #define SX127X_REG_RX_CONFIG 0x0D
182 #define SX127X_REG_RSSI_CONFIG 0x0E
183 #define SX127X_REG_RSSI_COLLISION 0x0F
184 #define SX127X_REG_RSSI_THRESH 0x10
185 #define SX127X_REG_RSSI_VALUE_FSK 0x11
186 #define SX127X_REG_RX_BW 0x12
187 #define SX127X_REG_AFC_BW 0x13
188 #define SX127X_REG_OOK_PEAK 0x14
189 #define SX127X_REG_OOK_FIX 0x15
190 #define SX127X_REG_OOK_AVG 0x16
191 #define SX127X_REG_AFC_FEI 0x1A
192 #define SX127X_REG_AFC_MSB 0x1B
193 #define SX127X_REG_AFC_LSB 0x1C
194 #define SX127X_REG_FEI_MSB_FSK 0x1D
195 #define SX127X_REG_FEI_LSB_FSK 0x1E
196 #define SX127X_REG_PREAMBLE_DETECT 0x1F
197 #define SX127X_REG_RX_TIMEOUT_1 0x20
198 #define SX127X_REG_RX_TIMEOUT_2 0x21
199 #define SX127X_REG_RX_TIMEOUT_3 0x22
200 #define SX127X_REG_RX_DELAY 0x23
201 #define SX127X_REG_OSC 0x24
202 #define SX127X_REG_PREAMBLE_MSB_FSK 0x25
203 #define SX127X_REG_PREAMBLE_LSB_FSK 0x26
204 #define SX127X_REG_SYNC_CONFIG 0x27
205 #define SX127X_REG_SYNC_VALUE_1 0x28
206 #define SX127X_REG_SYNC_VALUE_2 0x29
207 #define SX127X_REG_SYNC_VALUE_3 0x2A
208 #define SX127X_REG_SYNC_VALUE_4 0x2B
209 #define SX127X_REG_SYNC_VALUE_5 0x2C
210 #define SX127X_REG_SYNC_VALUE_6 0x2D
211 #define SX127X_REG_SYNC_VALUE_7 0x2E
212 #define SX127X_REG_SYNC_VALUE_8 0x2F
213 #define SX127X_REG_PACKET_CONFIG_1 0x30
214 #define SX127X_REG_PACKET_CONFIG_2 0x31
215 #define SX127X_REG_PAYLOAD_LENGTH_FSK 0x32
216 #define SX127X_REG_NODE_ADRS 0x33
217 #define SX127X_REG_BROADCAST_ADRS 0x34
218 #define SX127X_REG_FIFO_THRESH 0x35
219 #define SX127X_REG_SEQ_CONFIG_1 0x36
220 #define SX127X_REG_SEQ_CONFIG_2 0x37
221 #define SX127X_REG_TIMER_RESOL 0x38
222 #define SX127X_REG_TIMER1_COEF 0x39
223 #define SX127X_REG_TIMER2_COEF 0x3A
224 #define SX127X_REG_IMAGE_CAL 0x3B
225 #define SX127X_REG_TEMP 0x3C
226 #define SX127X_REG_LOW_BAT 0x3D
227 #define SX127X_REG_IRQ_FLAGS_1 0x3E
228 #define SX127X_REG_IRQ_FLAGS_2 0x3F
229 
230 // SX127x common FSK modem settings
231 // SX127X_REG_OP_MODE
232 #define SX127X_MODULATION_FSK 0b00000000 // 6 5 FSK modulation scheme
233 #define SX127X_MODULATION_OOK 0b00100000 // 6 5 OOK modulation scheme
234 #define SX127X_RX 0b00000101 // 2 0 receiver mode
235 
236 // SX127X_REG_BITRATE_MSB + SX127X_REG_BITRATE_LSB
237 #define SX127X_BITRATE_MSB 0x1A // 7 0 bit rate setting: BitRate = F(XOSC)/(BITRATE + BITRATE_FRAC/16)
238 #define SX127X_BITRATE_LSB 0x0B // 7 0 default value: 4.8 kbps
239 
240 // SX127X_REG_FDEV_MSB + SX127X_REG_FDEV_LSB
241 #define SX127X_FDEV_MSB 0x00 // 5 0 frequency deviation: Fdev = Fstep * FDEV
242 #define SX127X_FDEV_LSB 0x52 // 7 0 default value: 5 kHz
243 
244 // SX127X_REG_RX_CONFIG
245 #define SX127X_RESTART_RX_ON_COLLISION_OFF 0b00000000 // 7 7 automatic receiver restart disabled (default)
246 #define SX127X_RESTART_RX_ON_COLLISION_ON 0b10000000 // 7 7 automatically restart receiver if it gets saturated or on packet collision
247 #define SX127X_RESTART_RX_WITHOUT_PLL_LOCK 0b01000000 // 6 6 manually restart receiver without frequency change
248 #define SX127X_RESTART_RX_WITH_PLL_LOCK 0b00100000 // 5 5 manually restart receiver with frequency change
249 #define SX127X_AFC_AUTO_OFF 0b00000000 // 4 4 no AFC performed (default)
250 #define SX127X_AFC_AUTO_ON 0b00010000 // 4 4 AFC performed at each receiver startup
251 #define SX127X_AGC_AUTO_OFF 0b00000000 // 3 3 LNA gain set manually by register
252 #define SX127X_AGC_AUTO_ON 0b00001000 // 3 3 LNA gain controlled by AGC
253 #define SX127X_RX_TRIGGER_NONE 0b00000000 // 2 0 receiver startup at: none
254 #define SX127X_RX_TRIGGER_RSSI_INTERRUPT 0b00000001 // 2 0 RSSI interrupt
255 #define SX127X_RX_TRIGGER_PREAMBLE_DETECT 0b00000110 // 2 0 preamble detected
256 #define SX127X_RX_TRIGGER_BOTH 0b00000111 // 2 0 RSSI interrupt and preamble detected
257 
258 // SX127X_REG_RSSI_CONFIG
259 #define SX127X_RSSI_SMOOTHING_SAMPLES_2 0b00000000 // 2 0 number of samples for RSSI average: 2
260 #define SX127X_RSSI_SMOOTHING_SAMPLES_4 0b00000001 // 2 0 4
261 #define SX127X_RSSI_SMOOTHING_SAMPLES_8 0b00000010 // 2 0 8 (default)
262 #define SX127X_RSSI_SMOOTHING_SAMPLES_16 0b00000011 // 2 0 16
263 #define SX127X_RSSI_SMOOTHING_SAMPLES_32 0b00000100 // 2 0 32
264 #define SX127X_RSSI_SMOOTHING_SAMPLES_64 0b00000101 // 2 0 64
265 #define SX127X_RSSI_SMOOTHING_SAMPLES_128 0b00000110 // 2 0 128
266 #define SX127X_RSSI_SMOOTHING_SAMPLES_256 0b00000111 // 2 0 256
267 
268 // SX127X_REG_RSSI_COLLISION
269 #define SX127X_RSSI_COLLISION_THRESHOLD 0x0A // 7 0 RSSI threshold in dB that will be considered a collision, default value: 10 dB
270 
271 // SX127X_REG_RSSI_THRESH
272 #define SX127X_RSSI_THRESHOLD 0xFF // 7 0 RSSI threshold that will trigger RSSI interrupt, RssiThreshold = RSSI_THRESHOLD / 2 [dBm]
273 
274 // SX127X_REG_RX_BW
275 #define SX127X_RX_BW_MANT_16 0b00000000 // 4 3 channel filter bandwidth: RxBw = F(XOSC) / (RxBwMant * 2^(RxBwExp + 2)) [kHz]
276 #define SX127X_RX_BW_MANT_20 0b00001000 // 4 3
277 #define SX127X_RX_BW_MANT_24 0b00010000 // 4 3 default RxBwMant parameter
278 #define SX127X_RX_BW_EXP 0b00000101 // 2 0 default RxBwExp parameter
279 
280 // SX127X_REG_AFC_BW
281 #define SX127X_RX_BW_MANT_AFC 0b00001000 // 4 3 default RxBwMant parameter used during AFC
282 #define SX127X_RX_BW_EXP_AFC 0b00000011 // 2 0 default RxBwExp parameter used during AFC
283 
284 // SX127X_REG_OOK_PEAK
285 #define SX127X_BIT_SYNC_OFF 0b00000000 // 5 5 bit synchronizer disabled (not allowed in packet mode)
286 #define SX127X_BIT_SYNC_ON 0b00100000 // 5 5 bit synchronizer enabled (default)
287 #define SX127X_OOK_THRESH_FIXED 0b00000000 // 4 3 OOK threshold type: fixed value
288 #define SX127X_OOK_THRESH_PEAK 0b00001000 // 4 3 peak mode (default)
289 #define SX127X_OOK_THRESH_AVERAGE 0b00010000 // 4 3 average mode
290 #define SX127X_OOK_PEAK_THRESH_STEP_0_5_DB 0b00000000 // 2 0 OOK demodulator step size: 0.5 dB (default)
291 #define SX127X_OOK_PEAK_THRESH_STEP_1_0_DB 0b00000001 // 2 0 1.0 dB
292 #define SX127X_OOK_PEAK_THRESH_STEP_1_5_DB 0b00000010 // 2 0 1.5 dB
293 #define SX127X_OOK_PEAK_THRESH_STEP_2_0_DB 0b00000011 // 2 0 2.0 dB
294 #define SX127X_OOK_PEAK_THRESH_STEP_3_0_DB 0b00000100 // 2 0 3.0 dB
295 #define SX127X_OOK_PEAK_THRESH_STEP_4_0_DB 0b00000101 // 2 0 4.0 dB
296 #define SX127X_OOK_PEAK_THRESH_STEP_5_0_DB 0b00000110 // 2 0 5.0 dB
297 #define SX127X_OOK_PEAK_THRESH_STEP_6_0_DB 0b00000111 // 2 0 6.0 dB
298 
299 // SX127X_REG_OOK_FIX
300 #define SX127X_OOK_FIXED_THRESHOLD 0x0C // 7 0 default fixed threshold for OOK data slicer
301 
302 // SX127X_REG_OOK_AVG
303 #define SX127X_OOK_PEAK_THRESH_DEC_1_1_CHIP 0b00000000 // 7 5 OOK demodulator step period: once per chip (default)
304 #define SX127X_OOK_PEAK_THRESH_DEC_1_2_CHIP 0b00100000 // 7 5 once every 2 chips
305 #define SX127X_OOK_PEAK_THRESH_DEC_1_4_CHIP 0b01000000 // 7 5 once every 4 chips
306 #define SX127X_OOK_PEAK_THRESH_DEC_1_8_CHIP 0b01100000 // 7 5 once every 8 chips
307 #define SX127X_OOK_PEAK_THRESH_DEC_2_1_CHIP 0b10000000 // 7 5 2 times per chip
308 #define SX127X_OOK_PEAK_THRESH_DEC_4_1_CHIP 0b10100000 // 7 5 4 times per chip
309 #define SX127X_OOK_PEAK_THRESH_DEC_8_1_CHIP 0b11000000 // 7 5 8 times per chip
310 #define SX127X_OOK_PEAK_THRESH_DEC_16_1_CHIP 0b11100000 // 7 5 16 times per chip
311 #define SX127X_OOK_AVERAGE_OFFSET_0_DB 0b00000000 // 3 2 OOK average threshold offset: 0.0 dB (default)
312 #define SX127X_OOK_AVERAGE_OFFSET_2_DB 0b00000100 // 3 2 2.0 dB
313 #define SX127X_OOK_AVERAGE_OFFSET_4_DB 0b00001000 // 3 2 4.0 dB
314 #define SX127X_OOK_AVERAGE_OFFSET_6_DB 0b00001100 // 3 2 6.0 dB
315 #define SX127X_OOK_AVG_THRESH_FILT_32_PI 0b00000000 // 1 0 OOK average filter coefficient: chip rate / 32*pi
316 #define SX127X_OOK_AVG_THRESH_FILT_8_PI 0b00000001 // 1 0 chip rate / 8*pi
317 #define SX127X_OOK_AVG_THRESH_FILT_4_PI 0b00000010 // 1 0 chip rate / 4*pi (default)
318 #define SX127X_OOK_AVG_THRESH_FILT_2_PI 0b00000011 // 1 0 chip rate / 2*pi
319 
320 // SX127X_REG_AFC_FEI
321 #define SX127X_AGC_START 0b00010000 // 4 4 manually start AGC sequence
322 #define SX127X_AFC_CLEAR 0b00000010 // 1 1 manually clear AFC register
323 #define SX127X_AFC_AUTO_CLEAR_OFF 0b00000000 // 0 0 AFC register will not be cleared at the start of AFC (default)
324 #define SX127X_AFC_AUTO_CLEAR_ON 0b00000001 // 0 0 AFC register will be cleared at the start of AFC
325 
326 // SX127X_REG_PREAMBLE_DETECT
327 #define SX127X_PREAMBLE_DETECTOR_OFF 0b00000000 // 7 7 preamble detection disabled
328 #define SX127X_PREAMBLE_DETECTOR_ON 0b10000000 // 7 7 preamble detection enabled (default)
329 #define SX127X_PREAMBLE_DETECTOR_1_BYTE 0b00000000 // 6 5 preamble detection size: 1 byte (default)
330 #define SX127X_PREAMBLE_DETECTOR_2_BYTE 0b00100000 // 6 5 2 bytes
331 #define SX127X_PREAMBLE_DETECTOR_3_BYTE 0b01000000 // 6 5 3 bytes
332 #define SX127X_PREAMBLE_DETECTOR_TOL 0x0A // 4 0 default number of tolerated errors per chip (4 chips per bit)
333 
334 // SX127X_REG_RX_TIMEOUT_1
335 #define SX127X_TIMEOUT_RX_RSSI_OFF 0x00 // 7 0 disable receiver timeout when RSSI interrupt doesn't occur (default)
336 
337 // SX127X_REG_RX_TIMEOUT_2
338 #define SX127X_TIMEOUT_RX_PREAMBLE_OFF 0x00 // 7 0 disable receiver timeout when preamble interrupt doesn't occur (default)
339 
340 // SX127X_REG_RX_TIMEOUT_3
341 #define SX127X_TIMEOUT_SIGNAL_SYNC_OFF 0x00 // 7 0 disable receiver timeout when sync address interrupt doesn't occur (default)
342 
343 // SX127X_REG_OSC
344 #define SX127X_RC_CAL_START 0b00000000 // 3 3 manually start RC oscillator calibration
345 #define SX127X_CLK_OUT_FXOSC 0b00000000 // 2 0 ClkOut frequency: F(XOSC)
346 #define SX127X_CLK_OUT_FXOSC_2 0b00000001 // 2 0 F(XOSC) / 2
347 #define SX127X_CLK_OUT_FXOSC_4 0b00000010 // 2 0 F(XOSC) / 4
348 #define SX127X_CLK_OUT_FXOSC_8 0b00000011 // 2 0 F(XOSC) / 8
349 #define SX127X_CLK_OUT_FXOSC_16 0b00000100 // 2 0 F(XOSC) / 16
350 #define SX127X_CLK_OUT_FXOSC_32 0b00000101 // 2 0 F(XOSC) / 32
351 #define SX127X_CLK_OUT_RC 0b00000110 // 2 0 RC
352 #define SX127X_CLK_OUT_OFF 0b00000111 // 2 0 disabled (default)
353 
354 // SX127X_REG_PREAMBLE_MSB_FSK + SX127X_REG_PREAMBLE_LSB_FSK
355 #define SX127X_PREAMBLE_SIZE_MSB 0x00 // 7 0 preamble size in bytes
356 #define SX127X_PREAMBLE_SIZE_LSB 0x03 // 7 0 default value: 3 bytes
357 
358 // SX127X_REG_SYNC_CONFIG
359 #define SX127X_AUTO_RESTART_RX_MODE_OFF 0b00000000 // 7 6 Rx mode restart after packet reception: disabled
360 #define SX127X_AUTO_RESTART_RX_MODE_NO_PLL 0b01000000 // 7 6 enabled, don't wait for PLL lock
361 #define SX127X_AUTO_RESTART_RX_MODE_PLL 0b10000000 // 7 6 enabled, wait for PLL lock (default)
362 #define SX127X_PREAMBLE_POLARITY_AA 0b00000000 // 5 5 preamble polarity: 0xAA = 0b10101010 (default)
363 #define SX127X_PREAMBLE_POLARITY_55 0b00100000 // 5 5 0x55 = 0b01010101
364 #define SX127X_SYNC_OFF 0b00000000 // 4 4 sync word disabled
365 #define SX127X_SYNC_ON 0b00010000 // 4 4 sync word enabled (default)
366 #define SX127X_SYNC_SIZE 0x03 // 2 0 sync word size in bytes, SyncSize = SYNC_SIZE + 1 bytes
367 
368 // SX127X_REG_SYNC_VALUE_1 - SX127X_REG_SYNC_VALUE_8
369 #define SX127X_SYNC_VALUE_1 0x01 // 7 0 sync word: 1st byte (MSB)
370 #define SX127X_SYNC_VALUE_2 0x01 // 7 0 2nd byte
371 #define SX127X_SYNC_VALUE_3 0x01 // 7 0 3rd byte
372 #define SX127X_SYNC_VALUE_4 0x01 // 7 0 4th byte
373 #define SX127X_SYNC_VALUE_5 0x01 // 7 0 5th byte
374 #define SX127X_SYNC_VALUE_6 0x01 // 7 0 6th byte
375 #define SX127X_SYNC_VALUE_7 0x01 // 7 0 7th byte
376 #define SX127X_SYNC_VALUE_8 0x01 // 7 0 8th byte (LSB)
377 
378 // SX127X_REG_PACKET_CONFIG_1
379 #define SX127X_PACKET_FIXED 0b00000000 // 7 7 packet format: fixed length
380 #define SX127X_PACKET_VARIABLE 0b10000000 // 7 7 variable length (default)
381 #define SX127X_DC_FREE_NONE 0b00000000 // 6 5 DC-free encoding: disabled (default)
382 #define SX127X_DC_FREE_MANCHESTER 0b00100000 // 6 5 Manchester
383 #define SX127X_DC_FREE_WHITENING 0b01000000 // 6 5 Whitening
384 #define SX127X_CRC_OFF 0b00000000 // 4 4 CRC disabled
385 #define SX127X_CRC_ON 0b00010000 // 4 4 CRC enabled (default)
386 #define SX127X_CRC_AUTOCLEAR_OFF 0b00001000 // 3 3 keep FIFO on CRC mismatch, issue payload ready interrupt
387 #define SX127X_CRC_AUTOCLEAR_ON 0b00000000 // 3 3 clear FIFO on CRC mismatch, do not issue payload ready interrupt
388 #define SX127X_ADDRESS_FILTERING_OFF 0b00000000 // 2 1 address filtering: none (default)
389 #define SX127X_ADDRESS_FILTERING_NODE 0b00000010 // 2 1 node
390 #define SX127X_ADDRESS_FILTERING_NODE_BROADCAST 0b00000100 // 2 1 node or broadcast
391 #define SX127X_CRC_WHITENING_TYPE_CCITT 0b00000000 // 0 0 CRC and whitening algorithms: CCITT CRC with standard whitening (default)
392 #define SX127X_CRC_WHITENING_TYPE_IBM 0b00000001 // 0 0 IBM CRC with alternate whitening
393 
394 // SX127X_REG_PACKET_CONFIG_2
395 #define SX127X_DATA_MODE_PACKET 0b01000000 // 6 6 data mode: packet (default)
396 #define SX127X_DATA_MODE_CONTINUOUS 0b00000000 // 6 6 continuous
397 #define SX127X_IO_HOME_OFF 0b00000000 // 5 5 io-homecontrol compatibility disabled (default)
398 #define SX127X_IO_HOME_ON 0b00100000 // 5 5 io-homecontrol compatibility enabled
399 
400 // SX127X_REG_FIFO_THRESH
401 #define SX127X_TX_START_FIFO_LEVEL 0b00000000 // 7 7 start packet transmission when: number of bytes in FIFO exceeds FIFO_THRESHOLD
402 #define SX127X_TX_START_FIFO_NOT_EMPTY 0b10000000 // 7 7 at least one byte in FIFO (default)
403 #define SX127X_FIFO_THRESH 0x0F // 5 0 FIFO level threshold
404 
405 // SX127X_REG_SEQ_CONFIG_1
406 #define SX127X_SEQUENCER_START 0b10000000 // 7 7 manually start sequencer
407 #define SX127X_SEQUENCER_STOP 0b01000000 // 6 6 manually stop sequencer
408 #define SX127X_IDLE_MODE_STANDBY 0b00000000 // 5 5 chip mode during sequencer idle mode: standby (default)
409 #define SX127X_IDLE_MODE_SLEEP 0b00100000 // 5 5 sleep
410 #define SX127X_FROM_START_LP_SELECTION 0b00000000 // 4 3 mode that will be set after starting sequencer: low power selection (default)
411 #define SX127X_FROM_START_RECEIVE 0b00001000 // 4 3 receive
412 #define SX127X_FROM_START_TRANSMIT 0b00010000 // 4 3 transmit
413 #define SX127X_FROM_START_TRANSMIT_FIFO_LEVEL 0b00011000 // 4 3 transmit on a FIFO level interrupt
414 #define SX127X_LP_SELECTION_SEQ_OFF 0b00000000 // 2 2 mode that will be set after exiting low power selection: sequencer off (default)
415 #define SX127X_LP_SELECTION_IDLE 0b00000100 // 2 2 idle state
416 #define SX127X_FROM_IDLE_TRANSMIT 0b00000000 // 1 1 mode that will be set after exiting idle mode: transmit (default)
417 #define SX127X_FROM_IDLE_RECEIVE 0b00000010 // 1 1 receive
418 #define SX127X_FROM_TRANSMIT_LP_SELECTION 0b00000000 // 0 0 mode that will be set after exiting transmit mode: low power selection (default)
419 #define SX127X_FROM_TRANSMIT_RECEIVE 0b00000001 // 0 0 receive
420 
421 // SX127X_REG_SEQ_CONFIG_2
422 #define SX127X_FROM_RECEIVE_PACKET_RECEIVED_PAYLOAD 0b00100000 // 7 5 mode that will be set after exiting receive mode: packet received on payload ready interrupt (default)
423 #define SX127X_FROM_RECEIVE_LP_SELECTION 0b01000000 // 7 5 low power selection
424 #define SX127X_FROM_RECEIVE_PACKET_RECEIVED_CRC_OK 0b01100000 // 7 5 packet received on CRC OK interrupt
425 #define SX127X_FROM_RECEIVE_SEQ_OFF_RSSI 0b10000000 // 7 5 sequencer off on RSSI interrupt
426 #define SX127X_FROM_RECEIVE_SEQ_OFF_SYNC_ADDR 0b10100000 // 7 5 sequencer off on sync address interrupt
427 #define SX127X_FROM_RECEIVE_SEQ_OFF_PREAMBLE_DETECT 0b11000000 // 7 5 sequencer off on preamble detect interrupt
428 #define SX127X_FROM_RX_TIMEOUT_RECEIVE 0b00000000 // 4 3 mode that will be set after Rx timeout: receive (default)
429 #define SX127X_FROM_RX_TIMEOUT_TRANSMIT 0b00001000 // 4 3 transmit
430 #define SX127X_FROM_RX_TIMEOUT_LP_SELECTION 0b00010000 // 4 3 low power selection
431 #define SX127X_FROM_RX_TIMEOUT_SEQ_OFF 0b00011000 // 4 3 sequencer off
432 #define SX127X_FROM_PACKET_RECEIVED_SEQ_OFF 0b00000000 // 2 0 mode that will be set after packet received: sequencer off (default)
433 #define SX127X_FROM_PACKET_RECEIVED_TRANSMIT 0b00000001 // 2 0 transmit
434 #define SX127X_FROM_PACKET_RECEIVED_LP_SELECTION 0b00000010 // 2 0 low power selection
435 #define SX127X_FROM_PACKET_RECEIVED_RECEIVE_FS 0b00000011 // 2 0 receive via FS
436 #define SX127X_FROM_PACKET_RECEIVED_RECEIVE 0b00000100 // 2 0 receive
437 
438 // SX127X_REG_TIMER_RESOL
439 #define SX127X_TIMER1_OFF 0b00000000 // 3 2 timer 1 resolution: disabled (default)
440 #define SX127X_TIMER1_RESOLUTION_64_US 0b00000100 // 3 2 64 us
441 #define SX127X_TIMER1_RESOLUTION_4_1_MS 0b00001000 // 3 2 4.1 ms
442 #define SX127X_TIMER1_RESOLUTION_262_MS 0b00001100 // 3 2 262 ms
443 #define SX127X_TIMER2_OFF 0b00000000 // 3 2 timer 2 resolution: disabled (default)
444 #define SX127X_TIMER2_RESOLUTION_64_US 0b00000001 // 3 2 64 us
445 #define SX127X_TIMER2_RESOLUTION_4_1_MS 0b00000010 // 3 2 4.1 ms
446 #define SX127X_TIMER2_RESOLUTION_262_MS 0b00000011 // 3 2 262 ms
447 
448 // SX127X_REG_TIMER1_COEF
449 #define SX127X_TIMER1_COEFFICIENT 0xF5 // 7 0 multiplication coefficient for timer 1
450 
451 // SX127X_REG_TIMER2_COEF
452 #define SX127X_TIMER2_COEFFICIENT 0x20 // 7 0 multiplication coefficient for timer 2
453 
454 // SX127X_REG_IMAGE_CAL
455 #define SX127X_AUTO_IMAGE_CAL_OFF 0b00000000 // 7 7 temperature calibration disabled (default)
456 #define SX127X_AUTO_IMAGE_CAL_ON 0b10000000 // 7 7 temperature calibration enabled
457 #define SX127X_IMAGE_CAL_START 0b01000000 // 6 6 start temperature calibration
458 #define SX127X_IMAGE_CAL_RUNNING 0b00100000 // 5 5 temperature calibration is on-going
459 #define SX127X_IMAGE_CAL_COMPLETE 0b00000000 // 5 5 temperature calibration finished
460 #define SX127X_TEMP_CHANGED 0b00001000 // 3 3 temperature changed more than TEMP_THRESHOLD since last calibration
461 #define SX127X_TEMP_THRESHOLD_5_DEG_C 0b00000000 // 2 1 temperature change threshold: 5 deg. C
462 #define SX127X_TEMP_THRESHOLD_10_DEG_C 0b00000010 // 2 1 10 deg. C (default)
463 #define SX127X_TEMP_THRESHOLD_15_DEG_C 0b00000100 // 2 1 15 deg. C
464 #define SX127X_TEMP_THRESHOLD_20_DEG_C 0b00000110 // 2 1 20 deg. C
465 #define SX127X_TEMP_MONITOR_ON 0b00000000 // 0 0 temperature monitoring enabled (default)
466 #define SX127X_TEMP_MONITOR_OFF 0b00000001 // 0 0 temperature monitoring disabled
467 
468 // SX127X_REG_LOW_BAT
469 #define SX127X_LOW_BAT_OFF 0b00000000 // 3 3 low battery detector disabled
470 #define SX127X_LOW_BAT_ON 0b00001000 // 3 3 low battery detector enabled
471 #define SX127X_LOW_BAT_TRIM_1_695_V 0b00000000 // 2 0 battery voltage threshold: 1.695 V
472 #define SX127X_LOW_BAT_TRIM_1_764_V 0b00000001 // 2 0 1.764 V
473 #define SX127X_LOW_BAT_TRIM_1_835_V 0b00000010 // 2 0 1.835 V (default)
474 #define SX127X_LOW_BAT_TRIM_1_905_V 0b00000011 // 2 0 1.905 V
475 #define SX127X_LOW_BAT_TRIM_1_976_V 0b00000100 // 2 0 1.976 V
476 #define SX127X_LOW_BAT_TRIM_2_045_V 0b00000101 // 2 0 2.045 V
477 #define SX127X_LOW_BAT_TRIM_2_116_V 0b00000110 // 2 0 2.116 V
478 #define SX127X_LOW_BAT_TRIM_2_185_V 0b00000111 // 2 0 2.185 V
479 
480 // SX127X_REG_IRQ_FLAGS_1
481 #define SX127X_FLAG_MODE_READY 0b10000000 // 7 7 requested mode is ready
482 #define SX127X_FLAG_RX_READY 0b01000000 // 6 6 reception ready (after RSSI, AGC, AFC)
483 #define SX127X_FLAG_TX_READY 0b00100000 // 5 5 transmission ready (after PA ramp-up)
484 #define SX127X_FLAG_PLL_LOCK 0b00010000 // 4 4 PLL locked
485 #define SX127X_FLAG_RSSI 0b00001000 // 3 3 RSSI value exceeds RSSI threshold
486 #define SX127X_FLAG_TIMEOUT 0b00000100 // 2 2 timeout occurred
487 #define SX127X_FLAG_PREAMBLE_DETECT 0b00000010 // 1 1 valid preamble was detected
488 #define SX127X_FLAG_SYNC_ADDRESS_MATCH 0b00000001 // 0 0 sync address matched
489 
490 // SX127X_REG_IRQ_FLAGS_2
491 #define SX127X_FLAG_FIFO_FULL 0b10000000 // 7 7 FIFO is full
492 #define SX127X_FLAG_FIFO_EMPTY 0b01000000 // 6 6 FIFO is empty
493 #define SX127X_FLAG_FIFO_LEVEL 0b00100000 // 5 5 number of bytes in FIFO exceeds FIFO_THRESHOLD
494 #define SX127X_FLAG_FIFO_OVERRUN 0b00010000 // 4 4 FIFO overrun occurred
495 #define SX127X_FLAG_PACKET_SENT 0b00001000 // 3 3 packet was successfully sent
496 #define SX127X_FLAG_PAYLOAD_READY 0b00000100 // 2 2 packet was successfully received
497 #define SX127X_FLAG_CRC_OK 0b00000010 // 1 1 CRC check passed
498 #define SX127X_FLAG_LOW_BAT 0b00000001 // 0 0 battery voltage dropped below threshold
499 
500 // SX127X_REG_DIO_MAPPING_1
501 #define SX127X_DIO0_CONT_SYNC_ADDRESS 0b00000000 // 7 6
502 #define SX127X_DIO0_CONT_TX_READY 0b00000000 // 7 6
503 #define SX127X_DIO0_CONT_RSSI_PREAMBLE_DETECTED 0b01000000 // 7 6
504 #define SX127X_DIO0_CONT_RX_READY 0b10000000 // 7 6
505 #define SX127X_DIO0_PACK_PAYLOAD_READY 0b00000000 // 7 6
506 #define SX127X_DIO0_PACK_PACKET_SENT 0b00000000 // 7 6
507 #define SX127X_DIO0_PACK_CRC_OK 0b01000000 // 7 6
508 #define SX127X_DIO0_PACK_TEMP_CHANGE_LOW_BAT 0b11000000 // 7 6
509 #define SX127X_DIO1_CONT_DCLK 0b00000000 // 5 4
510 #define SX127X_DIO1_CONT_RSSI_PREAMBLE_DETECTED 0b00010000 // 5 4
511 #define SX127X_DIO1_PACK_FIFO_LEVEL 0b00000000 // 5 4
512 #define SX127X_DIO1_PACK_FIFO_EMPTY 0b00010000 // 5 4
513 #define SX127X_DIO1_PACK_FIFO_FULL 0b00100000 // 5 4
514 #define SX127X_DIO2_CONT_DATA 0b00000000 // 3 2
515 
516 // SX1272_REG_PLL_HOP + SX1278_REG_PLL_HOP
517 #define SX127X_FAST_HOP_OFF 0b00000000 // 7 7 carrier frequency validated when FRF registers are written
518 #define SX127X_FAST_HOP_ON 0b10000000 // 7 7 carrier frequency validated when FS modes are requested
519 
520 // SX1272_REG_TCXO + SX1278_REG_TCXO
521 #define SX127X_TCXO_INPUT_EXTERNAL 0b00000000 // 4 4 use external crystal oscillator
522 #define SX127X_TCXO_INPUT_EXTERNAL_CLIPPED 0b00010000 // 4 4 use external crystal oscillator clipped sine connected to XTA pin
523 
524 // SX1272_REG_PLL + SX1278_REG_PLL
525 #define SX127X_PLL_BANDWIDTH_75_KHZ 0b00000000 // 7 6 PLL bandwidth: 75 kHz
526 #define SX127X_PLL_BANDWIDTH_150_KHZ 0b01000000 // 7 6 150 kHz
527 #define SX127X_PLL_BANDWIDTH_225_KHZ 0b10000000 // 7 6 225 kHz
528 #define SX127X_PLL_BANDWIDTH_300_KHZ 0b11000000 // 7 6 300 kHz (default)
529 
536 class SX127x: public PhysicalLayer {
537  public:
538  // introduce PhysicalLayer overloads
539  using PhysicalLayer::transmit;
540  using PhysicalLayer::receive;
541  using PhysicalLayer::startTransmit;
542  using PhysicalLayer::readData;
543 
544  // constructor
545 
551  SX127x(Module* mod);
552 
553  // basic methods
554 
566  int16_t begin(uint8_t chipVersion, uint8_t syncWord, uint16_t preambleLength);
567 
571  virtual void reset() = 0;
572 
590  int16_t beginFSK(uint8_t chipVersion, float br, float freqDev, float rxBw, uint16_t preambleLength, bool enableOOK);
591 
604  int16_t transmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
605 
616  int16_t receive(uint8_t* data, size_t len) override;
617 
623  int16_t scanChannel();
624 
631  int16_t sleep();
632 
638  int16_t standby() override;
639 
648  int16_t transmitDirect(uint32_t frf = 0) override;
649 
656  int16_t receiveDirect() override;
657 
663  int16_t packetMode();
664 
665  // interrupt methods
666 
672  void setDio0Action(void (*func)(void));
673 
677  void clearDio0Action();
678 
684  void setDio1Action(void (*func)(void));
685 
689  void clearDio1Action();
690 
702  int16_t startTransmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
703 
713  int16_t startReceive(uint8_t len = 0, uint8_t mode = SX127X_RXCONTINUOUS);
714 
724  int16_t readData(uint8_t* data, size_t len) override;
725 
726 
727  // configuration methods
728 
736  int16_t setSyncWord(uint8_t syncWord);
737 
745  int16_t setCurrentLimit(uint8_t currentLimit);
746 
754  int16_t setPreambleLength(uint16_t preambleLength);
755 
763  float getFrequencyError(bool autoCorrect = false);
764 
770  float getSNR();
771 
777  float getDataRate() const;
778 
786  int16_t setBitRate(float br);
787 
795  int16_t setFrequencyDeviation(float freqDev) override;
796 
804  int16_t setRxBandwidth(float rxBw);
805 
815  int16_t setSyncWord(uint8_t* syncWord, size_t len);
816 
824  int16_t setNodeAddress(uint8_t nodeAddr);
825 
833  int16_t setBroadcastAddress(uint8_t broadAddr);
834 
840  int16_t disableAddressFiltering();
841 
849  int16_t setOOK(bool enableOOK);
850 
858  size_t getPacketLength(bool update = true) override;
859 
867  int16_t fixedPacketLengthMode(uint8_t len = SX127X_MAX_PACKET_LENGTH_FSK);
868 
876  int16_t variablePacketLengthMode(uint8_t maxLen = SX127X_MAX_PACKET_LENGTH_FSK);
877 
888  int16_t setRSSIConfig(uint8_t smoothingSamples, int8_t offset = 0);
889 
898  int16_t setEncoding(uint8_t encoding) override;
899 
907  uint16_t getIRQFlags();
908 
914  uint8_t getModemStatus();
915 
922  int8_t getTempRaw();
923 
932  void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn);
933 
939  uint8_t random();
940 
946  int16_t getChipVersion();
947 
948 #ifndef RADIOLIB_GODMODE
949  protected:
950 #endif
951  Module* _mod;
952 
953  float _freq = 0;
954  float _bw = 0;
955  uint8_t _sf = 0;
956  uint8_t _cr = 0;
957  float _br = 0;
958  float _rxBw = 0;
959  bool _ook = false;
960  bool _crcEnabled = false;
961 
962  int16_t setFrequencyRaw(float newFreq);
963  int16_t config();
964  int16_t configFSK();
965  int16_t getActiveModem();
966  int16_t directMode();
967  int16_t setPacketMode(uint8_t mode, uint8_t len);
968 
969 #ifndef RADIOLIB_GODMODE
970  private:
971 #endif
972  float _dataRate = 0;
973  size_t _packetLength = 0;
974  bool _packetLengthQueried = false; // FSK packet length is the first byte in FIFO, length can only be queried once
975  uint8_t _packetLengthConfig = SX127X_PACKET_VARIABLE;
976 
977  bool findChip(uint8_t ver);
978  int16_t setMode(uint8_t mode);
979  int16_t setActiveModem(uint8_t modem);
980  void clearIRQFlags();
981  void clearFIFO(size_t count); // used mostly to clear remaining bytes in FIFO after a packet read
982 };
983 
984 #endif
985 
986 #endif
SX127x::setRSSIConfig
int16_t setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)
Sets RSSI measurement configuration in FSK mode.
Definition: SX127x.cpp:897
+
1 #if !defined(_RADIOLIB_SX127X_H)
2 #define _RADIOLIB_SX127X_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SX127X)
7 
8 #include "../../Module.h"
9 
10 #include "../../protocols/PhysicalLayer/PhysicalLayer.h"
11 
12 // SX127x physical layer properties
13 #define SX127X_FREQUENCY_STEP_SIZE 61.03515625
14 #define SX127X_MAX_PACKET_LENGTH 255
15 #define SX127X_MAX_PACKET_LENGTH_FSK 64
16 #define SX127X_CRYSTAL_FREQ 32.0
17 #define SX127X_DIV_EXPONENT 19
18 
19 // SX127x series common LoRa registers
20 #define SX127X_REG_FIFO 0x00
21 #define SX127X_REG_OP_MODE 0x01
22 #define SX127X_REG_FRF_MSB 0x06
23 #define SX127X_REG_FRF_MID 0x07
24 #define SX127X_REG_FRF_LSB 0x08
25 #define SX127X_REG_PA_CONFIG 0x09
26 #define SX127X_REG_PA_RAMP 0x0A
27 #define SX127X_REG_OCP 0x0B
28 #define SX127X_REG_LNA 0x0C
29 #define SX127X_REG_FIFO_ADDR_PTR 0x0D
30 #define SX127X_REG_FIFO_TX_BASE_ADDR 0x0E
31 #define SX127X_REG_FIFO_RX_BASE_ADDR 0x0F
32 #define SX127X_REG_FIFO_RX_CURRENT_ADDR 0x10
33 #define SX127X_REG_IRQ_FLAGS_MASK 0x11
34 #define SX127X_REG_IRQ_FLAGS 0x12
35 #define SX127X_REG_RX_NB_BYTES 0x13
36 #define SX127X_REG_RX_HEADER_CNT_VALUE_MSB 0x14
37 #define SX127X_REG_RX_HEADER_CNT_VALUE_LSB 0x15
38 #define SX127X_REG_RX_PACKET_CNT_VALUE_MSB 0x16
39 #define SX127X_REG_RX_PACKET_CNT_VALUE_LSB 0x17
40 #define SX127X_REG_MODEM_STAT 0x18
41 #define SX127X_REG_PKT_SNR_VALUE 0x19
42 #define SX127X_REG_PKT_RSSI_VALUE 0x1A
43 #define SX127X_REG_RSSI_VALUE 0x1B
44 #define SX127X_REG_HOP_CHANNEL 0x1C
45 #define SX127X_REG_MODEM_CONFIG_1 0x1D
46 #define SX127X_REG_MODEM_CONFIG_2 0x1E
47 #define SX127X_REG_SYMB_TIMEOUT_LSB 0x1F
48 #define SX127X_REG_PREAMBLE_MSB 0x20
49 #define SX127X_REG_PREAMBLE_LSB 0x21
50 #define SX127X_REG_PAYLOAD_LENGTH 0x22
51 #define SX127X_REG_MAX_PAYLOAD_LENGTH 0x23
52 #define SX127X_REG_HOP_PERIOD 0x24
53 #define SX127X_REG_FIFO_RX_BYTE_ADDR 0x25
54 #define SX127X_REG_FEI_MSB 0x28
55 #define SX127X_REG_FEI_MID 0x29
56 #define SX127X_REG_FEI_LSB 0x2A
57 #define SX127X_REG_RSSI_WIDEBAND 0x2C
58 #define SX127X_REG_DETECT_OPTIMIZE 0x31
59 #define SX127X_REG_INVERT_IQ 0x33
60 #define SX127X_REG_DETECTION_THRESHOLD 0x37
61 #define SX127X_REG_SYNC_WORD 0x39
62 #define SX127X_REG_DIO_MAPPING_1 0x40
63 #define SX127X_REG_DIO_MAPPING_2 0x41
64 #define SX127X_REG_VERSION 0x42
65 
66 // SX127x common LoRa modem settings
67 // SX127X_REG_OP_MODE MSB LSB DESCRIPTION
68 #define SX127X_FSK_OOK 0b00000000 // 7 7 FSK/OOK mode
69 #define SX127X_LORA 0b10000000 // 7 7 LoRa mode
70 #define SX127X_ACCESS_SHARED_REG_OFF 0b00000000 // 6 6 access LoRa registers (0x0D:0x3F) in LoRa mode
71 #define SX127X_ACCESS_SHARED_REG_ON 0b01000000 // 6 6 access FSK registers (0x0D:0x3F) in LoRa mode
72 #define SX127X_SLEEP 0b00000000 // 2 0 sleep
73 #define SX127X_STANDBY 0b00000001 // 2 0 standby
74 #define SX127X_FSTX 0b00000010 // 2 0 frequency synthesis TX
75 #define SX127X_TX 0b00000011 // 2 0 transmit
76 #define SX127X_FSRX 0b00000100 // 2 0 frequency synthesis RX
77 #define SX127X_RXCONTINUOUS 0b00000101 // 2 0 receive continuous
78 #define SX127X_RXSINGLE 0b00000110 // 2 0 receive single
79 #define SX127X_CAD 0b00000111 // 2 0 channel activity detection
80 
81 // SX127X_REG_PA_CONFIG
82 #define SX127X_PA_SELECT_RFO 0b00000000 // 7 7 RFO pin output, power limited to +14 dBm
83 #define SX127X_PA_SELECT_BOOST 0b10000000 // 7 7 PA_BOOST pin output, power limited to +20 dBm
84 #define SX127X_OUTPUT_POWER 0b00001111 // 3 0 output power: P_out = 2 + OUTPUT_POWER [dBm] for PA_SELECT_BOOST
85  // P_out = -1 + OUTPUT_POWER [dBm] for PA_SELECT_RFO
86 
87 // SX127X_REG_OCP
88 #define SX127X_OCP_OFF 0b00000000 // 5 5 PA overload current protection disabled
89 #define SX127X_OCP_ON 0b00100000 // 5 5 PA overload current protection enabled
90 #define SX127X_OCP_TRIM 0b00001011 // 4 0 OCP current: I_max(OCP_TRIM = 0b1011) = 100 mA
91 
92 // SX127X_REG_LNA
93 #define SX127X_LNA_GAIN_1 0b00100000 // 7 5 LNA gain setting: max gain
94 #define SX127X_LNA_GAIN_2 0b01000000 // 7 5 .
95 #define SX127X_LNA_GAIN_3 0b01100000 // 7 5 .
96 #define SX127X_LNA_GAIN_4 0b10000000 // 7 5 .
97 #define SX127X_LNA_GAIN_5 0b10100000 // 7 5 .
98 #define SX127X_LNA_GAIN_6 0b11000000 // 7 5 min gain
99 #define SX127X_LNA_BOOST_OFF 0b00000000 // 1 0 default LNA current
100 #define SX127X_LNA_BOOST_ON 0b00000011 // 1 0 150% LNA current
101 
102 // SX127X_REG_MODEM_CONFIG_2
103 #define SX127X_SF_6 0b01100000 // 7 4 spreading factor: 64 chips/bit
104 #define SX127X_SF_7 0b01110000 // 7 4 128 chips/bit
105 #define SX127X_SF_8 0b10000000 // 7 4 256 chips/bit
106 #define SX127X_SF_9 0b10010000 // 7 4 512 chips/bit
107 #define SX127X_SF_10 0b10100000 // 7 4 1024 chips/bit
108 #define SX127X_SF_11 0b10110000 // 7 4 2048 chips/bit
109 #define SX127X_SF_12 0b11000000 // 7 4 4096 chips/bit
110 #define SX127X_TX_MODE_SINGLE 0b00000000 // 3 3 single TX
111 #define SX127X_TX_MODE_CONT 0b00001000 // 3 3 continuous TX
112 #define SX127X_RX_TIMEOUT_MSB 0b00000000 // 1 0
113 
114 // SX127X_REG_SYMB_TIMEOUT_LSB
115 #define SX127X_RX_TIMEOUT_LSB 0b01100100 // 7 0 10 bit RX operation timeout
116 
117 // SX127X_REG_PREAMBLE_MSB + REG_PREAMBLE_LSB
118 #define SX127X_PREAMBLE_LENGTH_MSB 0b00000000 // 7 0 2 byte preamble length setting: l_P = PREAMBLE_LENGTH + 4.25
119 #define SX127X_PREAMBLE_LENGTH_LSB 0b00001000 // 7 0 where l_p = preamble length
120 
121 // SX127X_REG_DETECT_OPTIMIZE
122 #define SX127X_DETECT_OPTIMIZE_SF_6 0b00000101 // 2 0 SF6 detection optimization
123 #define SX127X_DETECT_OPTIMIZE_SF_7_12 0b00000011 // 2 0 SF7 to SF12 detection optimization
124 
125 // SX127X_REG_DETECTION_THRESHOLD
126 #define SX127X_DETECTION_THRESHOLD_SF_6 0b00001100 // 7 0 SF6 detection threshold
127 #define SX127X_DETECTION_THRESHOLD_SF_7_12 0b00001010 // 7 0 SF7 to SF12 detection threshold
128 
129 // SX127X_REG_PA_DAC
130 #define SX127X_PA_BOOST_OFF 0b00000100 // 2 0 PA_BOOST disabled
131 #define SX127X_PA_BOOST_ON 0b00000111 // 2 0 +20 dBm on PA_BOOST when OUTPUT_POWER = 0b1111
132 
133 // SX127X_REG_HOP_PERIOD
134 #define SX127X_HOP_PERIOD_OFF 0b00000000 // 7 0 number of periods between frequency hops; 0 = disabled
135 #define SX127X_HOP_PERIOD_MAX 0b11111111 // 7 0
136 
137 // SX127X_REG_DIO_MAPPING_1
138 #define SX127X_DIO0_RX_DONE 0b00000000 // 7 6
139 #define SX127X_DIO0_TX_DONE 0b01000000 // 7 6
140 #define SX127X_DIO0_CAD_DONE 0b10000000 // 7 6
141 #define SX127X_DIO1_RX_TIMEOUT 0b00000000 // 5 4
142 #define SX127X_DIO1_FHSS_CHANGE_CHANNEL 0b00010000 // 5 4
143 #define SX127X_DIO1_CAD_DETECTED 0b00100000 // 5 4
144 
145 // SX127X_REG_IRQ_FLAGS
146 #define SX127X_CLEAR_IRQ_FLAG_RX_TIMEOUT 0b10000000 // 7 7 timeout
147 #define SX127X_CLEAR_IRQ_FLAG_RX_DONE 0b01000000 // 6 6 packet reception complete
148 #define SX127X_CLEAR_IRQ_FLAG_PAYLOAD_CRC_ERROR 0b00100000 // 5 5 payload CRC error
149 #define SX127X_CLEAR_IRQ_FLAG_VALID_HEADER 0b00010000 // 4 4 valid header received
150 #define SX127X_CLEAR_IRQ_FLAG_TX_DONE 0b00001000 // 3 3 payload transmission complete
151 #define SX127X_CLEAR_IRQ_FLAG_CAD_DONE 0b00000100 // 2 2 CAD complete
152 #define SX127X_CLEAR_IRQ_FLAG_FHSS_CHANGE_CHANNEL 0b00000010 // 1 1 FHSS change channel
153 #define SX127X_CLEAR_IRQ_FLAG_CAD_DETECTED 0b00000001 // 0 0 valid LoRa signal detected during CAD operation
154 
155 // SX127X_REG_IRQ_FLAGS_MASK
156 #define SX127X_MASK_IRQ_FLAG_RX_TIMEOUT 0b01111111 // 7 7 timeout
157 #define SX127X_MASK_IRQ_FLAG_RX_DONE 0b10111111 // 6 6 packet reception complete
158 #define SX127X_MASK_IRQ_FLAG_PAYLOAD_CRC_ERROR 0b11011111 // 5 5 payload CRC error
159 #define SX127X_MASK_IRQ_FLAG_VALID_HEADER 0b11101111 // 4 4 valid header received
160 #define SX127X_MASK_IRQ_FLAG_TX_DONE 0b11110111 // 3 3 payload transmission complete
161 #define SX127X_MASK_IRQ_FLAG_CAD_DONE 0b11111011 // 2 2 CAD complete
162 #define SX127X_MASK_IRQ_FLAG_FHSS_CHANGE_CHANNEL 0b11111101 // 1 1 FHSS change channel
163 #define SX127X_MASK_IRQ_FLAG_CAD_DETECTED 0b11111110 // 0 0 valid LoRa signal detected during CAD operation
164 
165 // SX127X_REG_FIFO_TX_BASE_ADDR
166 #define SX127X_FIFO_TX_BASE_ADDR_MAX 0b00000000 // 7 0 allocate the entire FIFO buffer for TX only
167 
168 // SX127X_REG_FIFO_RX_BASE_ADDR
169 #define SX127X_FIFO_RX_BASE_ADDR_MAX 0b00000000 // 7 0 allocate the entire FIFO buffer for RX only
170 
171 // SX127X_REG_SYNC_WORD
172 #define SX127X_SYNC_WORD 0x12 // 7 0 default LoRa sync word
173 #define SX127X_SYNC_WORD_LORAWAN 0x34 // 7 0 sync word reserved for LoRaWAN networks
174 
175 // SX127x series common FSK registers
176 // NOTE: FSK register names that are conflicting with LoRa registers are marked with "_FSK" suffix
177 #define SX127X_REG_BITRATE_MSB 0x02
178 #define SX127X_REG_BITRATE_LSB 0x03
179 #define SX127X_REG_FDEV_MSB 0x04
180 #define SX127X_REG_FDEV_LSB 0x05
181 #define SX127X_REG_RX_CONFIG 0x0D
182 #define SX127X_REG_RSSI_CONFIG 0x0E
183 #define SX127X_REG_RSSI_COLLISION 0x0F
184 #define SX127X_REG_RSSI_THRESH 0x10
185 #define SX127X_REG_RSSI_VALUE_FSK 0x11
186 #define SX127X_REG_RX_BW 0x12
187 #define SX127X_REG_AFC_BW 0x13
188 #define SX127X_REG_OOK_PEAK 0x14
189 #define SX127X_REG_OOK_FIX 0x15
190 #define SX127X_REG_OOK_AVG 0x16
191 #define SX127X_REG_AFC_FEI 0x1A
192 #define SX127X_REG_AFC_MSB 0x1B
193 #define SX127X_REG_AFC_LSB 0x1C
194 #define SX127X_REG_FEI_MSB_FSK 0x1D
195 #define SX127X_REG_FEI_LSB_FSK 0x1E
196 #define SX127X_REG_PREAMBLE_DETECT 0x1F
197 #define SX127X_REG_RX_TIMEOUT_1 0x20
198 #define SX127X_REG_RX_TIMEOUT_2 0x21
199 #define SX127X_REG_RX_TIMEOUT_3 0x22
200 #define SX127X_REG_RX_DELAY 0x23
201 #define SX127X_REG_OSC 0x24
202 #define SX127X_REG_PREAMBLE_MSB_FSK 0x25
203 #define SX127X_REG_PREAMBLE_LSB_FSK 0x26
204 #define SX127X_REG_SYNC_CONFIG 0x27
205 #define SX127X_REG_SYNC_VALUE_1 0x28
206 #define SX127X_REG_SYNC_VALUE_2 0x29
207 #define SX127X_REG_SYNC_VALUE_3 0x2A
208 #define SX127X_REG_SYNC_VALUE_4 0x2B
209 #define SX127X_REG_SYNC_VALUE_5 0x2C
210 #define SX127X_REG_SYNC_VALUE_6 0x2D
211 #define SX127X_REG_SYNC_VALUE_7 0x2E
212 #define SX127X_REG_SYNC_VALUE_8 0x2F
213 #define SX127X_REG_PACKET_CONFIG_1 0x30
214 #define SX127X_REG_PACKET_CONFIG_2 0x31
215 #define SX127X_REG_PAYLOAD_LENGTH_FSK 0x32
216 #define SX127X_REG_NODE_ADRS 0x33
217 #define SX127X_REG_BROADCAST_ADRS 0x34
218 #define SX127X_REG_FIFO_THRESH 0x35
219 #define SX127X_REG_SEQ_CONFIG_1 0x36
220 #define SX127X_REG_SEQ_CONFIG_2 0x37
221 #define SX127X_REG_TIMER_RESOL 0x38
222 #define SX127X_REG_TIMER1_COEF 0x39
223 #define SX127X_REG_TIMER2_COEF 0x3A
224 #define SX127X_REG_IMAGE_CAL 0x3B
225 #define SX127X_REG_TEMP 0x3C
226 #define SX127X_REG_LOW_BAT 0x3D
227 #define SX127X_REG_IRQ_FLAGS_1 0x3E
228 #define SX127X_REG_IRQ_FLAGS_2 0x3F
229 
230 // SX127x common FSK modem settings
231 // SX127X_REG_OP_MODE
232 #define SX127X_MODULATION_FSK 0b00000000 // 6 5 FSK modulation scheme
233 #define SX127X_MODULATION_OOK 0b00100000 // 6 5 OOK modulation scheme
234 #define SX127X_RX 0b00000101 // 2 0 receiver mode
235 
236 // SX127X_REG_BITRATE_MSB + SX127X_REG_BITRATE_LSB
237 #define SX127X_BITRATE_MSB 0x1A // 7 0 bit rate setting: BitRate = F(XOSC)/(BITRATE + BITRATE_FRAC/16)
238 #define SX127X_BITRATE_LSB 0x0B // 7 0 default value: 4.8 kbps
239 
240 // SX127X_REG_FDEV_MSB + SX127X_REG_FDEV_LSB
241 #define SX127X_FDEV_MSB 0x00 // 5 0 frequency deviation: Fdev = Fstep * FDEV
242 #define SX127X_FDEV_LSB 0x52 // 7 0 default value: 5 kHz
243 
244 // SX127X_REG_RX_CONFIG
245 #define SX127X_RESTART_RX_ON_COLLISION_OFF 0b00000000 // 7 7 automatic receiver restart disabled (default)
246 #define SX127X_RESTART_RX_ON_COLLISION_ON 0b10000000 // 7 7 automatically restart receiver if it gets saturated or on packet collision
247 #define SX127X_RESTART_RX_WITHOUT_PLL_LOCK 0b01000000 // 6 6 manually restart receiver without frequency change
248 #define SX127X_RESTART_RX_WITH_PLL_LOCK 0b00100000 // 5 5 manually restart receiver with frequency change
249 #define SX127X_AFC_AUTO_OFF 0b00000000 // 4 4 no AFC performed (default)
250 #define SX127X_AFC_AUTO_ON 0b00010000 // 4 4 AFC performed at each receiver startup
251 #define SX127X_AGC_AUTO_OFF 0b00000000 // 3 3 LNA gain set manually by register
252 #define SX127X_AGC_AUTO_ON 0b00001000 // 3 3 LNA gain controlled by AGC
253 #define SX127X_RX_TRIGGER_NONE 0b00000000 // 2 0 receiver startup at: none
254 #define SX127X_RX_TRIGGER_RSSI_INTERRUPT 0b00000001 // 2 0 RSSI interrupt
255 #define SX127X_RX_TRIGGER_PREAMBLE_DETECT 0b00000110 // 2 0 preamble detected
256 #define SX127X_RX_TRIGGER_BOTH 0b00000111 // 2 0 RSSI interrupt and preamble detected
257 
258 // SX127X_REG_RSSI_CONFIG
259 #define SX127X_RSSI_SMOOTHING_SAMPLES_2 0b00000000 // 2 0 number of samples for RSSI average: 2
260 #define SX127X_RSSI_SMOOTHING_SAMPLES_4 0b00000001 // 2 0 4
261 #define SX127X_RSSI_SMOOTHING_SAMPLES_8 0b00000010 // 2 0 8 (default)
262 #define SX127X_RSSI_SMOOTHING_SAMPLES_16 0b00000011 // 2 0 16
263 #define SX127X_RSSI_SMOOTHING_SAMPLES_32 0b00000100 // 2 0 32
264 #define SX127X_RSSI_SMOOTHING_SAMPLES_64 0b00000101 // 2 0 64
265 #define SX127X_RSSI_SMOOTHING_SAMPLES_128 0b00000110 // 2 0 128
266 #define SX127X_RSSI_SMOOTHING_SAMPLES_256 0b00000111 // 2 0 256
267 
268 // SX127X_REG_RSSI_COLLISION
269 #define SX127X_RSSI_COLLISION_THRESHOLD 0x0A // 7 0 RSSI threshold in dB that will be considered a collision, default value: 10 dB
270 
271 // SX127X_REG_RSSI_THRESH
272 #define SX127X_RSSI_THRESHOLD 0xFF // 7 0 RSSI threshold that will trigger RSSI interrupt, RssiThreshold = RSSI_THRESHOLD / 2 [dBm]
273 
274 // SX127X_REG_RX_BW
275 #define SX127X_RX_BW_MANT_16 0b00000000 // 4 3 channel filter bandwidth: RxBw = F(XOSC) / (RxBwMant * 2^(RxBwExp + 2)) [kHz]
276 #define SX127X_RX_BW_MANT_20 0b00001000 // 4 3
277 #define SX127X_RX_BW_MANT_24 0b00010000 // 4 3 default RxBwMant parameter
278 #define SX127X_RX_BW_EXP 0b00000101 // 2 0 default RxBwExp parameter
279 
280 // SX127X_REG_AFC_BW
281 #define SX127X_RX_BW_MANT_AFC 0b00001000 // 4 3 default RxBwMant parameter used during AFC
282 #define SX127X_RX_BW_EXP_AFC 0b00000011 // 2 0 default RxBwExp parameter used during AFC
283 
284 // SX127X_REG_OOK_PEAK
285 #define SX127X_BIT_SYNC_OFF 0b00000000 // 5 5 bit synchronizer disabled (not allowed in packet mode)
286 #define SX127X_BIT_SYNC_ON 0b00100000 // 5 5 bit synchronizer enabled (default)
287 #define SX127X_OOK_THRESH_FIXED 0b00000000 // 4 3 OOK threshold type: fixed value
288 #define SX127X_OOK_THRESH_PEAK 0b00001000 // 4 3 peak mode (default)
289 #define SX127X_OOK_THRESH_AVERAGE 0b00010000 // 4 3 average mode
290 #define SX127X_OOK_PEAK_THRESH_STEP_0_5_DB 0b00000000 // 2 0 OOK demodulator step size: 0.5 dB (default)
291 #define SX127X_OOK_PEAK_THRESH_STEP_1_0_DB 0b00000001 // 2 0 1.0 dB
292 #define SX127X_OOK_PEAK_THRESH_STEP_1_5_DB 0b00000010 // 2 0 1.5 dB
293 #define SX127X_OOK_PEAK_THRESH_STEP_2_0_DB 0b00000011 // 2 0 2.0 dB
294 #define SX127X_OOK_PEAK_THRESH_STEP_3_0_DB 0b00000100 // 2 0 3.0 dB
295 #define SX127X_OOK_PEAK_THRESH_STEP_4_0_DB 0b00000101 // 2 0 4.0 dB
296 #define SX127X_OOK_PEAK_THRESH_STEP_5_0_DB 0b00000110 // 2 0 5.0 dB
297 #define SX127X_OOK_PEAK_THRESH_STEP_6_0_DB 0b00000111 // 2 0 6.0 dB
298 
299 // SX127X_REG_OOK_FIX
300 #define SX127X_OOK_FIXED_THRESHOLD 0x0C // 7 0 default fixed threshold for OOK data slicer
301 
302 // SX127X_REG_OOK_AVG
303 #define SX127X_OOK_PEAK_THRESH_DEC_1_1_CHIP 0b00000000 // 7 5 OOK demodulator step period: once per chip (default)
304 #define SX127X_OOK_PEAK_THRESH_DEC_1_2_CHIP 0b00100000 // 7 5 once every 2 chips
305 #define SX127X_OOK_PEAK_THRESH_DEC_1_4_CHIP 0b01000000 // 7 5 once every 4 chips
306 #define SX127X_OOK_PEAK_THRESH_DEC_1_8_CHIP 0b01100000 // 7 5 once every 8 chips
307 #define SX127X_OOK_PEAK_THRESH_DEC_2_1_CHIP 0b10000000 // 7 5 2 times per chip
308 #define SX127X_OOK_PEAK_THRESH_DEC_4_1_CHIP 0b10100000 // 7 5 4 times per chip
309 #define SX127X_OOK_PEAK_THRESH_DEC_8_1_CHIP 0b11000000 // 7 5 8 times per chip
310 #define SX127X_OOK_PEAK_THRESH_DEC_16_1_CHIP 0b11100000 // 7 5 16 times per chip
311 #define SX127X_OOK_AVERAGE_OFFSET_0_DB 0b00000000 // 3 2 OOK average threshold offset: 0.0 dB (default)
312 #define SX127X_OOK_AVERAGE_OFFSET_2_DB 0b00000100 // 3 2 2.0 dB
313 #define SX127X_OOK_AVERAGE_OFFSET_4_DB 0b00001000 // 3 2 4.0 dB
314 #define SX127X_OOK_AVERAGE_OFFSET_6_DB 0b00001100 // 3 2 6.0 dB
315 #define SX127X_OOK_AVG_THRESH_FILT_32_PI 0b00000000 // 1 0 OOK average filter coefficient: chip rate / 32*pi
316 #define SX127X_OOK_AVG_THRESH_FILT_8_PI 0b00000001 // 1 0 chip rate / 8*pi
317 #define SX127X_OOK_AVG_THRESH_FILT_4_PI 0b00000010 // 1 0 chip rate / 4*pi (default)
318 #define SX127X_OOK_AVG_THRESH_FILT_2_PI 0b00000011 // 1 0 chip rate / 2*pi
319 
320 // SX127X_REG_AFC_FEI
321 #define SX127X_AGC_START 0b00010000 // 4 4 manually start AGC sequence
322 #define SX127X_AFC_CLEAR 0b00000010 // 1 1 manually clear AFC register
323 #define SX127X_AFC_AUTO_CLEAR_OFF 0b00000000 // 0 0 AFC register will not be cleared at the start of AFC (default)
324 #define SX127X_AFC_AUTO_CLEAR_ON 0b00000001 // 0 0 AFC register will be cleared at the start of AFC
325 
326 // SX127X_REG_PREAMBLE_DETECT
327 #define SX127X_PREAMBLE_DETECTOR_OFF 0b00000000 // 7 7 preamble detection disabled
328 #define SX127X_PREAMBLE_DETECTOR_ON 0b10000000 // 7 7 preamble detection enabled (default)
329 #define SX127X_PREAMBLE_DETECTOR_1_BYTE 0b00000000 // 6 5 preamble detection size: 1 byte (default)
330 #define SX127X_PREAMBLE_DETECTOR_2_BYTE 0b00100000 // 6 5 2 bytes
331 #define SX127X_PREAMBLE_DETECTOR_3_BYTE 0b01000000 // 6 5 3 bytes
332 #define SX127X_PREAMBLE_DETECTOR_TOL 0x0A // 4 0 default number of tolerated errors per chip (4 chips per bit)
333 
334 // SX127X_REG_RX_TIMEOUT_1
335 #define SX127X_TIMEOUT_RX_RSSI_OFF 0x00 // 7 0 disable receiver timeout when RSSI interrupt doesn't occur (default)
336 
337 // SX127X_REG_RX_TIMEOUT_2
338 #define SX127X_TIMEOUT_RX_PREAMBLE_OFF 0x00 // 7 0 disable receiver timeout when preamble interrupt doesn't occur (default)
339 
340 // SX127X_REG_RX_TIMEOUT_3
341 #define SX127X_TIMEOUT_SIGNAL_SYNC_OFF 0x00 // 7 0 disable receiver timeout when sync address interrupt doesn't occur (default)
342 
343 // SX127X_REG_OSC
344 #define SX127X_RC_CAL_START 0b00000000 // 3 3 manually start RC oscillator calibration
345 #define SX127X_CLK_OUT_FXOSC 0b00000000 // 2 0 ClkOut frequency: F(XOSC)
346 #define SX127X_CLK_OUT_FXOSC_2 0b00000001 // 2 0 F(XOSC) / 2
347 #define SX127X_CLK_OUT_FXOSC_4 0b00000010 // 2 0 F(XOSC) / 4
348 #define SX127X_CLK_OUT_FXOSC_8 0b00000011 // 2 0 F(XOSC) / 8
349 #define SX127X_CLK_OUT_FXOSC_16 0b00000100 // 2 0 F(XOSC) / 16
350 #define SX127X_CLK_OUT_FXOSC_32 0b00000101 // 2 0 F(XOSC) / 32
351 #define SX127X_CLK_OUT_RC 0b00000110 // 2 0 RC
352 #define SX127X_CLK_OUT_OFF 0b00000111 // 2 0 disabled (default)
353 
354 // SX127X_REG_PREAMBLE_MSB_FSK + SX127X_REG_PREAMBLE_LSB_FSK
355 #define SX127X_PREAMBLE_SIZE_MSB 0x00 // 7 0 preamble size in bytes
356 #define SX127X_PREAMBLE_SIZE_LSB 0x03 // 7 0 default value: 3 bytes
357 
358 // SX127X_REG_SYNC_CONFIG
359 #define SX127X_AUTO_RESTART_RX_MODE_OFF 0b00000000 // 7 6 Rx mode restart after packet reception: disabled
360 #define SX127X_AUTO_RESTART_RX_MODE_NO_PLL 0b01000000 // 7 6 enabled, don't wait for PLL lock
361 #define SX127X_AUTO_RESTART_RX_MODE_PLL 0b10000000 // 7 6 enabled, wait for PLL lock (default)
362 #define SX127X_PREAMBLE_POLARITY_AA 0b00000000 // 5 5 preamble polarity: 0xAA = 0b10101010 (default)
363 #define SX127X_PREAMBLE_POLARITY_55 0b00100000 // 5 5 0x55 = 0b01010101
364 #define SX127X_SYNC_OFF 0b00000000 // 4 4 sync word disabled
365 #define SX127X_SYNC_ON 0b00010000 // 4 4 sync word enabled (default)
366 #define SX127X_SYNC_SIZE 0x03 // 2 0 sync word size in bytes, SyncSize = SYNC_SIZE + 1 bytes
367 
368 // SX127X_REG_SYNC_VALUE_1 - SX127X_REG_SYNC_VALUE_8
369 #define SX127X_SYNC_VALUE_1 0x01 // 7 0 sync word: 1st byte (MSB)
370 #define SX127X_SYNC_VALUE_2 0x01 // 7 0 2nd byte
371 #define SX127X_SYNC_VALUE_3 0x01 // 7 0 3rd byte
372 #define SX127X_SYNC_VALUE_4 0x01 // 7 0 4th byte
373 #define SX127X_SYNC_VALUE_5 0x01 // 7 0 5th byte
374 #define SX127X_SYNC_VALUE_6 0x01 // 7 0 6th byte
375 #define SX127X_SYNC_VALUE_7 0x01 // 7 0 7th byte
376 #define SX127X_SYNC_VALUE_8 0x01 // 7 0 8th byte (LSB)
377 
378 // SX127X_REG_PACKET_CONFIG_1
379 #define SX127X_PACKET_FIXED 0b00000000 // 7 7 packet format: fixed length
380 #define SX127X_PACKET_VARIABLE 0b10000000 // 7 7 variable length (default)
381 #define SX127X_DC_FREE_NONE 0b00000000 // 6 5 DC-free encoding: disabled (default)
382 #define SX127X_DC_FREE_MANCHESTER 0b00100000 // 6 5 Manchester
383 #define SX127X_DC_FREE_WHITENING 0b01000000 // 6 5 Whitening
384 #define SX127X_CRC_OFF 0b00000000 // 4 4 CRC disabled
385 #define SX127X_CRC_ON 0b00010000 // 4 4 CRC enabled (default)
386 #define SX127X_CRC_AUTOCLEAR_OFF 0b00001000 // 3 3 keep FIFO on CRC mismatch, issue payload ready interrupt
387 #define SX127X_CRC_AUTOCLEAR_ON 0b00000000 // 3 3 clear FIFO on CRC mismatch, do not issue payload ready interrupt
388 #define SX127X_ADDRESS_FILTERING_OFF 0b00000000 // 2 1 address filtering: none (default)
389 #define SX127X_ADDRESS_FILTERING_NODE 0b00000010 // 2 1 node
390 #define SX127X_ADDRESS_FILTERING_NODE_BROADCAST 0b00000100 // 2 1 node or broadcast
391 #define SX127X_CRC_WHITENING_TYPE_CCITT 0b00000000 // 0 0 CRC and whitening algorithms: CCITT CRC with standard whitening (default)
392 #define SX127X_CRC_WHITENING_TYPE_IBM 0b00000001 // 0 0 IBM CRC with alternate whitening
393 
394 // SX127X_REG_PACKET_CONFIG_2
395 #define SX127X_DATA_MODE_PACKET 0b01000000 // 6 6 data mode: packet (default)
396 #define SX127X_DATA_MODE_CONTINUOUS 0b00000000 // 6 6 continuous
397 #define SX127X_IO_HOME_OFF 0b00000000 // 5 5 io-homecontrol compatibility disabled (default)
398 #define SX127X_IO_HOME_ON 0b00100000 // 5 5 io-homecontrol compatibility enabled
399 
400 // SX127X_REG_FIFO_THRESH
401 #define SX127X_TX_START_FIFO_LEVEL 0b00000000 // 7 7 start packet transmission when: number of bytes in FIFO exceeds FIFO_THRESHOLD
402 #define SX127X_TX_START_FIFO_NOT_EMPTY 0b10000000 // 7 7 at least one byte in FIFO (default)
403 #define SX127X_FIFO_THRESH 0x0F // 5 0 FIFO level threshold
404 
405 // SX127X_REG_SEQ_CONFIG_1
406 #define SX127X_SEQUENCER_START 0b10000000 // 7 7 manually start sequencer
407 #define SX127X_SEQUENCER_STOP 0b01000000 // 6 6 manually stop sequencer
408 #define SX127X_IDLE_MODE_STANDBY 0b00000000 // 5 5 chip mode during sequencer idle mode: standby (default)
409 #define SX127X_IDLE_MODE_SLEEP 0b00100000 // 5 5 sleep
410 #define SX127X_FROM_START_LP_SELECTION 0b00000000 // 4 3 mode that will be set after starting sequencer: low power selection (default)
411 #define SX127X_FROM_START_RECEIVE 0b00001000 // 4 3 receive
412 #define SX127X_FROM_START_TRANSMIT 0b00010000 // 4 3 transmit
413 #define SX127X_FROM_START_TRANSMIT_FIFO_LEVEL 0b00011000 // 4 3 transmit on a FIFO level interrupt
414 #define SX127X_LP_SELECTION_SEQ_OFF 0b00000000 // 2 2 mode that will be set after exiting low power selection: sequencer off (default)
415 #define SX127X_LP_SELECTION_IDLE 0b00000100 // 2 2 idle state
416 #define SX127X_FROM_IDLE_TRANSMIT 0b00000000 // 1 1 mode that will be set after exiting idle mode: transmit (default)
417 #define SX127X_FROM_IDLE_RECEIVE 0b00000010 // 1 1 receive
418 #define SX127X_FROM_TRANSMIT_LP_SELECTION 0b00000000 // 0 0 mode that will be set after exiting transmit mode: low power selection (default)
419 #define SX127X_FROM_TRANSMIT_RECEIVE 0b00000001 // 0 0 receive
420 
421 // SX127X_REG_SEQ_CONFIG_2
422 #define SX127X_FROM_RECEIVE_PACKET_RECEIVED_PAYLOAD 0b00100000 // 7 5 mode that will be set after exiting receive mode: packet received on payload ready interrupt (default)
423 #define SX127X_FROM_RECEIVE_LP_SELECTION 0b01000000 // 7 5 low power selection
424 #define SX127X_FROM_RECEIVE_PACKET_RECEIVED_CRC_OK 0b01100000 // 7 5 packet received on CRC OK interrupt
425 #define SX127X_FROM_RECEIVE_SEQ_OFF_RSSI 0b10000000 // 7 5 sequencer off on RSSI interrupt
426 #define SX127X_FROM_RECEIVE_SEQ_OFF_SYNC_ADDR 0b10100000 // 7 5 sequencer off on sync address interrupt
427 #define SX127X_FROM_RECEIVE_SEQ_OFF_PREAMBLE_DETECT 0b11000000 // 7 5 sequencer off on preamble detect interrupt
428 #define SX127X_FROM_RX_TIMEOUT_RECEIVE 0b00000000 // 4 3 mode that will be set after Rx timeout: receive (default)
429 #define SX127X_FROM_RX_TIMEOUT_TRANSMIT 0b00001000 // 4 3 transmit
430 #define SX127X_FROM_RX_TIMEOUT_LP_SELECTION 0b00010000 // 4 3 low power selection
431 #define SX127X_FROM_RX_TIMEOUT_SEQ_OFF 0b00011000 // 4 3 sequencer off
432 #define SX127X_FROM_PACKET_RECEIVED_SEQ_OFF 0b00000000 // 2 0 mode that will be set after packet received: sequencer off (default)
433 #define SX127X_FROM_PACKET_RECEIVED_TRANSMIT 0b00000001 // 2 0 transmit
434 #define SX127X_FROM_PACKET_RECEIVED_LP_SELECTION 0b00000010 // 2 0 low power selection
435 #define SX127X_FROM_PACKET_RECEIVED_RECEIVE_FS 0b00000011 // 2 0 receive via FS
436 #define SX127X_FROM_PACKET_RECEIVED_RECEIVE 0b00000100 // 2 0 receive
437 
438 // SX127X_REG_TIMER_RESOL
439 #define SX127X_TIMER1_OFF 0b00000000 // 3 2 timer 1 resolution: disabled (default)
440 #define SX127X_TIMER1_RESOLUTION_64_US 0b00000100 // 3 2 64 us
441 #define SX127X_TIMER1_RESOLUTION_4_1_MS 0b00001000 // 3 2 4.1 ms
442 #define SX127X_TIMER1_RESOLUTION_262_MS 0b00001100 // 3 2 262 ms
443 #define SX127X_TIMER2_OFF 0b00000000 // 3 2 timer 2 resolution: disabled (default)
444 #define SX127X_TIMER2_RESOLUTION_64_US 0b00000001 // 3 2 64 us
445 #define SX127X_TIMER2_RESOLUTION_4_1_MS 0b00000010 // 3 2 4.1 ms
446 #define SX127X_TIMER2_RESOLUTION_262_MS 0b00000011 // 3 2 262 ms
447 
448 // SX127X_REG_TIMER1_COEF
449 #define SX127X_TIMER1_COEFFICIENT 0xF5 // 7 0 multiplication coefficient for timer 1
450 
451 // SX127X_REG_TIMER2_COEF
452 #define SX127X_TIMER2_COEFFICIENT 0x20 // 7 0 multiplication coefficient for timer 2
453 
454 // SX127X_REG_IMAGE_CAL
455 #define SX127X_AUTO_IMAGE_CAL_OFF 0b00000000 // 7 7 temperature calibration disabled (default)
456 #define SX127X_AUTO_IMAGE_CAL_ON 0b10000000 // 7 7 temperature calibration enabled
457 #define SX127X_IMAGE_CAL_START 0b01000000 // 6 6 start temperature calibration
458 #define SX127X_IMAGE_CAL_RUNNING 0b00100000 // 5 5 temperature calibration is on-going
459 #define SX127X_IMAGE_CAL_COMPLETE 0b00000000 // 5 5 temperature calibration finished
460 #define SX127X_TEMP_CHANGED 0b00001000 // 3 3 temperature changed more than TEMP_THRESHOLD since last calibration
461 #define SX127X_TEMP_THRESHOLD_5_DEG_C 0b00000000 // 2 1 temperature change threshold: 5 deg. C
462 #define SX127X_TEMP_THRESHOLD_10_DEG_C 0b00000010 // 2 1 10 deg. C (default)
463 #define SX127X_TEMP_THRESHOLD_15_DEG_C 0b00000100 // 2 1 15 deg. C
464 #define SX127X_TEMP_THRESHOLD_20_DEG_C 0b00000110 // 2 1 20 deg. C
465 #define SX127X_TEMP_MONITOR_ON 0b00000000 // 0 0 temperature monitoring enabled (default)
466 #define SX127X_TEMP_MONITOR_OFF 0b00000001 // 0 0 temperature monitoring disabled
467 
468 // SX127X_REG_LOW_BAT
469 #define SX127X_LOW_BAT_OFF 0b00000000 // 3 3 low battery detector disabled
470 #define SX127X_LOW_BAT_ON 0b00001000 // 3 3 low battery detector enabled
471 #define SX127X_LOW_BAT_TRIM_1_695_V 0b00000000 // 2 0 battery voltage threshold: 1.695 V
472 #define SX127X_LOW_BAT_TRIM_1_764_V 0b00000001 // 2 0 1.764 V
473 #define SX127X_LOW_BAT_TRIM_1_835_V 0b00000010 // 2 0 1.835 V (default)
474 #define SX127X_LOW_BAT_TRIM_1_905_V 0b00000011 // 2 0 1.905 V
475 #define SX127X_LOW_BAT_TRIM_1_976_V 0b00000100 // 2 0 1.976 V
476 #define SX127X_LOW_BAT_TRIM_2_045_V 0b00000101 // 2 0 2.045 V
477 #define SX127X_LOW_BAT_TRIM_2_116_V 0b00000110 // 2 0 2.116 V
478 #define SX127X_LOW_BAT_TRIM_2_185_V 0b00000111 // 2 0 2.185 V
479 
480 // SX127X_REG_IRQ_FLAGS_1
481 #define SX127X_FLAG_MODE_READY 0b10000000 // 7 7 requested mode is ready
482 #define SX127X_FLAG_RX_READY 0b01000000 // 6 6 reception ready (after RSSI, AGC, AFC)
483 #define SX127X_FLAG_TX_READY 0b00100000 // 5 5 transmission ready (after PA ramp-up)
484 #define SX127X_FLAG_PLL_LOCK 0b00010000 // 4 4 PLL locked
485 #define SX127X_FLAG_RSSI 0b00001000 // 3 3 RSSI value exceeds RSSI threshold
486 #define SX127X_FLAG_TIMEOUT 0b00000100 // 2 2 timeout occurred
487 #define SX127X_FLAG_PREAMBLE_DETECT 0b00000010 // 1 1 valid preamble was detected
488 #define SX127X_FLAG_SYNC_ADDRESS_MATCH 0b00000001 // 0 0 sync address matched
489 
490 // SX127X_REG_IRQ_FLAGS_2
491 #define SX127X_FLAG_FIFO_FULL 0b10000000 // 7 7 FIFO is full
492 #define SX127X_FLAG_FIFO_EMPTY 0b01000000 // 6 6 FIFO is empty
493 #define SX127X_FLAG_FIFO_LEVEL 0b00100000 // 5 5 number of bytes in FIFO exceeds FIFO_THRESHOLD
494 #define SX127X_FLAG_FIFO_OVERRUN 0b00010000 // 4 4 FIFO overrun occurred
495 #define SX127X_FLAG_PACKET_SENT 0b00001000 // 3 3 packet was successfully sent
496 #define SX127X_FLAG_PAYLOAD_READY 0b00000100 // 2 2 packet was successfully received
497 #define SX127X_FLAG_CRC_OK 0b00000010 // 1 1 CRC check passed
498 #define SX127X_FLAG_LOW_BAT 0b00000001 // 0 0 battery voltage dropped below threshold
499 
500 // SX127X_REG_DIO_MAPPING_1
501 #define SX127X_DIO0_CONT_SYNC_ADDRESS 0b00000000 // 7 6
502 #define SX127X_DIO0_CONT_TX_READY 0b00000000 // 7 6
503 #define SX127X_DIO0_CONT_RSSI_PREAMBLE_DETECTED 0b01000000 // 7 6
504 #define SX127X_DIO0_CONT_RX_READY 0b10000000 // 7 6
505 #define SX127X_DIO0_PACK_PAYLOAD_READY 0b00000000 // 7 6
506 #define SX127X_DIO0_PACK_PACKET_SENT 0b00000000 // 7 6
507 #define SX127X_DIO0_PACK_CRC_OK 0b01000000 // 7 6
508 #define SX127X_DIO0_PACK_TEMP_CHANGE_LOW_BAT 0b11000000 // 7 6
509 #define SX127X_DIO1_CONT_DCLK 0b00000000 // 5 4
510 #define SX127X_DIO1_CONT_RSSI_PREAMBLE_DETECTED 0b00010000 // 5 4
511 #define SX127X_DIO1_PACK_FIFO_LEVEL 0b00000000 // 5 4
512 #define SX127X_DIO1_PACK_FIFO_EMPTY 0b00010000 // 5 4
513 #define SX127X_DIO1_PACK_FIFO_FULL 0b00100000 // 5 4
514 #define SX127X_DIO2_CONT_DATA 0b00000000 // 3 2
515 
516 // SX1272_REG_PLL_HOP + SX1278_REG_PLL_HOP
517 #define SX127X_FAST_HOP_OFF 0b00000000 // 7 7 carrier frequency validated when FRF registers are written
518 #define SX127X_FAST_HOP_ON 0b10000000 // 7 7 carrier frequency validated when FS modes are requested
519 
520 // SX1272_REG_TCXO + SX1278_REG_TCXO
521 #define SX127X_TCXO_INPUT_EXTERNAL 0b00000000 // 4 4 use external crystal oscillator
522 #define SX127X_TCXO_INPUT_EXTERNAL_CLIPPED 0b00010000 // 4 4 use external crystal oscillator clipped sine connected to XTA pin
523 
524 // SX1272_REG_PLL + SX1278_REG_PLL
525 #define SX127X_PLL_BANDWIDTH_75_KHZ 0b00000000 // 7 6 PLL bandwidth: 75 kHz
526 #define SX127X_PLL_BANDWIDTH_150_KHZ 0b01000000 // 7 6 150 kHz
527 #define SX127X_PLL_BANDWIDTH_225_KHZ 0b10000000 // 7 6 225 kHz
528 #define SX127X_PLL_BANDWIDTH_300_KHZ 0b11000000 // 7 6 300 kHz (default)
529 
536 class SX127x: public PhysicalLayer {
537  public:
538  // introduce PhysicalLayer overloads
539  using PhysicalLayer::transmit;
540  using PhysicalLayer::receive;
541  using PhysicalLayer::startTransmit;
542  using PhysicalLayer::readData;
543 
544  // constructor
545 
551  SX127x(Module* mod);
552 
553  // basic methods
554 
566  int16_t begin(uint8_t chipVersion, uint8_t syncWord, uint16_t preambleLength);
567 
571  virtual void reset() = 0;
572 
590  int16_t beginFSK(uint8_t chipVersion, float br, float freqDev, float rxBw, uint16_t preambleLength, bool enableOOK);
591 
604  int16_t transmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
605 
616  int16_t receive(uint8_t* data, size_t len) override;
617 
623  int16_t scanChannel();
624 
631  int16_t sleep();
632 
638  int16_t standby() override;
639 
648  int16_t transmitDirect(uint32_t frf = 0) override;
649 
656  int16_t receiveDirect() override;
657 
663  int16_t packetMode();
664 
665  // interrupt methods
666 
672  void setDio0Action(void (*func)(void));
673 
677  void clearDio0Action();
678 
684  void setDio1Action(void (*func)(void));
685 
689  void clearDio1Action();
690 
702  int16_t startTransmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
703 
713  int16_t startReceive(uint8_t len = 0, uint8_t mode = SX127X_RXCONTINUOUS);
714 
724  int16_t readData(uint8_t* data, size_t len) override;
725 
726 
727  // configuration methods
728 
736  int16_t setSyncWord(uint8_t syncWord);
737 
745  int16_t setCurrentLimit(uint8_t currentLimit);
746 
754  int16_t setPreambleLength(uint16_t preambleLength);
755 
763  float getFrequencyError(bool autoCorrect = false);
764 
770  float getSNR();
771 
777  float getDataRate() const;
778 
786  int16_t setBitRate(float br);
787 
795  int16_t setFrequencyDeviation(float freqDev) override;
796 
804  int16_t setRxBandwidth(float rxBw);
805 
815  int16_t setSyncWord(uint8_t* syncWord, size_t len);
816 
824  int16_t setNodeAddress(uint8_t nodeAddr);
825 
833  int16_t setBroadcastAddress(uint8_t broadAddr);
834 
840  int16_t disableAddressFiltering();
841 
849  int16_t setOOK(bool enableOOK);
850 
858  size_t getPacketLength(bool update = true) override;
859 
867  int16_t fixedPacketLengthMode(uint8_t len = SX127X_MAX_PACKET_LENGTH_FSK);
868 
876  int16_t variablePacketLengthMode(uint8_t maxLen = SX127X_MAX_PACKET_LENGTH_FSK);
877 
888  int16_t setRSSIConfig(uint8_t smoothingSamples, int8_t offset = 0);
889 
898  int16_t setEncoding(uint8_t encoding) override;
899 
907  uint16_t getIRQFlags();
908 
914  uint8_t getModemStatus();
915 
922  int8_t getTempRaw();
923 
932  void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn);
933 
939  uint8_t random();
940 
946  int16_t getChipVersion();
947 
948 #ifndef RADIOLIB_GODMODE
949  protected:
950 #endif
951  Module* _mod;
952 
953  float _freq = 0;
954  float _bw = 0;
955  uint8_t _sf = 0;
956  uint8_t _cr = 0;
957  float _br = 0;
958  float _rxBw = 0;
959  bool _ook = false;
960  bool _crcEnabled = false;
961 
962  int16_t setFrequencyRaw(float newFreq);
963  int16_t config();
964  int16_t configFSK();
965  int16_t getActiveModem();
966  int16_t directMode();
967  int16_t setPacketMode(uint8_t mode, uint8_t len);
968 
969 #ifndef RADIOLIB_GODMODE
970  private:
971 #endif
972  float _dataRate = 0;
973  size_t _packetLength = 0;
974  bool _packetLengthQueried = false; // FSK packet length is the first byte in FIFO, length can only be queried once
975  uint8_t _packetLengthConfig = SX127X_PACKET_VARIABLE;
976 
977  bool findChip(uint8_t ver);
978  int16_t setMode(uint8_t mode);
979  int16_t setActiveModem(uint8_t modem);
980  void clearIRQFlags();
981  void clearFIFO(size_t count); // used mostly to clear remaining bytes in FIFO after a packet read
982 };
983 
984 #endif
985 
986 #endif
SX127x::setRSSIConfig
int16_t setRSSIConfig(uint8_t smoothingSamples, int8_t offset=0)
Sets RSSI measurement configuration in FSK mode.
Definition: SX127x.cpp:895
SX127x
Base class for SX127x series. All derived classes for SX127x (e.g. SX1278 or SX1272) inherit from thi...
Definition: SX127x.h:536
-
SX127x::getPacketLength
size_t getPacketLength(bool update=true) override
Query modem for the packet length of received payload.
Definition: SX127x.cpp:861
-
SX127x::readData
int16_t readData(uint8_t *data, size_t len) override
Reads data that was received after calling startReceive method. This method reads len characters...
Definition: SX127x.cpp:480
-
SX127x::transmitDirect
int16_t transmitDirect(uint32_t frf=0) override
Enables direct transmission mode on pins DIO1 (clock) and DIO2 (data). While in direct mode...
Definition: SX127x.cpp:288
-
SX127x::random
uint8_t random()
Get one truly random byte from RSSI noise.
Definition: SX127x.cpp:968
+
SX127x::getPacketLength
size_t getPacketLength(bool update=true) override
Query modem for the packet length of received payload.
Definition: SX127x.cpp:859
+
SX127x::readData
int16_t readData(uint8_t *data, size_t len) override
Reads data that was received after calling startReceive method. This method reads len characters...
Definition: SX127x.cpp:478
+
SX127x::transmitDirect
int16_t transmitDirect(uint32_t frf=0) override
Enables direct transmission mode on pins DIO1 (clock) and DIO2 (data). While in direct mode...
Definition: SX127x.cpp:286
+
SX127x::random
uint8_t random()
Get one truly random byte from RSSI noise.
Definition: SX127x.cpp:966
PhysicalLayer::startTransmit
int16_t startTransmit(String &str, uint8_t addr=0)
Interrupt-driven Arduino String transmit method. Unlike the standard transmit method, this one is non-blocking. Interrupt pin will be activated when transmission finishes.
Definition: PhysicalLayer.cpp:49
-
SX127x::clearDio0Action
void clearDio0Action()
Clears interrupt service routine to call when DIO0 activates.
Definition: SX127x.cpp:401
+
SX127x::clearDio0Action
void clearDio0Action()
Clears interrupt service routine to call when DIO0 activates.
Definition: SX127x.cpp:399
SX127x::reset
virtual void reset()=0
Reset method. Will reset the chip to the default state using RST pin. Declared pure virtual since SX1...
-
SX127x::setNodeAddress
int16_t setNodeAddress(uint8_t nodeAddr)
Sets FSK node address. Calling this method will enable address filtering. Only available in FSK mode...
Definition: SX127x.cpp:781
-
SX127x::receive
int16_t receive(uint8_t *data, size_t len) override
Binary receive method. Will attempt to receive arbitrary binary data up to 255 bytes long using LoRa ...
Definition: SX127x.cpp:188
-
SX127x::transmit
int16_t transmit(uint8_t *data, size_t len, uint8_t addr=0) override
Binary transmit method. Will transmit arbitrary binary data up to 255 bytes long using LoRa or up to ...
Definition: SX127x.cpp:121
-
SX127x::getSNR
float getSNR()
Gets signal-to-noise ratio of the latest received packet.
Definition: SX127x.cpp:655
-
SX127x::setSyncWord
int16_t setSyncWord(uint8_t syncWord)
Sets LoRa sync word. Only available in LoRa mode.
Definition: SX127x.cpp:537
-
SX127x::setBitRate
int16_t setBitRate(float br)
Sets FSK bit rate. Allowed values range from 1.2 to 300 kbps. Only available in FSK mode...
Definition: SX127x.cpp:670
-
SX127x::setOOK
int16_t setOOK(bool enableOOK)
Enables/disables OOK modulation instead of FSK.
Definition: SX127x.cpp:827
-
SX127x::getFrequencyError
float getFrequencyError(bool autoCorrect=false)
Gets frequency error of the latest received packet.
Definition: SX127x.cpp:602
-
SX127x::startTransmit
int16_t startTransmit(uint8_t *data, size_t len, uint8_t addr=0) override
Interrupt-driven binary transmit method. Will start transmitting arbitrary binary data up to 255 byte...
Definition: SX127x.cpp:419
-
SX127x::getModemStatus
uint8_t getModemStatus()
Reads modem status. Only available in LoRa mode.
Definition: SX127x.cpp:954
-
SX127x::setCurrentLimit
int16_t setCurrentLimit(uint8_t currentLimit)
Sets current limit for over current protection at transmitter amplifier. Allowed values range from 45...
Definition: SX127x.cpp:550
-
SX127x::sleep
int16_t sleep()
Sets the LoRa module to sleep to save power. Module will not be able to transmit or receive any data ...
Definition: SX127x.cpp:272
-
SX127x::startReceive
int16_t startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)
Interrupt-driven receive method. DIO0 will be activated when full valid packet is received...
Definition: SX127x.cpp:353
-
SX127x::setDio0Action
void setDio0Action(void(*func)(void))
Set interrupt service routine function to call when DIO0 activates.
Definition: SX127x.cpp:397
-
SX127x::clearDio1Action
void clearDio1Action()
Clears interrupt service routine to call when DIO1 activates.
Definition: SX127x.cpp:412
-
SX127x::getChipVersion
int16_t getChipVersion()
Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if ...
Definition: SX127x.cpp:993
+
SX127x::setNodeAddress
int16_t setNodeAddress(uint8_t nodeAddr)
Sets FSK node address. Calling this method will enable address filtering. Only available in FSK mode...
Definition: SX127x.cpp:779
+
SX127x::receive
int16_t receive(uint8_t *data, size_t len) override
Binary receive method. Will attempt to receive arbitrary binary data up to 255 bytes long using LoRa ...
Definition: SX127x.cpp:186
+
SX127x::transmit
int16_t transmit(uint8_t *data, size_t len, uint8_t addr=0) override
Binary transmit method. Will transmit arbitrary binary data up to 255 bytes long using LoRa or up to ...
Definition: SX127x.cpp:119
+
SX127x::getSNR
float getSNR()
Gets signal-to-noise ratio of the latest received packet.
Definition: SX127x.cpp:653
+
SX127x::setSyncWord
int16_t setSyncWord(uint8_t syncWord)
Sets LoRa sync word. Only available in LoRa mode.
Definition: SX127x.cpp:535
+
SX127x::setBitRate
int16_t setBitRate(float br)
Sets FSK bit rate. Allowed values range from 1.2 to 300 kbps. Only available in FSK mode...
Definition: SX127x.cpp:668
+
SX127x::setOOK
int16_t setOOK(bool enableOOK)
Enables/disables OOK modulation instead of FSK.
Definition: SX127x.cpp:825
+
SX127x::getFrequencyError
float getFrequencyError(bool autoCorrect=false)
Gets frequency error of the latest received packet.
Definition: SX127x.cpp:600
+
SX127x::startTransmit
int16_t startTransmit(uint8_t *data, size_t len, uint8_t addr=0) override
Interrupt-driven binary transmit method. Will start transmitting arbitrary binary data up to 255 byte...
Definition: SX127x.cpp:417
+
SX127x::getModemStatus
uint8_t getModemStatus()
Reads modem status. Only available in LoRa mode.
Definition: SX127x.cpp:952
+
SX127x::setCurrentLimit
int16_t setCurrentLimit(uint8_t currentLimit)
Sets current limit for over current protection at transmitter amplifier. Allowed values range from 45...
Definition: SX127x.cpp:548
+
SX127x::sleep
int16_t sleep()
Sets the LoRa module to sleep to save power. Module will not be able to transmit or receive any data ...
Definition: SX127x.cpp:270
+
SX127x::startReceive
int16_t startReceive(uint8_t len=0, uint8_t mode=SX127X_RXCONTINUOUS)
Interrupt-driven receive method. DIO0 will be activated when full valid packet is received...
Definition: SX127x.cpp:351
+
SX127x::setDio0Action
void setDio0Action(void(*func)(void))
Set interrupt service routine function to call when DIO0 activates.
Definition: SX127x.cpp:395
+
SX127x::clearDio1Action
void clearDio1Action()
Clears interrupt service routine to call when DIO1 activates.
Definition: SX127x.cpp:410
+
SX127x::getChipVersion
int16_t getChipVersion()
Read version SPI register. Should return SX1278_CHIP_VERSION (0x12) or SX1272_CHIP_VERSION (0x22) if ...
Definition: SX127x.cpp:991
Module
Implements all common low-level SPI/UART/I2C methods to control the wireless module. Every module class contains one private instance of this class.
Definition: Module.h:17
PhysicalLayer::transmit
int16_t transmit(__FlashStringHelper *fstr, uint8_t addr=0)
Arduino Flash String transmit method.
Definition: PhysicalLayer.cpp:8
-
SX127x::receiveDirect
int16_t receiveDirect() override
Enables direct reception mode on pins DIO1 (clock) and DIO2 (data). While in direct mode...
Definition: SX127x.cpp:314
-
SX127x::setEncoding
int16_t setEncoding(uint8_t encoding) override
Sets transmission encoding. Only available in FSK mode. Allowed values are RADIOLIB_ENCODING_NRZ, RADIOLIB_ENCODING_MANCHESTER and RADIOLIB_ENCODING_WHITENING.
Definition: SX127x.cpp:920
-
SX127x::variablePacketLengthMode
int16_t variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)
Set modem in variable packet length mode. Available in FSK mode only.
Definition: SX127x.cpp:893
-
SX127x::setFrequencyDeviation
int16_t setFrequencyDeviation(float freqDev) override
Sets FSK frequency deviation from carrier frequency. Allowed values depend on bit rate setting and mu...
Definition: SX127x.cpp:699
-
SX127x::standby
int16_t standby() override
Sets the LoRa module to standby.
Definition: SX127x.cpp:280
+
SX127x::receiveDirect
int16_t receiveDirect() override
Enables direct reception mode on pins DIO1 (clock) and DIO2 (data). While in direct mode...
Definition: SX127x.cpp:312
+
SX127x::setEncoding
int16_t setEncoding(uint8_t encoding) override
Sets transmission encoding. Only available in FSK mode. Allowed values are RADIOLIB_ENCODING_NRZ, RADIOLIB_ENCODING_MANCHESTER and RADIOLIB_ENCODING_WHITENING.
Definition: SX127x.cpp:918
+
SX127x::variablePacketLengthMode
int16_t variablePacketLengthMode(uint8_t maxLen=SX127X_MAX_PACKET_LENGTH_FSK)
Set modem in variable packet length mode. Available in FSK mode only.
Definition: SX127x.cpp:891
+
SX127x::setFrequencyDeviation
int16_t setFrequencyDeviation(float freqDev) override
Sets FSK frequency deviation from carrier frequency. Allowed values depend on bit rate setting and mu...
Definition: SX127x.cpp:697
+
SX127x::standby
int16_t standby() override
Sets the LoRa module to standby.
Definition: SX127x.cpp:278
PhysicalLayer::receive
int16_t receive(String &str, size_t len=0)
Arduino String receive method.
Definition: PhysicalLayer.cpp:98
-
SX127x::setRxBandwidth
int16_t setRxBandwidth(float rxBw)
Sets FSK receiver bandwidth. Allowed values range from 2.6 to 250 kHz. Only available in FSK mode...
Definition: SX127x.cpp:722
-
SX127x::beginFSK
int16_t beginFSK(uint8_t chipVersion, float br, float freqDev, float rxBw, uint16_t preambleLength, bool enableOOK)
Initialization method for FSK modem. Will be called with appropriate parameters when calling FSK init...
Definition: SX127x.cpp:52
-
SX127x::getIRQFlags
uint16_t getIRQFlags()
Reads currently active IRQ flags, can be used to check which event caused an interrupt. In LoRa mode, this is the content of SX127X_REG_IRQ_FLAGS register. In FSK mode, this is the contents of SX127X_REG_IRQ_FLAGS_2 (MSB) and SX127X_REG_IRQ_FLAGS_1 (LSB) registers.
Definition: SX127x.cpp:939
+
SX127x::setRxBandwidth
int16_t setRxBandwidth(float rxBw)
Sets FSK receiver bandwidth. Allowed values range from 2.6 to 250 kHz. Only available in FSK mode...
Definition: SX127x.cpp:720
+
SX127x::beginFSK
int16_t beginFSK(uint8_t chipVersion, float br, float freqDev, float rxBw, uint16_t preambleLength, bool enableOOK)
Initialization method for FSK modem. Will be called with appropriate parameters when calling FSK init...
Definition: SX127x.cpp:51
+
SX127x::getIRQFlags
uint16_t getIRQFlags()
Reads currently active IRQ flags, can be used to check which event caused an interrupt. In LoRa mode, this is the content of SX127X_REG_IRQ_FLAGS register. In FSK mode, this is the contents of SX127X_REG_IRQ_FLAGS_2 (MSB) and SX127X_REG_IRQ_FLAGS_1 (LSB) registers.
Definition: SX127x.cpp:937
PhysicalLayer
Provides common interface for protocols that run on LoRa/FSK modules, such as RTTY or LoRaWAN...
Definition: PhysicalLayer.h:13
-
SX127x::getTempRaw
int8_t getTempRaw()
Reads uncalibrated temperature value. This function will change operating mode and should not be call...
Definition: SX127x.cpp:997
-
SX127x::scanChannel
int16_t scanChannel()
Performs scan for valid LoRa preamble in the current channel.
Definition: SX127x.cpp:233
-
SX127x::setRfSwitchPins
void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)
Some modules contain external RF switch controlled by two pins. This function gives RadioLib control ...
Definition: SX127x.cpp:964
-
SX127x::packetMode
int16_t packetMode()
Disables direct mode and enables packet mode, allowing the module to receive packets. Can only be activated in FSK mode.
Definition: SX127x.cpp:344
-
SX127x::disableAddressFiltering
int16_t disableAddressFiltering()
Disables FSK address filtering.
Definition: SX127x.cpp:809
-
SX127x::setBroadcastAddress
int16_t setBroadcastAddress(uint8_t broadAddr)
Sets FSK broadcast address. Calling this method will enable address filtering. Only available in FSK ...
Definition: SX127x.cpp:795
-
SX127x::setDio1Action
void setDio1Action(void(*func)(void))
Set interrupt service routine function to call when DIO1 activates.
Definition: SX127x.cpp:405
-
SX127x::getDataRate
float getDataRate() const
Get data rate of the latest transmitted packet.
Definition: SX127x.cpp:666
+
SX127x::getTempRaw
int8_t getTempRaw()
Reads uncalibrated temperature value. This function will change operating mode and should not be call...
Definition: SX127x.cpp:995
+
SX127x::scanChannel
int16_t scanChannel()
Performs scan for valid LoRa preamble in the current channel.
Definition: SX127x.cpp:231
+
SX127x::setRfSwitchPins
void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)
Some modules contain external RF switch controlled by two pins. This function gives RadioLib control ...
Definition: SX127x.cpp:962
+
SX127x::packetMode
int16_t packetMode()
Disables direct mode and enables packet mode, allowing the module to receive packets. Can only be activated in FSK mode.
Definition: SX127x.cpp:342
+
SX127x::disableAddressFiltering
int16_t disableAddressFiltering()
Disables FSK address filtering.
Definition: SX127x.cpp:807
+
SX127x::setBroadcastAddress
int16_t setBroadcastAddress(uint8_t broadAddr)
Sets FSK broadcast address. Calling this method will enable address filtering. Only available in FSK ...
Definition: SX127x.cpp:793
+
SX127x::setDio1Action
void setDio1Action(void(*func)(void))
Set interrupt service routine function to call when DIO1 activates.
Definition: SX127x.cpp:403
+
SX127x::getDataRate
float getDataRate() const
Get data rate of the latest transmitted packet.
Definition: SX127x.cpp:664
SX127x::SX127x
SX127x(Module *mod)
Default constructor. Called internally when creating new LoRa instance.
Definition: SX127x.cpp:4
-
SX127x::fixedPacketLengthMode
int16_t fixedPacketLengthMode(uint8_t len=SX127X_MAX_PACKET_LENGTH_FSK)
Set modem in fixed packet length mode. Available in FSK mode only.
Definition: SX127x.cpp:889
+
SX127x::fixedPacketLengthMode
int16_t fixedPacketLengthMode(uint8_t len=SX127X_MAX_PACKET_LENGTH_FSK)
Set modem in fixed packet length mode. Available in FSK mode only.
Definition: SX127x.cpp:887
SX127x::begin
int16_t begin(uint8_t chipVersion, uint8_t syncWord, uint16_t preambleLength)
Initialization method. Will be called with appropriate parameters when calling initialization method ...
Definition: SX127x.cpp:8
PhysicalLayer::readData
int16_t readData(String &str, size_t len=0)
Reads data that was received after calling startReceive method.
Definition: PhysicalLayer.cpp:57
-
SX127x::setPreambleLength
int16_t setPreambleLength(uint16_t preambleLength)
Sets LoRa preamble length. Allowed values range from 6 to 65535. Only available in LoRa mode...
Definition: SX127x.cpp:574
+
SX127x::setPreambleLength
int16_t setPreambleLength(uint16_t preambleLength)
Sets LoRa preamble length. Allowed values range from 6 to 65535. Only available in LoRa mode...
Definition: SX127x.cpp:572
diff --git a/_s_x128x_8h_source.html b/_s_x128x_8h_source.html index e92e48c3..066ceec1 100644 --- a/_s_x128x_8h_source.html +++ b/_s_x128x_8h_source.html @@ -84,54 +84,54 @@ $(document).ready(function(){initNavTree('_s_x128x_8h_source.html','');});
SX128x.h
-
1 #if !defined(_RADIOLIB_SX128X_H)
2 #define _RADIOLIB_SX128X_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SX128X)
7 
8 #include "../../Module.h"
9 
10 #include "../../protocols/PhysicalLayer/PhysicalLayer.h"
11 
12 // SX128X physical layer properties
13 #define SX128X_FREQUENCY_STEP_SIZE 198.3642578
14 #define SX128X_MAX_PACKET_LENGTH 255
15 #define SX128X_CRYSTAL_FREQ 52.0
16 #define SX128X_DIV_EXPONENT 18
17 
18 // SX128X SPI commands
19 #define SX128X_CMD_NOP 0x00
20 #define SX128X_CMD_GET_STATUS 0xC0
21 #define SX128X_CMD_WRITE_REGISTER 0x18
22 #define SX128X_CMD_READ_REGISTER 0x19
23 #define SX128X_CMD_WRITE_BUFFER 0x1A
24 #define SX128X_CMD_READ_BUFFER 0x1B
25 #define SX128X_CMD_SET_SLEEP 0x84
26 #define SX128X_CMD_SET_STANDBY 0x80
27 #define SX128X_CMD_SET_FS 0xC1
28 #define SX128X_CMD_SET_TX 0x83
29 #define SX128X_CMD_SET_RX 0x82
30 #define SX128X_CMD_SET_RX_DUTY_CYCLE 0x94
31 #define SX128X_CMD_SET_CAD 0xC5
32 #define SX128X_CMD_SET_TX_CONTINUOUS_WAVE 0xD1
33 #define SX128X_CMD_SET_TX_CONTINUOUS_PREAMBLE 0xD2
34 #define SX128X_CMD_SET_PACKET_TYPE 0x8A
35 #define SX128X_CMD_GET_PACKET_TYPE 0x03
36 #define SX128X_CMD_SET_RF_FREQUENCY 0x86
37 #define SX128X_CMD_SET_TX_PARAMS 0x8E
38 #define SX128X_CMD_SET_CAD_PARAMS 0x88
39 #define SX128X_CMD_SET_BUFFER_BASE_ADDRESS 0x8F
40 #define SX128X_CMD_SET_MODULATION_PARAMS 0x8B
41 #define SX128X_CMD_SET_PACKET_PARAMS 0x8C
42 #define SX128X_CMD_GET_RX_BUFFER_STATUS 0x17
43 #define SX128X_CMD_GET_PACKET_STATUS 0x1D
44 #define SX128X_CMD_GET_RSSI_INST 0x1F
45 #define SX128X_CMD_SET_DIO_IRQ_PARAMS 0x8D
46 #define SX128X_CMD_GET_IRQ_STATUS 0x15
47 #define SX128X_CMD_CLEAR_IRQ_STATUS 0x97
48 #define SX128X_CMD_SET_REGULATOR_MODE 0x96
49 #define SX128X_CMD_SET_SAVE_CONTEXT 0xD5
50 #define SX128X_CMD_SET_AUTO_TX 0x98
51 #define SX128X_CMD_SET_AUTO_FS 0x9E
52 #define SX128X_CMD_SET_PERF_COUNTER_MODE 0x9C
53 #define SX128X_CMD_SET_LONG_PREAMBLE 0x9B
54 #define SX128X_CMD_SET_UART_SPEED 0x9D
55 #define SX128X_CMD_SET_RANGING_ROLE 0xA3
56 #define SX128X_CMD_SET_ADVANCED_RANGING 0x9A
57 
58 // SX128X register map
59 #define SX128X_REG_SYNC_WORD_1_BYTE_4 0x09CE
60 #define SX128X_REG_SYNC_WORD_1_BYTE_3 0x09CF
61 #define SX128X_REG_SYNC_WORD_1_BYTE_2 0x09D0
62 #define SX128X_REG_SYNC_WORD_1_BYTE_1 0x09D1
63 #define SX128X_REG_SYNC_WORD_1_BYTE_0 0x09D2
64 #define SX128X_REG_SYNC_WORD_2_BYTE_4 0x09D3
65 #define SX128X_REG_SYNC_WORD_2_BYTE_3 0x09D4
66 #define SX128X_REG_SYNC_WORD_2_BYTE_2 0x09D5
67 #define SX128X_REG_SYNC_WORD_2_BYTE_1 0x09D6
68 #define SX128X_REG_SYNC_WORD_2_BYTE_0 0x09D7
69 #define SX128X_REG_SYNC_WORD_3_BYTE_4 0x09D8
70 #define SX128X_REG_SYNC_WORD_3_BYTE_3 0x09D9
71 #define SX128X_REG_SYNC_WORD_3_BYTE_2 0x09DA
72 #define SX128X_REG_SYNC_WORD_3_BYTE_1 0x09DB
73 #define SX128X_REG_SYNC_WORD_3_BYTE_0 0x09DC
74 #define SX128X_REG_CRC_INITIAL_MSB 0x09C8
75 #define SX128X_REG_CRC_INITIAL_LSB 0x09C9
76 #define SX128X_REG_CRC_POLYNOMIAL_MSB 0x09C6
77 #define SX128X_REG_CRC_POLYNOMIAL_LSB 0x09C7
78 #define SX128X_REG_ACCESS_ADDRESS_BYTE_3 (SX128X_REG_SYNC_WORD_1_BYTE_3)
79 #define SX128X_REG_ACCESS_ADDRESS_BYTE_2 (SX128X_REG_SYNC_WORD_1_BYTE_2)
80 #define SX128X_REG_ACCESS_ADDRESS_BYTE_1 (SX128X_REG_SYNC_WORD_1_BYTE_1)
81 #define SX128X_REG_ACCESS_ADDRESS_BYTE_0 (SX128X_REG_SYNC_WORD_1_BYTE_0)
82 #define SX128X_REG_BLE_CRC_INITIAL_MSB 0x09C7
83 #define SX128X_REG_BLE_CRC_INITIAL_MID (SX128X_REG_CRC_INITIAL_MSB)
84 #define SX128X_REG_BLE_CRC_INITIAL_LSB (SX128X_REG_CRC_INITIAL_LSB)
85 #define SX128X_REG_SLAVE_RANGING_ADDRESS_BYTE_3 0x0916
86 #define SX128X_REG_SLAVE_RANGING_ADDRESS_BYTE_2 0x0917
87 #define SX128X_REG_SLAVE_RANGING_ADDRESS_BYTE_1 0x0918
88 #define SX128X_REG_SLAVE_RANGING_ADDRESS_BYTE_0 0x0919
89 #define SX128X_REG_SLAVE_RANGING_ADDRESS_WIDTH 0x0931
90 #define SX128X_REG_MASTER_RANGING_ADDRESS_BYTE_3 0x0912
91 #define SX128X_REG_MASTER_RANGING_ADDRESS_BYTE_2 0x0913
92 #define SX128X_REG_MASTER_RANGING_ADDRESS_BYTE_1 0x0914
93 #define SX128X_REG_MASTER_RANGING_ADDRESS_BYTE_0 0x0915
94 #define SX128X_REG_RANGING_CALIBRATION_MSB 0x092C
95 #define SX128X_REG_RANGING_CALIBRATION_LSB 0x092D
96 #define SX128X_REG_RANGING_RESULT_MSB 0x0961
97 #define SX128X_REG_RANGING_RESULT_MID 0x0962
98 #define SX128X_REG_RANGING_RESULT_LSB 0x0963
99 #define SX128X_REG_MANUAL_GAIN_CONTROL_ENABLE_1 0x089F
100 #define SX128X_REG_MANUAL_GAIN_CONTROL_ENABLE_2 0x0895
101 #define SX128X_REG_MANUAL_GAIN_SETTING 0x089E
102 #define SX128X_REG_GAIN_MODE 0x0891
103 #define SX128X_REG_LORA_FIXED_PAYLOAD_LENGTH 0x0901
104 #define SX128X_REG_LORA_SF_CONFIG 0x0925
105 #define SX128X_REG_FEI_MSB 0x0954
106 #define SX128X_REG_FEI_MID 0x0955
107 #define SX128X_REG_FEI_LSB 0x0956
108 #define SX128X_REG_RANGING_FILTER_WINDOW_SIZE 0x091E
109 #define SX128X_REG_RANGING_FILTER_RSSI_OFFSET 0x0953
110 #define SX128X_REG_RANGING_FILTER_RESET 0x0923
111 #define SX128X_REG_RANGING_LORA_CLOCK_ENABLE 0x097F
112 #define SX128X_REG_RANGING_TYPE 0x0924
113 #define SX128X_REG_RANGING_ADDRESS_SWITCH 0x0927
114 #define SX128X_REG_RANGING_ADDRESS_MSB 0x095F
115 #define SX128X_REG_RANGING_ADDRESS_LSB 0x0960
116 
117 
118 // SX128X SPI command variables
119 //SX128X_CMD_GET_STATUS MSB LSB DESCRIPTION
120 #define SX128X_STATUS_MODE_STDBY_RC 0b01000000 // 7 5 current chip mode: STDBY_RC
121 #define SX128X_STATUS_MODE_STDBY_XOSC 0b01100000 // 7 5 STDBY_XOSC
122 #define SX128X_STATUS_MODE_FS 0b10000000 // 7 5 FS
123 #define SX128X_STATUS_MODE_RX 0b10100000 // 7 5 Rx
124 #define SX128X_STATUS_MODE_TX 0b11000000 // 7 5 Tx
125 #define SX128X_STATUS_CMD_PROCESSED 0b00000100 // 4 2 command status: processing OK
126 #define SX128X_STATUS_DATA_AVAILABLE 0b00001000 // 4 2 data available
127 #define SX128X_STATUS_CMD_TIMEOUT 0b00001100 // 4 2 timeout
128 #define SX128X_STATUS_CMD_ERROR 0b00010000 // 4 2 processing error
129 #define SX128X_STATUS_CMD_FAILED 0b00010100 // 4 2 failed to execute
130 #define SX128X_STATUS_TX_DONE 0b00011000 // 4 2 transmission finished
131 #define SX128X_STATUS_BUSY 0b00000001 // 0 0 chip busy
132 #define SX128X_STATUS_SPI_FAILED 0b11111111 // 7 0 SPI transaction failed
133 
134 //SX128X_CMD_SET_SLEEP
135 #define SX128X_SLEEP_DATA_BUFFER_FLUSH 0b00000000 // 1 1 data buffer behavior in sleep mode: flush
136 #define SX128X_SLEEP_DATA_BUFFER_RETAIN 0b00000010 // 1 1 retain
137 #define SX128X_SLEEP_DATA_RAM_FLUSH 0b00000000 // 0 0 data RAM (configuration) behavior in sleep mode: flush
138 #define SX128X_SLEEP_DATA_RAM_RETAIN 0b00000001 // 0 0 retain
139 
140 //SX128X_CMD_SET_STANDBY
141 #define SX128X_STANDBY_RC 0x00 // 7 0 standby mode: 13 MHz RC oscillator
142 #define SX128X_STANDBY_XOSC 0x01 // 7 0 52 MHz crystal oscillator
143 
144 //SX128X_CMD_SET_TX + SX128X_CMD_SET_RX + SX128X_CMD_SET_RX_DUTY_CYCLE
145 #define SX128X_PERIOD_BASE_15_625_US 0x00 // 7 0 time period step: 15.625 us
146 #define SX128X_PERIOD_BASE_62_5_US 0x01 // 7 0 62.5 us
147 #define SX128X_PERIOD_BASE_1_MS 0x02 // 7 0 1 ms
148 #define SX128X_PERIOD_BASE_4_MS 0x03 // 7 0 4 ms
149 
150 //SX128X_CMD_SET_TX
151 #define SX128X_TX_TIMEOUT_NONE 0x0000 // 15 0 Tx timeout duration: no timeout (Tx single mode)
152 
153 //SX128X_CMD_SET_RX
154 #define SX128X_RX_TIMEOUT_NONE 0x0000 // 15 0 Rx timeout duration: no timeout (Rx single mode)
155 #define SX128X_RX_TIMEOUT_INF 0xFFFF // 15 0 infinite (Rx continuous mode)
156 
157 //SX128X_CMD_SET_PACKET_TYPE
158 #define SX128X_PACKET_TYPE_GFSK 0x00 // 7 0 packet type: (G)FSK
159 #define SX128X_PACKET_TYPE_LORA 0x01 // 7 0 LoRa
160 #define SX128X_PACKET_TYPE_RANGING 0x02 // 7 0 ranging engine
161 #define SX128X_PACKET_TYPE_FLRC 0x03 // 7 0 FLRC
162 #define SX128X_PACKET_TYPE_BLE 0x04 // 7 0 BLE
163 
164 //SX128X_CMD_SET_TX_PARAMS
165 #define SX128X_PA_RAMP_02_US 0x00 // 7 0 PA ramp time: 2 us
166 #define SX128X_PA_RAMP_04_US 0x20 // 7 0 4 us
167 #define SX128X_PA_RAMP_06_US 0x40 // 7 0 6 us
168 #define SX128X_PA_RAMP_08_US 0x60 // 7 0 8 us
169 #define SX128X_PA_RAMP_10_US 0x80 // 7 0 10 us
170 #define SX128X_PA_RAMP_12_US 0xA0 // 7 0 12 us
171 #define SX128X_PA_RAMP_16_US 0xC0 // 7 0 16 us
172 #define SX128X_PA_RAMP_20_US 0xE0 // 7 0 20 us
173 
174 //SX128X_CMD_SET_CAD_PARAMS
175 #define SX128X_CAD_ON_1_SYMB 0x00 // 7 0 number of symbols used for CAD: 1
176 #define SX128X_CAD_ON_2_SYMB 0x20 // 7 0 2
177 #define SX128X_CAD_ON_4_SYMB 0x40 // 7 0 4
178 #define SX128X_CAD_ON_8_SYMB 0x60 // 7 0 8
179 #define SX128X_CAD_ON_16_SYMB 0x80 // 7 0 16
180 
181 //SX128X_CMD_SET_MODULATION_PARAMS
182 #define SX128X_BLE_GFSK_BR_2_000_BW_2_4 0x04 // 7 0 GFSK/BLE bit rate and bandwidth setting: 2.0 Mbps 2.4 MHz
183 #define SX128X_BLE_GFSK_BR_1_600_BW_2_4 0x28 // 7 0 1.6 Mbps 2.4 MHz
184 #define SX128X_BLE_GFSK_BR_1_000_BW_2_4 0x4C // 7 0 1.0 Mbps 2.4 MHz
185 #define SX128X_BLE_GFSK_BR_1_000_BW_1_2 0x45 // 7 0 1.0 Mbps 1.2 MHz
186 #define SX128X_BLE_GFSK_BR_0_800_BW_2_4 0x70 // 7 0 0.8 Mbps 2.4 MHz
187 #define SX128X_BLE_GFSK_BR_0_800_BW_1_2 0x69 // 7 0 0.8 Mbps 1.2 MHz
188 #define SX128X_BLE_GFSK_BR_0_500_BW_1_2 0x8D // 7 0 0.5 Mbps 1.2 MHz
189 #define SX128X_BLE_GFSK_BR_0_500_BW_0_6 0x86 // 7 0 0.5 Mbps 0.6 MHz
190 #define SX128X_BLE_GFSK_BR_0_400_BW_1_2 0xB1 // 7 0 0.4 Mbps 1.2 MHz
191 #define SX128X_BLE_GFSK_BR_0_400_BW_0_6 0xAA // 7 0 0.4 Mbps 0.6 MHz
192 #define SX128X_BLE_GFSK_BR_0_250_BW_0_6 0xCE // 7 0 0.25 Mbps 0.6 MHz
193 #define SX128X_BLE_GFSK_BR_0_250_BW_0_3 0xC7 // 7 0 0.25 Mbps 0.3 MHz
194 #define SX128X_BLE_GFSK_BR_0_125_BW_0_3 0xEF // 7 0 0.125 Mbps 0.3 MHz
195 #define SX128X_BLE_GFSK_MOD_IND_0_35 0x00 // 7 0 GFSK/BLE modulation index: 0.35
196 #define SX128X_BLE_GFSK_MOD_IND_0_50 0x01 // 7 0 0.50
197 #define SX128X_BLE_GFSK_MOD_IND_0_75 0x02 // 7 0 0.75
198 #define SX128X_BLE_GFSK_MOD_IND_1_00 0x03 // 7 0 1.00
199 #define SX128X_BLE_GFSK_MOD_IND_1_25 0x04 // 7 0 1.25
200 #define SX128X_BLE_GFSK_MOD_IND_1_50 0x05 // 7 0 1.50
201 #define SX128X_BLE_GFSK_MOD_IND_1_75 0x06 // 7 0 1.75
202 #define SX128X_BLE_GFSK_MOD_IND_2_00 0x07 // 7 0 2.00
203 #define SX128X_BLE_GFSK_MOD_IND_2_25 0x08 // 7 0 2.25
204 #define SX128X_BLE_GFSK_MOD_IND_2_50 0x09 // 7 0 2.50
205 #define SX128X_BLE_GFSK_MOD_IND_2_75 0x0A // 7 0 2.75
206 #define SX128X_BLE_GFSK_MOD_IND_3_00 0x0B // 7 0 3.00
207 #define SX128X_BLE_GFSK_MOD_IND_3_25 0x0C // 7 0 3.25
208 #define SX128X_BLE_GFSK_MOD_IND_3_50 0x0D // 7 0 3.50
209 #define SX128X_BLE_GFSK_MOD_IND_3_75 0x0E // 7 0 3.75
210 #define SX128X_BLE_GFSK_MOD_IND_4_00 0x0F // 7 0 4.00
211 #define SX128X_BLE_GFSK_BT_OFF 0x00 // 7 0 GFSK Gaussian filter BT product: filter disabled
212 #define SX128X_BLE_GFSK_BT_1_0 0x10 // 7 0 1.0
213 #define SX128X_BLE_GFSK_BT_0_5 0x20 // 7 0 0.5
214 #define SX128X_FLRC_BR_1_300_BW_1_2 0x45 // 7 0 FLRC bit rate and bandwidth setting: 1.3 Mbps 1.2 MHz
215 #define SX128X_FLRC_BR_1_000_BW_1_2 0x69 // 7 0 1.04 Mbps 1.2 MHz
216 #define SX128X_FLRC_BR_0_650_BW_0_6 0x86 // 7 0 0.65 Mbps 0.6 MHz
217 #define SX128X_FLRC_BR_0_520_BW_0_6 0xAA // 7 0 0.52 Mbps 0.6 MHz
218 #define SX128X_FLRC_BR_0_325_BW_0_3 0xC7 // 7 0 0.325 Mbps 0.3 MHz
219 #define SX128X_FLRC_BR_0_260_BW_0_3 0xEB // 7 0 0.260 Mbps 0.3 MHz
220 #define SX128X_FLRC_CR_1_2 0x00 // 7 0 FLRC coding rate: 1/2
221 #define SX128X_FLRC_CR_3_4 0x02 // 7 0 3/4
222 #define SX128X_FLRC_CR_1_0 0x04 // 7 0 1/1
223 #define SX128X_FLRC_BT_OFF 0x00 // 7 0 FLRC Gaussian filter BT product: filter disabled
224 #define SX128X_FLRC_BT_1_0 0x10 // 7 0 1.0
225 #define SX128X_FLRC_BT_0_5 0x20 // 7 0 0.5
226 #define SX128X_LORA_SF_5 0x50 // 7 0 LoRa spreading factor: 5
227 #define SX128X_LORA_SF_6 0x60 // 7 0 6
228 #define SX128X_LORA_SF_7 0x70 // 7 0 7
229 #define SX128X_LORA_SF_8 0x80 // 7 0 8
230 #define SX128X_LORA_SF_9 0x90 // 7 0 9
231 #define SX128X_LORA_SF_10 0xA0 // 7 0 10
232 #define SX128X_LORA_SF_11 0xB0 // 7 0 11
233 #define SX128X_LORA_SF_12 0xC0 // 7 0 12
234 #define SX128X_LORA_BW_1625_00 0x0A // 7 0 LoRa bandwidth: 1625.0 kHz
235 #define SX128X_LORA_BW_812_50 0x18 // 7 0 812.5 kHz
236 #define SX128X_LORA_BW_406_25 0x26 // 7 0 406.25 kHz
237 #define SX128X_LORA_BW_203_125 0x34 // 7 0 203.125 kHz
238 #define SX128X_LORA_CR_4_5 0x01 // 7 0 LoRa coding rate: 4/5
239 #define SX128X_LORA_CR_4_6 0x02 // 7 0 4/6
240 #define SX128X_LORA_CR_4_7 0x03 // 7 0 4/7
241 #define SX128X_LORA_CR_4_8 0x04 // 7 0 4/8
242 #define SX128X_LORA_CR_4_5_LI 0x05 // 7 0 4/5, long interleaving
243 #define SX128X_LORA_CR_4_6_LI 0x06 // 7 0 4/6, long interleaving
244 #define SX128X_LORA_CR_4_7_LI 0x07 // 7 0 4/7, long interleaving
245 
246 //SX128X_CMD_SET_PACKET_PARAMS
247 #define SX128X_GFSK_FLRC_SYNC_WORD_OFF 0x00 // 7 0 GFSK/FLRC sync word used: none
248 #define SX128X_GFSK_FLRC_SYNC_WORD_1 0x10 // 7 0 sync word 1
249 #define SX128X_GFSK_FLRC_SYNC_WORD_2 0x20 // 7 0 sync word 2
250 #define SX128X_GFSK_FLRC_SYNC_WORD_1_2 0x30 // 7 0 sync words 1 and 2
251 #define SX128X_GFSK_FLRC_SYNC_WORD_3 0x40 // 7 0 sync word 3
252 #define SX128X_GFSK_FLRC_SYNC_WORD_1_3 0x50 // 7 0 sync words 1 and 3
253 #define SX128X_GFSK_FLRC_SYNC_WORD_2_3 0x60 // 7 0 sync words 2 and 3
254 #define SX128X_GFSK_FLRC_SYNC_WORD_1_2_3 0x70 // 7 0 sync words 1, 2 and 3
255 #define SX128X_GFSK_FLRC_PACKET_FIXED 0x00 // 7 0 GFSK/FLRC packet length mode: fixed
256 #define SX128X_GFSK_FLRC_PACKET_VARIABLE 0x20 // 7 0 variable
257 #define SX128X_GFSK_FLRC_CRC_OFF 0x00 // 7 0 GFSK/FLRC packet CRC: none
258 #define SX128X_GFSK_FLRC_CRC_1_BYTE 0x10 // 7 0 1 byte
259 #define SX128X_GFSK_FLRC_CRC_2_BYTE 0x20 // 7 0 2 bytes
260 #define SX128X_GFSK_FLRC_CRC_3_BYTE 0x30 // 7 0 3 bytes (FLRC only)
261 #define SX128X_GFSK_BLE_WHITENING_ON 0x00 // 7 0 GFSK/BLE whitening: enabled
262 #define SX128X_GFSK_BLE_WHITENING_OFF 0x08 // 7 0 disabled
263 #define SX128X_BLE_PAYLOAD_LENGTH_MAX_31 0x00 // 7 0 BLE maximum payload length: 31 bytes
264 #define SX128X_BLE_PAYLOAD_LENGTH_MAX_37 0x20 // 7 0 37 bytes
265 #define SX128X_BLE_PAYLOAD_LENGTH_TEST 0x40 // 7 0 63 bytes (test mode)
266 #define SX128X_BLE_PAYLOAD_LENGTH_MAX_255 0x80 // 7 0 255 bytes (Bluetooth 4.2 and above)
267 #define SX128X_BLE_CRC_OFF 0x00 // 7 0 BLE packet CRC: none
268 #define SX128X_BLE_CRC_3_BYTE 0x10 // 7 0 3 byte
269 #define SX128X_BLE_PRBS_9 0x00 // 7 0 BLE test payload contents: PRNG sequence using x^9 + x^5 + x
270 #define SX128X_BLE_EYELONG 0x04 // 7 0 repeated 0xF0
271 #define SX128X_BLE_EYESHORT 0x08 // 7 0 repeated 0xAA
272 #define SX128X_BLE_PRBS_15 0x0C // 7 0 PRNG sequence using x^15 + x^14 + x^13 + x^12 + x^2 + x + 1
273 #define SX128X_BLE_ALL_1 0x10 // 7 0 repeated 0xFF
274 #define SX128X_BLE_ALL_0 0x14 // 7 0 repeated 0x00
275 #define SX128X_BLE_EYELONG_INV 0x18 // 7 0 repeated 0x0F
276 #define SX128X_BLE_EYESHORT_INV 0x1C // 7 0 repeated 0x55
277 #define SX128X_FLRC_SYNC_WORD_OFF 0x00 // 7 0 FLRC sync word: disabled
278 #define SX128X_FLRC_SYNC_WORD_ON 0x04 // 7 0 enabled
279 #define SX128X_LORA_HEADER_EXPLICIT 0x00 // 7 0 LoRa header mode: explicit
280 #define SX128X_LORA_HEADER_IMPLICIT 0x80 // 7 0 implicit
281 #define SX128X_LORA_CRC_OFF 0x00 // 7 0 LoRa packet CRC: disabled
282 #define SX128X_LORA_CRC_ON 0x20 // 7 0 enabled
283 #define SX128X_LORA_IQ_STANDARD 0x40 // 7 0 LoRa IQ: standard
284 #define SX128X_LORA_IQ_INVERTED 0x00 // 7 0 inverted
285 
286 //SX128X_CMD_GET_PACKET_STATUS
287 #define SX128X_PACKET_STATUS_SYNC_ERROR 0b01000000 // 6 6 packet status errors byte: sync word error
288 #define SX128X_PACKET_STATUS_LENGTH_ERROR 0b00100000 // 5 5 packet length error
289 #define SX128X_PACKET_STATUS_CRC_ERROR 0b00010000 // 4 4 CRC error
290 #define SX128X_PACKET_STATUS_ABORT_ERROR 0b00001000 // 3 3 packet reception aborted
291 #define SX128X_PACKET_STATUS_HEADER_RECEIVED 0b00000100 // 2 2 header received
292 #define SX128X_PACKET_STATUS_PACKET_RECEIVED 0b00000010 // 1 1 packet received
293 #define SX128X_PACKET_STATUS_PACKET_CTRL_BUSY 0b00000001 // 0 0 packet controller is busy
294 #define SX128X_PACKET_STATUS_RX_PID 0b11000000 // 7 6 packet status status byte: PID field of the received packet
295 #define SX128X_PACKET_STATUS_NO_ACK 0b00100000 // 5 5 NO_ACK field of the received packet
296 #define SX128X_PACKET_STATUS_RX_PID_ERROR 0b00010000 // 4 4 PID field error
297 #define SX128X_PACKET_STATUS_PACKET_SENT 0b00000001 // 0 0 packet sent
298 #define SX128X_PACKET_STATUS_SYNC_DET_ERROR 0b00000000 // 2 0 packet status sync byte: sync word detection error
299 #define SX128X_PACKET_STATUS_SYNC_DET_1 0b00000001 // 2 0 detected sync word 1
300 #define SX128X_PACKET_STATUS_SYNC_DET_2 0b00000010 // 2 0 detected sync word 2
301 #define SX128X_PACKET_STATUS_SYNC_DET_3 0b00000100 // 2 0 detected sync word 3
302 
303 //SX128X_CMD_SET_DIO_IRQ_PARAMS
304 #define SX128X_IRQ_PREAMBLE_DETECTED 0x8000 // 15 15 interrupt source: preamble detected
305 #define SX128X_IRQ_ADVANCED_RANGING_DONE 0x8000 // 15 15 advanced ranging done
306 #define SX128X_IRQ_RX_TX_TIMEOUT 0x4000 // 14 14 Rx or Tx timeout
307 #define SX128X_IRQ_CAD_DETECTED 0x2000 // 13 13 channel activity detected
308 #define SX128X_IRQ_CAD_DONE 0x1000 // 12 12 CAD finished
309 #define SX128X_IRQ_RANGING_SLAVE_REQ_VALID 0x0800 // 11 11 ranging request valid (slave)
310 #define SX128X_IRQ_RANGING_MASTER_TIMEOUT 0x0400 // 10 10 ranging timeout (master)
311 #define SX128X_IRQ_RANGING_MASTER_RES_VALID 0x0200 // 9 9 ranging result valid (master)
312 #define SX128X_IRQ_RANGING_SLAVE_REQ_DISCARD 0x0100 // 8 8 ranging result valid (master)
313 #define SX128X_IRQ_RANGING_SLAVE_RESP_DONE 0x0080 // 7 7 ranging response complete (slave)
314 #define SX128X_IRQ_CRC_ERROR 0x0040 // 6 6 CRC error
315 #define SX128X_IRQ_HEADER_ERROR 0x0020 // 5 5 header error
316 #define SX128X_IRQ_HEADER_VALID 0x0010 // 4 4 header valid
317 #define SX128X_IRQ_SYNC_WORD_ERROR 0x0008 // 3 3 sync word error
318 #define SX128X_IRQ_SYNC_WORD_VALID 0x0004 // 2 2 sync word valid
319 #define SX128X_IRQ_RX_DONE 0x0002 // 1 1 Rx done
320 #define SX128X_IRQ_TX_DONE 0x0001 // 0 0 Tx done
321 #define SX128X_IRQ_NONE 0x0000 // 15 0 none
322 #define SX128X_IRQ_ALL 0xFFFF // 15 0 all
323 
324 //SX128X_CMD_SET_REGULATOR_MODE
325 #define SX128X_REGULATOR_LDO 0x00 // 7 0 set regulator mode: LDO (default)
326 #define SX128X_REGULATOR_DC_DC 0x01 // 7 0 DC-DC
327 
328 //SX128X_CMD_SET_RANGING_ROLE
329 #define SX128X_RANGING_ROLE_MASTER 0x01 // 7 0 ranging role: master
330 #define SX128X_RANGING_ROLE_SLAVE 0x00 // 7 0 slave
331 
332 
339 class SX128x: public PhysicalLayer {
340  public:
341  // introduce PhysicalLayer overloads
342  using PhysicalLayer::transmit;
343  using PhysicalLayer::receive;
344  using PhysicalLayer::startTransmit;
345  using PhysicalLayer::readData;
346 
352  SX128x(Module* mod);
353 
354  // basic methods
355 
373  int16_t begin(float freq = 2400.0, float bw = 812.5, uint8_t sf = 9, uint8_t cr = 7, int8_t power = 10, uint16_t preambleLength = 12);
374 
390  int16_t beginGFSK(float freq = 2400.0, uint16_t br = 800, float freqDev = 400.0, int8_t power = 10, uint16_t preambleLength = 16);
391 
407  int16_t beginBLE(float freq = 2400.0, uint16_t br = 800, float freqDev = 400.0, int8_t power = 10, uint8_t dataShaping = RADIOLIB_SHAPING_0_5);
408 
426  int16_t beginFLRC(float freq = 2400.0, uint16_t br = 650, uint8_t cr = 3, int8_t power = 10, uint16_t preambleLength = 16, uint8_t dataShaping = RADIOLIB_SHAPING_0_5);
427 
436  int16_t reset(bool verify = true);
437 
450  int16_t transmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
451 
462  int16_t receive(uint8_t* data, size_t len) override;
463 
471  int16_t transmitDirect(uint32_t frf = 0) override;
472 
479  int16_t receiveDirect() override;
480 
486  int16_t scanChannel();
487 
495  int16_t sleep(bool retainConfig = true);
496 
502  int16_t standby() override;
503 
511  int16_t standby(uint8_t mode);
512 
513  // interrupt methods
514 
520  void setDio1Action(void (*func)(void));
521 
525  void clearDio1Action();
526 
539  int16_t startTransmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
540 
548  int16_t startReceive(uint16_t timeout = SX128X_RX_TIMEOUT_INF);
549 
559  int16_t readData(uint8_t* data, size_t len) override;
560 
561  // configuration methods
562 
570  int16_t setFrequency(float freq);
571 
579  int16_t setBandwidth(float bw);
580 
588  int16_t setSpreadingFactor(uint8_t sf);
589 
599  int16_t setCodingRate(uint8_t cr, bool longInterleaving = false);
600 
608  int16_t setOutputPower(int8_t power);
609 
617  int16_t setPreambleLength(uint32_t preambleLength);
618 
626  int16_t setBitRate(uint16_t br);
627 
635  int16_t setFrequencyDeviation(float freqDev) override;
636 
645  int16_t setDataShaping(uint8_t sh) override;
646 
656  int16_t setSyncWord(uint8_t* syncWord, uint8_t len);
657 
669  int16_t setCRC(uint8_t len, uint32_t initial = 0x1D0F, uint16_t polynomial = 0x1021);
670 
678  int16_t setWhitening(bool enabled);
679 
687  int16_t setAccessAddress(uint32_t addr);
688 
694  float getRSSI();
695 
701  float getSNR();
702 
710  size_t getPacketLength(bool update = true) override;
711 
719  uint32_t getTimeOnAir(size_t len);
720 
726  int16_t implicitHeader(size_t len);
727 
735  int16_t explicitHeader();
736 
744  int16_t setEncoding(uint8_t encoding) override;
745 
754  void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn);
755 
761  uint8_t random();
762 
763 #ifndef RADIOLIB_GODMODE
764  protected:
765 #endif
766  Module* _mod;
767 
768  // cached LoRa parameters
769  float _bwKhz = 0;
770  uint8_t _bw = 0, _sf = 0, _cr = 0;
771  uint8_t _preambleLengthLoRa = 0, _headerType = 0, _payloadLen = 0, _crcLoRa = 0;
772 
773  // SX128x SPI command implementations
774  uint8_t getStatus();
775  int16_t writeRegister(uint16_t addr, uint8_t* data, uint8_t numBytes);
776  int16_t readRegister(uint16_t addr, uint8_t* data, uint8_t numBytes);
777  int16_t writeBuffer(uint8_t* data, uint8_t numBytes, uint8_t offset = 0x00);
778  int16_t readBuffer(uint8_t* data, uint8_t numBytes);
779  int16_t setTx(uint16_t periodBaseCount = SX128X_TX_TIMEOUT_NONE, uint8_t periodBase = SX128X_PERIOD_BASE_15_625_US);
780  int16_t setRx(uint16_t periodBaseCount, uint8_t periodBase = SX128X_PERIOD_BASE_15_625_US);
781  int16_t setCad();
782  uint8_t getPacketType();
783  int16_t setRfFrequency(uint32_t frf);
784  int16_t setTxParams(uint8_t power, uint8_t rampTime = SX128X_PA_RAMP_10_US);
785  int16_t setBufferBaseAddress(uint8_t txBaseAddress = 0x00, uint8_t rxBaseAddress = 0x00);
786  int16_t setModulationParams(uint8_t modParam1, uint8_t modParam2, uint8_t modParam3);
787  int16_t setPacketParamsGFSK(uint8_t preambleLen, uint8_t syncWordLen, uint8_t syncWordMatch, uint8_t crcLen, uint8_t whitening, uint8_t payloadLen = 0xFF, uint8_t headerType = SX128X_GFSK_FLRC_PACKET_VARIABLE);
788  int16_t setPacketParamsBLE(uint8_t connState, uint8_t crcLen, uint8_t bleTestPayload, uint8_t whitening);
789  int16_t setPacketParamsLoRa(uint8_t preambleLen, uint8_t headerType, uint8_t payloadLen, uint8_t crc, uint8_t invertIQ = SX128X_LORA_IQ_STANDARD);
790  int16_t setDioIrqParams(uint16_t irqMask, uint16_t dio1Mask, uint16_t dio2Mask = SX128X_IRQ_NONE, uint16_t dio3Mask = SX128X_IRQ_NONE);
791  uint16_t getIrqStatus();
792  int16_t clearIrqStatus(uint16_t clearIrqParams = SX128X_IRQ_ALL);
793  int16_t setRangingRole(uint8_t role);
794  int16_t setPacketType(uint8_t type);
795 
796  int16_t setHeaderType(uint8_t headerType, size_t len = 0xFF);
797 
798 #ifndef RADIOLIB_GODMODE
799  private:
800 #endif
801  // common parameters
802  uint8_t _pwr = 0;
803 
804  // cached GFSK parameters
805  float _modIndexReal = 0;
806  uint16_t _brKbps = 0;
807  uint8_t _br = 0, _modIndex = 0, _shaping = 0;
808  uint8_t _preambleLengthGFSK = 0, _syncWordLen = 0, _syncWordMatch = 0, _crcGFSK = 0, _whitening = 0;
809 
810  // cached FLRC parameters
811  uint8_t _crFLRC = 0;
812 
813  // cached BLE parameters
814  uint8_t _connectionState = 0, _crcBLE = 0, _bleTestPayload = 0;
815 
816  int16_t config(uint8_t modem);
817 
818  // common low-level SPI interface
819  int16_t SPIwriteCommand(uint8_t cmd, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
820  int16_t SPIwriteCommand(uint8_t* cmd, uint8_t cmdLen, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
821  int16_t SPIreadCommand(uint8_t cmd, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
822  int16_t SPIreadCommand(uint8_t* cmd, uint8_t cmdLen, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
823  int16_t SPItransfer(uint8_t* cmd, uint8_t cmdLen, bool write, uint8_t* dataOut, uint8_t* dataIn, uint8_t numBytes, bool waitForBusy, uint32_t timeout = 5000);
824 };
825 
826 #endif
827 
828 #endif
SX128x::explicitHeader
int16_t explicitHeader()
Set explicit header mode for future reception/transmission.
Definition: SX128x.cpp:1113
-
SX128x::setAccessAddress
int16_t setAccessAddress(uint32_t addr)
Sets BLE access address.
Definition: SX128x.cpp:983
-
SX128x::receive
int16_t receive(uint8_t *data, size_t len) override
Blocking binary receive method. Overloads for string-based transmissions are implemented in PhysicalL...
Definition: SX128x.cpp:308
-
SX128x::standby
int16_t standby() override
Sets the module to standby mode (overload for PhysicalLayer compatibility, uses 13 MHz RC oscillator)...
Definition: SX128x.cpp:430
-
SX128x::clearDio1Action
void clearDio1Action()
Clears interrupt service routine to call when DIO1 activates.
Definition: SX128x.cpp:446
+
1 #if !defined(_RADIOLIB_SX128X_H)
2 #define _RADIOLIB_SX128X_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SX128X)
7 
8 #include "../../Module.h"
9 
10 #include "../../protocols/PhysicalLayer/PhysicalLayer.h"
11 
12 // SX128X physical layer properties
13 #define SX128X_FREQUENCY_STEP_SIZE 198.3642578
14 #define SX128X_MAX_PACKET_LENGTH 255
15 #define SX128X_CRYSTAL_FREQ 52.0
16 #define SX128X_DIV_EXPONENT 18
17 
18 // SX128X SPI commands
19 #define SX128X_CMD_NOP 0x00
20 #define SX128X_CMD_GET_STATUS 0xC0
21 #define SX128X_CMD_WRITE_REGISTER 0x18
22 #define SX128X_CMD_READ_REGISTER 0x19
23 #define SX128X_CMD_WRITE_BUFFER 0x1A
24 #define SX128X_CMD_READ_BUFFER 0x1B
25 #define SX128X_CMD_SET_SLEEP 0x84
26 #define SX128X_CMD_SET_STANDBY 0x80
27 #define SX128X_CMD_SET_FS 0xC1
28 #define SX128X_CMD_SET_TX 0x83
29 #define SX128X_CMD_SET_RX 0x82
30 #define SX128X_CMD_SET_RX_DUTY_CYCLE 0x94
31 #define SX128X_CMD_SET_CAD 0xC5
32 #define SX128X_CMD_SET_TX_CONTINUOUS_WAVE 0xD1
33 #define SX128X_CMD_SET_TX_CONTINUOUS_PREAMBLE 0xD2
34 #define SX128X_CMD_SET_PACKET_TYPE 0x8A
35 #define SX128X_CMD_GET_PACKET_TYPE 0x03
36 #define SX128X_CMD_SET_RF_FREQUENCY 0x86
37 #define SX128X_CMD_SET_TX_PARAMS 0x8E
38 #define SX128X_CMD_SET_CAD_PARAMS 0x88
39 #define SX128X_CMD_SET_BUFFER_BASE_ADDRESS 0x8F
40 #define SX128X_CMD_SET_MODULATION_PARAMS 0x8B
41 #define SX128X_CMD_SET_PACKET_PARAMS 0x8C
42 #define SX128X_CMD_GET_RX_BUFFER_STATUS 0x17
43 #define SX128X_CMD_GET_PACKET_STATUS 0x1D
44 #define SX128X_CMD_GET_RSSI_INST 0x1F
45 #define SX128X_CMD_SET_DIO_IRQ_PARAMS 0x8D
46 #define SX128X_CMD_GET_IRQ_STATUS 0x15
47 #define SX128X_CMD_CLEAR_IRQ_STATUS 0x97
48 #define SX128X_CMD_SET_REGULATOR_MODE 0x96
49 #define SX128X_CMD_SET_SAVE_CONTEXT 0xD5
50 #define SX128X_CMD_SET_AUTO_TX 0x98
51 #define SX128X_CMD_SET_AUTO_FS 0x9E
52 #define SX128X_CMD_SET_PERF_COUNTER_MODE 0x9C
53 #define SX128X_CMD_SET_LONG_PREAMBLE 0x9B
54 #define SX128X_CMD_SET_UART_SPEED 0x9D
55 #define SX128X_CMD_SET_RANGING_ROLE 0xA3
56 #define SX128X_CMD_SET_ADVANCED_RANGING 0x9A
57 
58 // SX128X register map
59 #define SX128X_REG_SYNC_WORD_1_BYTE_4 0x09CE
60 #define SX128X_REG_SYNC_WORD_1_BYTE_3 0x09CF
61 #define SX128X_REG_SYNC_WORD_1_BYTE_2 0x09D0
62 #define SX128X_REG_SYNC_WORD_1_BYTE_1 0x09D1
63 #define SX128X_REG_SYNC_WORD_1_BYTE_0 0x09D2
64 #define SX128X_REG_SYNC_WORD_2_BYTE_4 0x09D3
65 #define SX128X_REG_SYNC_WORD_2_BYTE_3 0x09D4
66 #define SX128X_REG_SYNC_WORD_2_BYTE_2 0x09D5
67 #define SX128X_REG_SYNC_WORD_2_BYTE_1 0x09D6
68 #define SX128X_REG_SYNC_WORD_2_BYTE_0 0x09D7
69 #define SX128X_REG_SYNC_WORD_3_BYTE_4 0x09D8
70 #define SX128X_REG_SYNC_WORD_3_BYTE_3 0x09D9
71 #define SX128X_REG_SYNC_WORD_3_BYTE_2 0x09DA
72 #define SX128X_REG_SYNC_WORD_3_BYTE_1 0x09DB
73 #define SX128X_REG_SYNC_WORD_3_BYTE_0 0x09DC
74 #define SX128X_REG_CRC_INITIAL_MSB 0x09C8
75 #define SX128X_REG_CRC_INITIAL_LSB 0x09C9
76 #define SX128X_REG_CRC_POLYNOMIAL_MSB 0x09C6
77 #define SX128X_REG_CRC_POLYNOMIAL_LSB 0x09C7
78 #define SX128X_REG_ACCESS_ADDRESS_BYTE_3 (SX128X_REG_SYNC_WORD_1_BYTE_3)
79 #define SX128X_REG_ACCESS_ADDRESS_BYTE_2 (SX128X_REG_SYNC_WORD_1_BYTE_2)
80 #define SX128X_REG_ACCESS_ADDRESS_BYTE_1 (SX128X_REG_SYNC_WORD_1_BYTE_1)
81 #define SX128X_REG_ACCESS_ADDRESS_BYTE_0 (SX128X_REG_SYNC_WORD_1_BYTE_0)
82 #define SX128X_REG_BLE_CRC_INITIAL_MSB 0x09C7
83 #define SX128X_REG_BLE_CRC_INITIAL_MID (SX128X_REG_CRC_INITIAL_MSB)
84 #define SX128X_REG_BLE_CRC_INITIAL_LSB (SX128X_REG_CRC_INITIAL_LSB)
85 #define SX128X_REG_SLAVE_RANGING_ADDRESS_BYTE_3 0x0916
86 #define SX128X_REG_SLAVE_RANGING_ADDRESS_BYTE_2 0x0917
87 #define SX128X_REG_SLAVE_RANGING_ADDRESS_BYTE_1 0x0918
88 #define SX128X_REG_SLAVE_RANGING_ADDRESS_BYTE_0 0x0919
89 #define SX128X_REG_SLAVE_RANGING_ADDRESS_WIDTH 0x0931
90 #define SX128X_REG_MASTER_RANGING_ADDRESS_BYTE_3 0x0912
91 #define SX128X_REG_MASTER_RANGING_ADDRESS_BYTE_2 0x0913
92 #define SX128X_REG_MASTER_RANGING_ADDRESS_BYTE_1 0x0914
93 #define SX128X_REG_MASTER_RANGING_ADDRESS_BYTE_0 0x0915
94 #define SX128X_REG_RANGING_CALIBRATION_MSB 0x092C
95 #define SX128X_REG_RANGING_CALIBRATION_LSB 0x092D
96 #define SX128X_REG_RANGING_RESULT_MSB 0x0961
97 #define SX128X_REG_RANGING_RESULT_MID 0x0962
98 #define SX128X_REG_RANGING_RESULT_LSB 0x0963
99 #define SX128X_REG_MANUAL_GAIN_CONTROL_ENABLE_1 0x089F
100 #define SX128X_REG_MANUAL_GAIN_CONTROL_ENABLE_2 0x0895
101 #define SX128X_REG_MANUAL_GAIN_SETTING 0x089E
102 #define SX128X_REG_GAIN_MODE 0x0891
103 #define SX128X_REG_LORA_FIXED_PAYLOAD_LENGTH 0x0901
104 #define SX128X_REG_LORA_SF_CONFIG 0x0925
105 #define SX128X_REG_FEI_MSB 0x0954
106 #define SX128X_REG_FEI_MID 0x0955
107 #define SX128X_REG_FEI_LSB 0x0956
108 #define SX128X_REG_RANGING_FILTER_WINDOW_SIZE 0x091E
109 #define SX128X_REG_RANGING_FILTER_RSSI_OFFSET 0x0953
110 #define SX128X_REG_RANGING_FILTER_RESET 0x0923
111 #define SX128X_REG_RANGING_LORA_CLOCK_ENABLE 0x097F
112 #define SX128X_REG_RANGING_TYPE 0x0924
113 #define SX128X_REG_RANGING_ADDRESS_SWITCH 0x0927
114 #define SX128X_REG_RANGING_ADDRESS_MSB 0x095F
115 #define SX128X_REG_RANGING_ADDRESS_LSB 0x0960
116 
117 
118 // SX128X SPI command variables
119 //SX128X_CMD_GET_STATUS MSB LSB DESCRIPTION
120 #define SX128X_STATUS_MODE_STDBY_RC 0b01000000 // 7 5 current chip mode: STDBY_RC
121 #define SX128X_STATUS_MODE_STDBY_XOSC 0b01100000 // 7 5 STDBY_XOSC
122 #define SX128X_STATUS_MODE_FS 0b10000000 // 7 5 FS
123 #define SX128X_STATUS_MODE_RX 0b10100000 // 7 5 Rx
124 #define SX128X_STATUS_MODE_TX 0b11000000 // 7 5 Tx
125 #define SX128X_STATUS_CMD_PROCESSED 0b00000100 // 4 2 command status: processing OK
126 #define SX128X_STATUS_DATA_AVAILABLE 0b00001000 // 4 2 data available
127 #define SX128X_STATUS_CMD_TIMEOUT 0b00001100 // 4 2 timeout
128 #define SX128X_STATUS_CMD_ERROR 0b00010000 // 4 2 processing error
129 #define SX128X_STATUS_CMD_FAILED 0b00010100 // 4 2 failed to execute
130 #define SX128X_STATUS_TX_DONE 0b00011000 // 4 2 transmission finished
131 #define SX128X_STATUS_BUSY 0b00000001 // 0 0 chip busy
132 #define SX128X_STATUS_SPI_FAILED 0b11111111 // 7 0 SPI transaction failed
133 
134 //SX128X_CMD_SET_SLEEP
135 #define SX128X_SLEEP_DATA_BUFFER_FLUSH 0b00000000 // 1 1 data buffer behavior in sleep mode: flush
136 #define SX128X_SLEEP_DATA_BUFFER_RETAIN 0b00000010 // 1 1 retain
137 #define SX128X_SLEEP_DATA_RAM_FLUSH 0b00000000 // 0 0 data RAM (configuration) behavior in sleep mode: flush
138 #define SX128X_SLEEP_DATA_RAM_RETAIN 0b00000001 // 0 0 retain
139 
140 //SX128X_CMD_SET_STANDBY
141 #define SX128X_STANDBY_RC 0x00 // 7 0 standby mode: 13 MHz RC oscillator
142 #define SX128X_STANDBY_XOSC 0x01 // 7 0 52 MHz crystal oscillator
143 
144 //SX128X_CMD_SET_TX + SX128X_CMD_SET_RX + SX128X_CMD_SET_RX_DUTY_CYCLE
145 #define SX128X_PERIOD_BASE_15_625_US 0x00 // 7 0 time period step: 15.625 us
146 #define SX128X_PERIOD_BASE_62_5_US 0x01 // 7 0 62.5 us
147 #define SX128X_PERIOD_BASE_1_MS 0x02 // 7 0 1 ms
148 #define SX128X_PERIOD_BASE_4_MS 0x03 // 7 0 4 ms
149 
150 //SX128X_CMD_SET_TX
151 #define SX128X_TX_TIMEOUT_NONE 0x0000 // 15 0 Tx timeout duration: no timeout (Tx single mode)
152 
153 //SX128X_CMD_SET_RX
154 #define SX128X_RX_TIMEOUT_NONE 0x0000 // 15 0 Rx timeout duration: no timeout (Rx single mode)
155 #define SX128X_RX_TIMEOUT_INF 0xFFFF // 15 0 infinite (Rx continuous mode)
156 
157 //SX128X_CMD_SET_PACKET_TYPE
158 #define SX128X_PACKET_TYPE_GFSK 0x00 // 7 0 packet type: (G)FSK
159 #define SX128X_PACKET_TYPE_LORA 0x01 // 7 0 LoRa
160 #define SX128X_PACKET_TYPE_RANGING 0x02 // 7 0 ranging engine
161 #define SX128X_PACKET_TYPE_FLRC 0x03 // 7 0 FLRC
162 #define SX128X_PACKET_TYPE_BLE 0x04 // 7 0 BLE
163 
164 //SX128X_CMD_SET_TX_PARAMS
165 #define SX128X_PA_RAMP_02_US 0x00 // 7 0 PA ramp time: 2 us
166 #define SX128X_PA_RAMP_04_US 0x20 // 7 0 4 us
167 #define SX128X_PA_RAMP_06_US 0x40 // 7 0 6 us
168 #define SX128X_PA_RAMP_08_US 0x60 // 7 0 8 us
169 #define SX128X_PA_RAMP_10_US 0x80 // 7 0 10 us
170 #define SX128X_PA_RAMP_12_US 0xA0 // 7 0 12 us
171 #define SX128X_PA_RAMP_16_US 0xC0 // 7 0 16 us
172 #define SX128X_PA_RAMP_20_US 0xE0 // 7 0 20 us
173 
174 //SX128X_CMD_SET_CAD_PARAMS
175 #define SX128X_CAD_ON_1_SYMB 0x00 // 7 0 number of symbols used for CAD: 1
176 #define SX128X_CAD_ON_2_SYMB 0x20 // 7 0 2
177 #define SX128X_CAD_ON_4_SYMB 0x40 // 7 0 4
178 #define SX128X_CAD_ON_8_SYMB 0x60 // 7 0 8
179 #define SX128X_CAD_ON_16_SYMB 0x80 // 7 0 16
180 
181 //SX128X_CMD_SET_MODULATION_PARAMS
182 #define SX128X_BLE_GFSK_BR_2_000_BW_2_4 0x04 // 7 0 GFSK/BLE bit rate and bandwidth setting: 2.0 Mbps 2.4 MHz
183 #define SX128X_BLE_GFSK_BR_1_600_BW_2_4 0x28 // 7 0 1.6 Mbps 2.4 MHz
184 #define SX128X_BLE_GFSK_BR_1_000_BW_2_4 0x4C // 7 0 1.0 Mbps 2.4 MHz
185 #define SX128X_BLE_GFSK_BR_1_000_BW_1_2 0x45 // 7 0 1.0 Mbps 1.2 MHz
186 #define SX128X_BLE_GFSK_BR_0_800_BW_2_4 0x70 // 7 0 0.8 Mbps 2.4 MHz
187 #define SX128X_BLE_GFSK_BR_0_800_BW_1_2 0x69 // 7 0 0.8 Mbps 1.2 MHz
188 #define SX128X_BLE_GFSK_BR_0_500_BW_1_2 0x8D // 7 0 0.5 Mbps 1.2 MHz
189 #define SX128X_BLE_GFSK_BR_0_500_BW_0_6 0x86 // 7 0 0.5 Mbps 0.6 MHz
190 #define SX128X_BLE_GFSK_BR_0_400_BW_1_2 0xB1 // 7 0 0.4 Mbps 1.2 MHz
191 #define SX128X_BLE_GFSK_BR_0_400_BW_0_6 0xAA // 7 0 0.4 Mbps 0.6 MHz
192 #define SX128X_BLE_GFSK_BR_0_250_BW_0_6 0xCE // 7 0 0.25 Mbps 0.6 MHz
193 #define SX128X_BLE_GFSK_BR_0_250_BW_0_3 0xC7 // 7 0 0.25 Mbps 0.3 MHz
194 #define SX128X_BLE_GFSK_BR_0_125_BW_0_3 0xEF // 7 0 0.125 Mbps 0.3 MHz
195 #define SX128X_BLE_GFSK_MOD_IND_0_35 0x00 // 7 0 GFSK/BLE modulation index: 0.35
196 #define SX128X_BLE_GFSK_MOD_IND_0_50 0x01 // 7 0 0.50
197 #define SX128X_BLE_GFSK_MOD_IND_0_75 0x02 // 7 0 0.75
198 #define SX128X_BLE_GFSK_MOD_IND_1_00 0x03 // 7 0 1.00
199 #define SX128X_BLE_GFSK_MOD_IND_1_25 0x04 // 7 0 1.25
200 #define SX128X_BLE_GFSK_MOD_IND_1_50 0x05 // 7 0 1.50
201 #define SX128X_BLE_GFSK_MOD_IND_1_75 0x06 // 7 0 1.75
202 #define SX128X_BLE_GFSK_MOD_IND_2_00 0x07 // 7 0 2.00
203 #define SX128X_BLE_GFSK_MOD_IND_2_25 0x08 // 7 0 2.25
204 #define SX128X_BLE_GFSK_MOD_IND_2_50 0x09 // 7 0 2.50
205 #define SX128X_BLE_GFSK_MOD_IND_2_75 0x0A // 7 0 2.75
206 #define SX128X_BLE_GFSK_MOD_IND_3_00 0x0B // 7 0 3.00
207 #define SX128X_BLE_GFSK_MOD_IND_3_25 0x0C // 7 0 3.25
208 #define SX128X_BLE_GFSK_MOD_IND_3_50 0x0D // 7 0 3.50
209 #define SX128X_BLE_GFSK_MOD_IND_3_75 0x0E // 7 0 3.75
210 #define SX128X_BLE_GFSK_MOD_IND_4_00 0x0F // 7 0 4.00
211 #define SX128X_BLE_GFSK_BT_OFF 0x00 // 7 0 GFSK Gaussian filter BT product: filter disabled
212 #define SX128X_BLE_GFSK_BT_1_0 0x10 // 7 0 1.0
213 #define SX128X_BLE_GFSK_BT_0_5 0x20 // 7 0 0.5
214 #define SX128X_FLRC_BR_1_300_BW_1_2 0x45 // 7 0 FLRC bit rate and bandwidth setting: 1.3 Mbps 1.2 MHz
215 #define SX128X_FLRC_BR_1_000_BW_1_2 0x69 // 7 0 1.04 Mbps 1.2 MHz
216 #define SX128X_FLRC_BR_0_650_BW_0_6 0x86 // 7 0 0.65 Mbps 0.6 MHz
217 #define SX128X_FLRC_BR_0_520_BW_0_6 0xAA // 7 0 0.52 Mbps 0.6 MHz
218 #define SX128X_FLRC_BR_0_325_BW_0_3 0xC7 // 7 0 0.325 Mbps 0.3 MHz
219 #define SX128X_FLRC_BR_0_260_BW_0_3 0xEB // 7 0 0.260 Mbps 0.3 MHz
220 #define SX128X_FLRC_CR_1_2 0x00 // 7 0 FLRC coding rate: 1/2
221 #define SX128X_FLRC_CR_3_4 0x02 // 7 0 3/4
222 #define SX128X_FLRC_CR_1_0 0x04 // 7 0 1/1
223 #define SX128X_FLRC_BT_OFF 0x00 // 7 0 FLRC Gaussian filter BT product: filter disabled
224 #define SX128X_FLRC_BT_1_0 0x10 // 7 0 1.0
225 #define SX128X_FLRC_BT_0_5 0x20 // 7 0 0.5
226 #define SX128X_LORA_SF_5 0x50 // 7 0 LoRa spreading factor: 5
227 #define SX128X_LORA_SF_6 0x60 // 7 0 6
228 #define SX128X_LORA_SF_7 0x70 // 7 0 7
229 #define SX128X_LORA_SF_8 0x80 // 7 0 8
230 #define SX128X_LORA_SF_9 0x90 // 7 0 9
231 #define SX128X_LORA_SF_10 0xA0 // 7 0 10
232 #define SX128X_LORA_SF_11 0xB0 // 7 0 11
233 #define SX128X_LORA_SF_12 0xC0 // 7 0 12
234 #define SX128X_LORA_BW_1625_00 0x0A // 7 0 LoRa bandwidth: 1625.0 kHz
235 #define SX128X_LORA_BW_812_50 0x18 // 7 0 812.5 kHz
236 #define SX128X_LORA_BW_406_25 0x26 // 7 0 406.25 kHz
237 #define SX128X_LORA_BW_203_125 0x34 // 7 0 203.125 kHz
238 #define SX128X_LORA_CR_4_5 0x01 // 7 0 LoRa coding rate: 4/5
239 #define SX128X_LORA_CR_4_6 0x02 // 7 0 4/6
240 #define SX128X_LORA_CR_4_7 0x03 // 7 0 4/7
241 #define SX128X_LORA_CR_4_8 0x04 // 7 0 4/8
242 #define SX128X_LORA_CR_4_5_LI 0x05 // 7 0 4/5, long interleaving
243 #define SX128X_LORA_CR_4_6_LI 0x06 // 7 0 4/6, long interleaving
244 #define SX128X_LORA_CR_4_7_LI 0x07 // 7 0 4/7, long interleaving
245 
246 //SX128X_CMD_SET_PACKET_PARAMS
247 #define SX128X_GFSK_FLRC_SYNC_WORD_OFF 0x00 // 7 0 GFSK/FLRC sync word used: none
248 #define SX128X_GFSK_FLRC_SYNC_WORD_1 0x10 // 7 0 sync word 1
249 #define SX128X_GFSK_FLRC_SYNC_WORD_2 0x20 // 7 0 sync word 2
250 #define SX128X_GFSK_FLRC_SYNC_WORD_1_2 0x30 // 7 0 sync words 1 and 2
251 #define SX128X_GFSK_FLRC_SYNC_WORD_3 0x40 // 7 0 sync word 3
252 #define SX128X_GFSK_FLRC_SYNC_WORD_1_3 0x50 // 7 0 sync words 1 and 3
253 #define SX128X_GFSK_FLRC_SYNC_WORD_2_3 0x60 // 7 0 sync words 2 and 3
254 #define SX128X_GFSK_FLRC_SYNC_WORD_1_2_3 0x70 // 7 0 sync words 1, 2 and 3
255 #define SX128X_GFSK_FLRC_PACKET_FIXED 0x00 // 7 0 GFSK/FLRC packet length mode: fixed
256 #define SX128X_GFSK_FLRC_PACKET_VARIABLE 0x20 // 7 0 variable
257 #define SX128X_GFSK_FLRC_CRC_OFF 0x00 // 7 0 GFSK/FLRC packet CRC: none
258 #define SX128X_GFSK_FLRC_CRC_1_BYTE 0x10 // 7 0 1 byte
259 #define SX128X_GFSK_FLRC_CRC_2_BYTE 0x20 // 7 0 2 bytes
260 #define SX128X_GFSK_FLRC_CRC_3_BYTE 0x30 // 7 0 3 bytes (FLRC only)
261 #define SX128X_GFSK_BLE_WHITENING_ON 0x00 // 7 0 GFSK/BLE whitening: enabled
262 #define SX128X_GFSK_BLE_WHITENING_OFF 0x08 // 7 0 disabled
263 #define SX128X_BLE_PAYLOAD_LENGTH_MAX_31 0x00 // 7 0 BLE maximum payload length: 31 bytes
264 #define SX128X_BLE_PAYLOAD_LENGTH_MAX_37 0x20 // 7 0 37 bytes
265 #define SX128X_BLE_PAYLOAD_LENGTH_TEST 0x40 // 7 0 63 bytes (test mode)
266 #define SX128X_BLE_PAYLOAD_LENGTH_MAX_255 0x80 // 7 0 255 bytes (Bluetooth 4.2 and above)
267 #define SX128X_BLE_CRC_OFF 0x00 // 7 0 BLE packet CRC: none
268 #define SX128X_BLE_CRC_3_BYTE 0x10 // 7 0 3 byte
269 #define SX128X_BLE_PRBS_9 0x00 // 7 0 BLE test payload contents: PRNG sequence using x^9 + x^5 + x
270 #define SX128X_BLE_EYELONG 0x04 // 7 0 repeated 0xF0
271 #define SX128X_BLE_EYESHORT 0x08 // 7 0 repeated 0xAA
272 #define SX128X_BLE_PRBS_15 0x0C // 7 0 PRNG sequence using x^15 + x^14 + x^13 + x^12 + x^2 + x + 1
273 #define SX128X_BLE_ALL_1 0x10 // 7 0 repeated 0xFF
274 #define SX128X_BLE_ALL_0 0x14 // 7 0 repeated 0x00
275 #define SX128X_BLE_EYELONG_INV 0x18 // 7 0 repeated 0x0F
276 #define SX128X_BLE_EYESHORT_INV 0x1C // 7 0 repeated 0x55
277 #define SX128X_FLRC_SYNC_WORD_OFF 0x00 // 7 0 FLRC sync word: disabled
278 #define SX128X_FLRC_SYNC_WORD_ON 0x04 // 7 0 enabled
279 #define SX128X_LORA_HEADER_EXPLICIT 0x00 // 7 0 LoRa header mode: explicit
280 #define SX128X_LORA_HEADER_IMPLICIT 0x80 // 7 0 implicit
281 #define SX128X_LORA_CRC_OFF 0x00 // 7 0 LoRa packet CRC: disabled
282 #define SX128X_LORA_CRC_ON 0x20 // 7 0 enabled
283 #define SX128X_LORA_IQ_STANDARD 0x40 // 7 0 LoRa IQ: standard
284 #define SX128X_LORA_IQ_INVERTED 0x00 // 7 0 inverted
285 
286 //SX128X_CMD_GET_PACKET_STATUS
287 #define SX128X_PACKET_STATUS_SYNC_ERROR 0b01000000 // 6 6 packet status errors byte: sync word error
288 #define SX128X_PACKET_STATUS_LENGTH_ERROR 0b00100000 // 5 5 packet length error
289 #define SX128X_PACKET_STATUS_CRC_ERROR 0b00010000 // 4 4 CRC error
290 #define SX128X_PACKET_STATUS_ABORT_ERROR 0b00001000 // 3 3 packet reception aborted
291 #define SX128X_PACKET_STATUS_HEADER_RECEIVED 0b00000100 // 2 2 header received
292 #define SX128X_PACKET_STATUS_PACKET_RECEIVED 0b00000010 // 1 1 packet received
293 #define SX128X_PACKET_STATUS_PACKET_CTRL_BUSY 0b00000001 // 0 0 packet controller is busy
294 #define SX128X_PACKET_STATUS_RX_PID 0b11000000 // 7 6 packet status status byte: PID field of the received packet
295 #define SX128X_PACKET_STATUS_NO_ACK 0b00100000 // 5 5 NO_ACK field of the received packet
296 #define SX128X_PACKET_STATUS_RX_PID_ERROR 0b00010000 // 4 4 PID field error
297 #define SX128X_PACKET_STATUS_PACKET_SENT 0b00000001 // 0 0 packet sent
298 #define SX128X_PACKET_STATUS_SYNC_DET_ERROR 0b00000000 // 2 0 packet status sync byte: sync word detection error
299 #define SX128X_PACKET_STATUS_SYNC_DET_1 0b00000001 // 2 0 detected sync word 1
300 #define SX128X_PACKET_STATUS_SYNC_DET_2 0b00000010 // 2 0 detected sync word 2
301 #define SX128X_PACKET_STATUS_SYNC_DET_3 0b00000100 // 2 0 detected sync word 3
302 
303 //SX128X_CMD_SET_DIO_IRQ_PARAMS
304 #define SX128X_IRQ_PREAMBLE_DETECTED 0x8000 // 15 15 interrupt source: preamble detected
305 #define SX128X_IRQ_ADVANCED_RANGING_DONE 0x8000 // 15 15 advanced ranging done
306 #define SX128X_IRQ_RX_TX_TIMEOUT 0x4000 // 14 14 Rx or Tx timeout
307 #define SX128X_IRQ_CAD_DETECTED 0x2000 // 13 13 channel activity detected
308 #define SX128X_IRQ_CAD_DONE 0x1000 // 12 12 CAD finished
309 #define SX128X_IRQ_RANGING_SLAVE_REQ_VALID 0x0800 // 11 11 ranging request valid (slave)
310 #define SX128X_IRQ_RANGING_MASTER_TIMEOUT 0x0400 // 10 10 ranging timeout (master)
311 #define SX128X_IRQ_RANGING_MASTER_RES_VALID 0x0200 // 9 9 ranging result valid (master)
312 #define SX128X_IRQ_RANGING_SLAVE_REQ_DISCARD 0x0100 // 8 8 ranging result valid (master)
313 #define SX128X_IRQ_RANGING_SLAVE_RESP_DONE 0x0080 // 7 7 ranging response complete (slave)
314 #define SX128X_IRQ_CRC_ERROR 0x0040 // 6 6 CRC error
315 #define SX128X_IRQ_HEADER_ERROR 0x0020 // 5 5 header error
316 #define SX128X_IRQ_HEADER_VALID 0x0010 // 4 4 header valid
317 #define SX128X_IRQ_SYNC_WORD_ERROR 0x0008 // 3 3 sync word error
318 #define SX128X_IRQ_SYNC_WORD_VALID 0x0004 // 2 2 sync word valid
319 #define SX128X_IRQ_RX_DONE 0x0002 // 1 1 Rx done
320 #define SX128X_IRQ_TX_DONE 0x0001 // 0 0 Tx done
321 #define SX128X_IRQ_NONE 0x0000 // 15 0 none
322 #define SX128X_IRQ_ALL 0xFFFF // 15 0 all
323 
324 //SX128X_CMD_SET_REGULATOR_MODE
325 #define SX128X_REGULATOR_LDO 0x00 // 7 0 set regulator mode: LDO (default)
326 #define SX128X_REGULATOR_DC_DC 0x01 // 7 0 DC-DC
327 
328 //SX128X_CMD_SET_RANGING_ROLE
329 #define SX128X_RANGING_ROLE_MASTER 0x01 // 7 0 ranging role: master
330 #define SX128X_RANGING_ROLE_SLAVE 0x00 // 7 0 slave
331 
332 
339 class SX128x: public PhysicalLayer {
340  public:
341  // introduce PhysicalLayer overloads
342  using PhysicalLayer::transmit;
343  using PhysicalLayer::receive;
344  using PhysicalLayer::startTransmit;
345  using PhysicalLayer::readData;
346 
352  SX128x(Module* mod);
353 
354  // basic methods
355 
373  int16_t begin(float freq = 2400.0, float bw = 812.5, uint8_t sf = 9, uint8_t cr = 7, int8_t power = 10, uint16_t preambleLength = 12);
374 
390  int16_t beginGFSK(float freq = 2400.0, uint16_t br = 800, float freqDev = 400.0, int8_t power = 10, uint16_t preambleLength = 16);
391 
407  int16_t beginBLE(float freq = 2400.0, uint16_t br = 800, float freqDev = 400.0, int8_t power = 10, uint8_t dataShaping = RADIOLIB_SHAPING_0_5);
408 
426  int16_t beginFLRC(float freq = 2400.0, uint16_t br = 650, uint8_t cr = 3, int8_t power = 10, uint16_t preambleLength = 16, uint8_t dataShaping = RADIOLIB_SHAPING_0_5);
427 
436  int16_t reset(bool verify = true);
437 
450  int16_t transmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
451 
462  int16_t receive(uint8_t* data, size_t len) override;
463 
471  int16_t transmitDirect(uint32_t frf = 0) override;
472 
479  int16_t receiveDirect() override;
480 
486  int16_t scanChannel();
487 
495  int16_t sleep(bool retainConfig = true);
496 
502  int16_t standby() override;
503 
511  int16_t standby(uint8_t mode);
512 
513  // interrupt methods
514 
520  void setDio1Action(void (*func)(void));
521 
525  void clearDio1Action();
526 
539  int16_t startTransmit(uint8_t* data, size_t len, uint8_t addr = 0) override;
540 
548  int16_t startReceive(uint16_t timeout = SX128X_RX_TIMEOUT_INF);
549 
559  int16_t readData(uint8_t* data, size_t len) override;
560 
561  // configuration methods
562 
570  int16_t setFrequency(float freq);
571 
579  int16_t setBandwidth(float bw);
580 
588  int16_t setSpreadingFactor(uint8_t sf);
589 
599  int16_t setCodingRate(uint8_t cr, bool longInterleaving = false);
600 
608  int16_t setOutputPower(int8_t power);
609 
617  int16_t setPreambleLength(uint32_t preambleLength);
618 
626  int16_t setBitRate(uint16_t br);
627 
635  int16_t setFrequencyDeviation(float freqDev) override;
636 
645  int16_t setDataShaping(uint8_t sh) override;
646 
656  int16_t setSyncWord(uint8_t* syncWord, uint8_t len);
657 
669  int16_t setCRC(uint8_t len, uint32_t initial = 0x1D0F, uint16_t polynomial = 0x1021);
670 
678  int16_t setWhitening(bool enabled);
679 
687  int16_t setAccessAddress(uint32_t addr);
688 
694  float getRSSI();
695 
701  float getSNR();
702 
710  size_t getPacketLength(bool update = true) override;
711 
719  uint32_t getTimeOnAir(size_t len);
720 
726  int16_t implicitHeader(size_t len);
727 
735  int16_t explicitHeader();
736 
744  int16_t setEncoding(uint8_t encoding) override;
745 
754  void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn);
755 
761  uint8_t random();
762 
763 #ifndef RADIOLIB_GODMODE
764  protected:
765 #endif
766  Module* _mod;
767 
768  // cached LoRa parameters
769  float _bwKhz = 0;
770  uint8_t _bw = 0, _sf = 0, _cr = 0;
771  uint8_t _preambleLengthLoRa = 0, _headerType = 0, _payloadLen = 0, _crcLoRa = 0;
772 
773  // SX128x SPI command implementations
774  uint8_t getStatus();
775  int16_t writeRegister(uint16_t addr, uint8_t* data, uint8_t numBytes);
776  int16_t readRegister(uint16_t addr, uint8_t* data, uint8_t numBytes);
777  int16_t writeBuffer(uint8_t* data, uint8_t numBytes, uint8_t offset = 0x00);
778  int16_t readBuffer(uint8_t* data, uint8_t numBytes);
779  int16_t setTx(uint16_t periodBaseCount = SX128X_TX_TIMEOUT_NONE, uint8_t periodBase = SX128X_PERIOD_BASE_15_625_US);
780  int16_t setRx(uint16_t periodBaseCount, uint8_t periodBase = SX128X_PERIOD_BASE_15_625_US);
781  int16_t setCad();
782  uint8_t getPacketType();
783  int16_t setRfFrequency(uint32_t frf);
784  int16_t setTxParams(uint8_t power, uint8_t rampTime = SX128X_PA_RAMP_10_US);
785  int16_t setBufferBaseAddress(uint8_t txBaseAddress = 0x00, uint8_t rxBaseAddress = 0x00);
786  int16_t setModulationParams(uint8_t modParam1, uint8_t modParam2, uint8_t modParam3);
787  int16_t setPacketParamsGFSK(uint8_t preambleLen, uint8_t syncWordLen, uint8_t syncWordMatch, uint8_t crcLen, uint8_t whitening, uint8_t payloadLen = 0xFF, uint8_t headerType = SX128X_GFSK_FLRC_PACKET_VARIABLE);
788  int16_t setPacketParamsBLE(uint8_t connState, uint8_t crcLen, uint8_t bleTestPayload, uint8_t whitening);
789  int16_t setPacketParamsLoRa(uint8_t preambleLen, uint8_t headerType, uint8_t payloadLen, uint8_t crc, uint8_t invertIQ = SX128X_LORA_IQ_STANDARD);
790  int16_t setDioIrqParams(uint16_t irqMask, uint16_t dio1Mask, uint16_t dio2Mask = SX128X_IRQ_NONE, uint16_t dio3Mask = SX128X_IRQ_NONE);
791  uint16_t getIrqStatus();
792  int16_t clearIrqStatus(uint16_t clearIrqParams = SX128X_IRQ_ALL);
793  int16_t setRangingRole(uint8_t role);
794  int16_t setPacketType(uint8_t type);
795 
796  int16_t setHeaderType(uint8_t headerType, size_t len = 0xFF);
797 
798 #ifndef RADIOLIB_GODMODE
799  private:
800 #endif
801  // common parameters
802  uint8_t _pwr = 0;
803 
804  // cached GFSK parameters
805  float _modIndexReal = 0;
806  uint16_t _brKbps = 0;
807  uint8_t _br = 0, _modIndex = 0, _shaping = 0;
808  uint8_t _preambleLengthGFSK = 0, _syncWordLen = 0, _syncWordMatch = 0, _crcGFSK = 0, _whitening = 0;
809 
810  // cached FLRC parameters
811  uint8_t _crFLRC = 0;
812 
813  // cached BLE parameters
814  uint8_t _connectionState = 0, _crcBLE = 0, _bleTestPayload = 0;
815 
816  int16_t config(uint8_t modem);
817 
818  // common low-level SPI interface
819  int16_t SPIwriteCommand(uint8_t cmd, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
820  int16_t SPIwriteCommand(uint8_t* cmd, uint8_t cmdLen, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
821  int16_t SPIreadCommand(uint8_t cmd, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
822  int16_t SPIreadCommand(uint8_t* cmd, uint8_t cmdLen, uint8_t* data, uint8_t numBytes, bool waitForBusy = true);
823  int16_t SPItransfer(uint8_t* cmd, uint8_t cmdLen, bool write, uint8_t* dataOut, uint8_t* dataIn, uint8_t numBytes, bool waitForBusy, uint32_t timeout = 5000);
824 };
825 
826 #endif
827 
828 #endif
SX128x::explicitHeader
int16_t explicitHeader()
Set explicit header mode for future reception/transmission.
Definition: SX128x.cpp:1117
+
SX128x::setAccessAddress
int16_t setAccessAddress(uint32_t addr)
Sets BLE access address.
Definition: SX128x.cpp:987
+
SX128x::receive
int16_t receive(uint8_t *data, size_t len) override
Blocking binary receive method. Overloads for string-based transmissions are implemented in PhysicalL...
Definition: SX128x.cpp:312
+
SX128x::standby
int16_t standby() override
Sets the module to standby mode (overload for PhysicalLayer compatibility, uses 13 MHz RC oscillator)...
Definition: SX128x.cpp:434
+
SX128x::clearDio1Action
void clearDio1Action()
Clears interrupt service routine to call when DIO1 activates.
Definition: SX128x.cpp:450
PhysicalLayer::startTransmit
int16_t startTransmit(String &str, uint8_t addr=0)
Interrupt-driven Arduino String transmit method. Unlike the standard transmit method, this one is non-blocking. Interrupt pin will be activated when transmission finishes.
Definition: PhysicalLayer.cpp:49
RADIOLIB_SHAPING_0_5
#define RADIOLIB_SHAPING_0_5
Gaussin shaping filter, BT = 0.5.
Definition: TypeDef.h:110
-
SX128x::sleep
int16_t sleep(bool retainConfig=true)
Sets the module to sleep mode.
Definition: SX128x.cpp:414
-
SX128x::implicitHeader
int16_t implicitHeader(size_t len)
Set implicit header mode for future reception/transmission.
Definition: SX128x.cpp:1109
-
SX128x::setEncoding
int16_t setEncoding(uint8_t encoding) override
Sets transmission encoding. Serves only as alias for PhysicalLayer compatibility. ...
Definition: SX128x.cpp:1117
-
SX128x::reset
int16_t reset(bool verify=true)
Reset method. Will reset the chip to the default state using RST pin.
Definition: SX128x.cpp:227
-
SX128x::setSyncWord
int16_t setSyncWord(uint8_t *syncWord, uint8_t len)
Sets FSK/FLRC sync word in the form of array of up to 5 bytes (FSK). For FLRC modem, the sync word must be exactly 4 bytes long.
Definition: SX128x.cpp:851
-
SX128x::transmit
int16_t transmit(uint8_t *data, size_t len, uint8_t addr=0) override
Blocking binary transmit method. Overloads for string-based transmissions are implemented in Physical...
Definition: SX128x.cpp:260
-
SX128x::getSNR
float getSNR()
Gets SNR (Signal to Noise Ratio) of the last received packet. Only available for LoRa or ranging mode...
Definition: SX128x.cpp:1018
-
SX128x::setBitRate
int16_t setBitRate(uint16_t br)
Sets FSK or FLRC bit rate. Allowed values are 125, 250, 400, 500, 800, 1000, 1600 and 2000 kbps (for ...
Definition: SX128x.cpp:737
-
SX128x::getTimeOnAir
uint32_t getTimeOnAir(size_t len)
Get expected time-on-air for a given size of payload.
Definition: SX128x.cpp:1045
-
SX128x::beginGFSK
int16_t beginGFSK(float freq=2400.0, uint16_t br=800, float freqDev=400.0, int8_t power=10, uint16_t preambleLength=16)
Initialization method for GFSK modem.
Definition: SX128x.cpp:59
-
SX128x::getPacketLength
size_t getPacketLength(bool update=true) override
Query modem for the packet length of received payload.
Definition: SX128x.cpp:1038
-
SX128x::setSpreadingFactor
int16_t setSpreadingFactor(uint8_t sf)
Sets LoRa spreading factor. Allowed values range from 5 to 12.
Definition: SX128x.cpp:621
-
SX128x::setWhitening
int16_t setWhitening(bool enabled)
Sets whitening parameters, not available for LoRa or FLRC modem.
Definition: SX128x.cpp:963
-
SX128x::random
uint8_t random()
Dummy random method, to ensure PhysicalLayer compatibility.
Definition: SX128x.cpp:1125
-
SX128x::setBandwidth
int16_t setBandwidth(float bw)
Sets LoRa bandwidth. Allowed values are 203.125, 406.25, 812.5 and 1625.0 kHz.
Definition: SX128x.cpp:591
-
SX128x::setCRC
int16_t setCRC(uint8_t len, uint32_t initial=0x1D0F, uint16_t polynomial=0x1021)
Sets CRC configuration.
Definition: SX128x.cpp:899
-
SX128x::receiveDirect
int16_t receiveDirect() override
Starts direct mode reception. Only implemented for PhysicalLayer compatibility, as SX128x series does...
Definition: SX128x.cpp:361
-
SX128x::setRfSwitchPins
void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)
Some modules contain external RF switch controlled by two pins. This function gives RadioLib control ...
Definition: SX128x.cpp:1121
-
SX128x::setDio1Action
void setDio1Action(void(*func)(void))
Sets interrupt service routine to call when DIO1 activates.
Definition: SX128x.cpp:442
+
SX128x::sleep
int16_t sleep(bool retainConfig=true)
Sets the module to sleep mode.
Definition: SX128x.cpp:418
+
SX128x::implicitHeader
int16_t implicitHeader(size_t len)
Set implicit header mode for future reception/transmission.
Definition: SX128x.cpp:1113
+
SX128x::setEncoding
int16_t setEncoding(uint8_t encoding) override
Sets transmission encoding. Serves only as alias for PhysicalLayer compatibility. ...
Definition: SX128x.cpp:1121
+
SX128x::reset
int16_t reset(bool verify=true)
Reset method. Will reset the chip to the default state using RST pin.
Definition: SX128x.cpp:231
+
SX128x::setSyncWord
int16_t setSyncWord(uint8_t *syncWord, uint8_t len)
Sets FSK/FLRC sync word in the form of array of up to 5 bytes (FSK). For FLRC modem, the sync word must be exactly 4 bytes long.
Definition: SX128x.cpp:855
+
SX128x::transmit
int16_t transmit(uint8_t *data, size_t len, uint8_t addr=0) override
Blocking binary transmit method. Overloads for string-based transmissions are implemented in Physical...
Definition: SX128x.cpp:264
+
SX128x::getSNR
float getSNR()
Gets SNR (Signal to Noise Ratio) of the last received packet. Only available for LoRa or ranging mode...
Definition: SX128x.cpp:1022
+
SX128x::setBitRate
int16_t setBitRate(uint16_t br)
Sets FSK or FLRC bit rate. Allowed values are 125, 250, 400, 500, 800, 1000, 1600 and 2000 kbps (for ...
Definition: SX128x.cpp:741
+
SX128x::getTimeOnAir
uint32_t getTimeOnAir(size_t len)
Get expected time-on-air for a given size of payload.
Definition: SX128x.cpp:1049
+
SX128x::beginGFSK
int16_t beginGFSK(float freq=2400.0, uint16_t br=800, float freqDev=400.0, int8_t power=10, uint16_t preambleLength=16)
Initialization method for GFSK modem.
Definition: SX128x.cpp:60
+
SX128x::getPacketLength
size_t getPacketLength(bool update=true) override
Query modem for the packet length of received payload.
Definition: SX128x.cpp:1042
+
SX128x::setSpreadingFactor
int16_t setSpreadingFactor(uint8_t sf)
Sets LoRa spreading factor. Allowed values range from 5 to 12.
Definition: SX128x.cpp:625
+
SX128x::setWhitening
int16_t setWhitening(bool enabled)
Sets whitening parameters, not available for LoRa or FLRC modem.
Definition: SX128x.cpp:967
+
SX128x::random
uint8_t random()
Dummy random method, to ensure PhysicalLayer compatibility.
Definition: SX128x.cpp:1129
+
SX128x::setBandwidth
int16_t setBandwidth(float bw)
Sets LoRa bandwidth. Allowed values are 203.125, 406.25, 812.5 and 1625.0 kHz.
Definition: SX128x.cpp:595
+
SX128x::setCRC
int16_t setCRC(uint8_t len, uint32_t initial=0x1D0F, uint16_t polynomial=0x1021)
Sets CRC configuration.
Definition: SX128x.cpp:903
+
SX128x::receiveDirect
int16_t receiveDirect() override
Starts direct mode reception. Only implemented for PhysicalLayer compatibility, as SX128x series does...
Definition: SX128x.cpp:365
+
SX128x::setRfSwitchPins
void setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn)
Some modules contain external RF switch controlled by two pins. This function gives RadioLib control ...
Definition: SX128x.cpp:1125
+
SX128x::setDio1Action
void setDio1Action(void(*func)(void))
Sets interrupt service routine to call when DIO1 activates.
Definition: SX128x.cpp:446
Module
Implements all common low-level SPI/UART/I2C methods to control the wireless module. Every module class contains one private instance of this class.
Definition: Module.h:17
PhysicalLayer::transmit
int16_t transmit(__FlashStringHelper *fstr, uint8_t addr=0)
Arduino Flash String transmit method.
Definition: PhysicalLayer.cpp:8
SX128x
Base class for SX128x series. All derived classes for SX128x (e.g. SX1280 or SX1281) inherit from thi...
Definition: SX128x.h:339
PhysicalLayer::receive
int16_t receive(String &str, size_t len=0)
Arduino String receive method.
Definition: PhysicalLayer.cpp:98
-
SX128x::setFrequency
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values are in range from 2400.0 to 2500.0 MHz.
Definition: SX128x.cpp:583
-
SX128x::beginBLE
int16_t beginBLE(float freq=2400.0, uint16_t br=800, float freqDev=400.0, int8_t power=10, uint8_t dataShaping=RADIOLIB_SHAPING_0_5)
Initialization method for BLE modem.
Definition: SX128x.cpp:121
-
SX128x::readData
int16_t readData(uint8_t *data, size_t len) override
Reads data received after calling startReceive method.
Definition: SX128x.cpp:547
+
SX128x::setFrequency
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values are in range from 2400.0 to 2500.0 MHz.
Definition: SX128x.cpp:587
+
SX128x::beginBLE
int16_t beginBLE(float freq=2400.0, uint16_t br=800, float freqDev=400.0, int8_t power=10, uint8_t dataShaping=RADIOLIB_SHAPING_0_5)
Initialization method for BLE modem.
Definition: SX128x.cpp:123
+
SX128x::readData
int16_t readData(uint8_t *data, size_t len) override
Reads data received after calling startReceive method.
Definition: SX128x.cpp:551
PhysicalLayer
Provides common interface for protocols that run on LoRa/FSK modules, such as RTTY or LoRaWAN...
Definition: PhysicalLayer.h:13
-
SX128x::scanChannel
int16_t scanChannel()
Performs scan for LoRa transmission in the current channel. Detects both preamble and payload...
Definition: SX128x.cpp:369
+
SX128x::scanChannel
int16_t scanChannel()
Performs scan for LoRa transmission in the current channel. Detects both preamble and payload...
Definition: SX128x.cpp:373
SX128x::SX128x
SX128x(Module *mod)
Default constructor.
Definition: SX128x.cpp:4
-
SX128x::getRSSI
float getRSSI()
Gets RSSI (Recorded Signal Strength Indicator) of the last received packet.
Definition: SX128x.cpp:994
-
SX128x::setPreambleLength
int16_t setPreambleLength(uint32_t preambleLength)
Sets preamble length for currently active modem. Allowed values range from 1 to 65535.
Definition: SX128x.cpp:689
-
SX128x::setCodingRate
int16_t setCodingRate(uint8_t cr, bool longInterleaving=false)
Sets LoRa coding rate denominator. Allowed values range from 5 to 8.
Definition: SX128x.cpp:655
-
SX128x::beginFLRC
int16_t beginFLRC(float freq=2400.0, uint16_t br=650, uint8_t cr=3, int8_t power=10, uint16_t preambleLength=16, uint8_t dataShaping=RADIOLIB_SHAPING_0_5)
Initialization method for FLRC modem.
Definition: SX128x.cpp:169
+
SX128x::getRSSI
float getRSSI()
Gets RSSI (Recorded Signal Strength Indicator) of the last received packet.
Definition: SX128x.cpp:998
+
SX128x::setPreambleLength
int16_t setPreambleLength(uint32_t preambleLength)
Sets preamble length for currently active modem. Allowed values range from 1 to 65535.
Definition: SX128x.cpp:693
+
SX128x::setCodingRate
int16_t setCodingRate(uint8_t cr, bool longInterleaving=false)
Sets LoRa coding rate denominator. Allowed values range from 5 to 8.
Definition: SX128x.cpp:659
+
SX128x::beginFLRC
int16_t beginFLRC(float freq=2400.0, uint16_t br=650, uint8_t cr=3, int8_t power=10, uint16_t preambleLength=16, uint8_t dataShaping=RADIOLIB_SHAPING_0_5)
Initialization method for FLRC modem.
Definition: SX128x.cpp:172
SX128x::begin
int16_t begin(float freq=2400.0, float bw=812.5, uint8_t sf=9, uint8_t cr=7, int8_t power=10, uint16_t preambleLength=12)
Initialization method for LoRa modem.
Definition: SX128x.cpp:8
-
SX128x::startReceive
int16_t startReceive(uint16_t timeout=SX128X_RX_TIMEOUT_INF)
Interrupt-driven receive method. DIO1 will be activated when full packet is received.
Definition: SX128x.cpp:514
-
SX128x::setDataShaping
int16_t setDataShaping(uint8_t sh) override
Sets time-bandwidth product of Gaussian filter applied for shaping. Allowed values are RADIOLIB_SHAPI...
Definition: SX128x.cpp:821
-
SX128x::setFrequencyDeviation
int16_t setFrequencyDeviation(float freqDev) override
Sets FSK frequency deviation. Allowed values range from 0.0 to 3200.0 kHz.
Definition: SX128x.cpp:794
-
SX128x::transmitDirect
int16_t transmitDirect(uint32_t frf=0) override
Starts direct mode transmission.
Definition: SX128x.cpp:346
-
SX128x::setOutputPower
int16_t setOutputPower(int8_t power)
Sets output power. Allowed values are in range from -18 to 13 dBm.
Definition: SX128x.cpp:683
+
SX128x::startReceive
int16_t startReceive(uint16_t timeout=SX128X_RX_TIMEOUT_INF)
Interrupt-driven receive method. DIO1 will be activated when full packet is received.
Definition: SX128x.cpp:518
+
SX128x::setDataShaping
int16_t setDataShaping(uint8_t sh) override
Sets time-bandwidth product of Gaussian filter applied for shaping. Allowed values are RADIOLIB_SHAPI...
Definition: SX128x.cpp:825
+
SX128x::setFrequencyDeviation
int16_t setFrequencyDeviation(float freqDev) override
Sets FSK frequency deviation. Allowed values range from 0.0 to 3200.0 kHz.
Definition: SX128x.cpp:798
+
SX128x::transmitDirect
int16_t transmitDirect(uint32_t frf=0) override
Starts direct mode transmission.
Definition: SX128x.cpp:350
+
SX128x::setOutputPower
int16_t setOutputPower(int8_t power)
Sets output power. Allowed values are in range from -18 to 13 dBm.
Definition: SX128x.cpp:687
PhysicalLayer::readData
int16_t readData(String &str, size_t len=0)
Reads data that was received after calling startReceive method.
Definition: PhysicalLayer.cpp:57
-
SX128x::startTransmit
int16_t startTransmit(uint8_t *data, size_t len, uint8_t addr=0) override
Interrupt-driven binary transmit method. Overloads for string-based transmissions are implemented in ...
Definition: SX128x.cpp:450
+
SX128x::startTransmit
int16_t startTransmit(uint8_t *data, size_t len, uint8_t addr=0) override
Interrupt-driven binary transmit method. Overloads for string-based transmissions are implemented in ...
Definition: SX128x.cpp:454
diff --git a/_si4430_8h_source.html b/_si4430_8h_source.html index 224aadb9..96054728 100644 --- a/_si4430_8h_source.html +++ b/_si4430_8h_source.html @@ -84,12 +84,12 @@ $(document).ready(function(){initNavTree('_si4430_8h_source.html','');});
Si4430.h
-
1 #if !defined(_RADIOLIB_SI4430_H)
2 #define _RADIOLIB_SI4430_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SI443X)
7 
8 #include "../../Module.h"
9 #include "Si4432.h"
10 
16 class Si4430: public Si4432 {
17  public:
18 
19  // constructor
20 
26  Si4430(Module* mod);
27 
28  // basic methods
29 
47  int16_t begin(float freq = 434.0, float br = 48.0, float freqDev = 50.0, float rxBw = 181.1, int8_t power = 10, uint8_t preambleLen = 16);
48 
49  // configuration methods
50 
58  int16_t setFrequency(float freq);
59 
67  int16_t setOutputPower(int8_t power);
68 
69 
70 #ifndef RADIOLIB_GODMODE
71  protected:
72 #endif
73 
74 #ifndef RADIOLIB_GODMODE
75  private:
76 #endif
77 };
78 
79 #endif
80 
81 #endif
Si4430::setFrequency
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values range from 900.0 MHz to 960.0 MHz.
Definition: Si4430.cpp:23
+
1 #if !defined(_RADIOLIB_SI4430_H)
2 #define _RADIOLIB_SI4430_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SI443X)
7 
8 #include "../../Module.h"
9 #include "Si4432.h"
10 
16 class Si4430: public Si4432 {
17  public:
18 
19  // constructor
20 
26  Si4430(Module* mod);
27 
28  // basic methods
29 
47  int16_t begin(float freq = 434.0, float br = 48.0, float freqDev = 50.0, float rxBw = 181.1, int8_t power = 10, uint8_t preambleLen = 16);
48 
49  // configuration methods
50 
58  int16_t setFrequency(float freq);
59 
67  int16_t setOutputPower(int8_t power);
68 
69 
70 #ifndef RADIOLIB_GODMODE
71  protected:
72 #endif
73 
74 #ifndef RADIOLIB_GODMODE
75  private:
76 #endif
77 };
78 
79 #endif
80 
81 #endif
Si4430::setFrequency
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values range from 900.0 MHz to 960.0 MHz.
Definition: Si4430.cpp:24
Si4430::begin
int16_t begin(float freq=434.0, float br=48.0, float freqDev=50.0, float rxBw=181.1, int8_t power=10, uint8_t preambleLen=16)
Initialization method. Must be called at least once from Arduino sketch to initialize the module...
Definition: Si4430.cpp:8
Si4432
Derived class for Si4432 modules.
Definition: Si4432.h:16
Si4430::Si4430
Si4430(Module *mod)
Default constructor.
Definition: Si4430.cpp:4
Module
Implements all common low-level SPI/UART/I2C methods to control the wireless module. Every module class contains one private instance of this class.
Definition: Module.h:17
-
Si4430::setOutputPower
int16_t setOutputPower(int8_t power)
Sets output power. Allowed values range from -8 to 13 dBm in 3 dBm steps.
Definition: Si4430.cpp:30
+
Si4430::setOutputPower
int16_t setOutputPower(int8_t power)
Sets output power. Allowed values range from -8 to 13 dBm in 3 dBm steps.
Definition: Si4430.cpp:31
Si4430
Derived class for Si4430 modules.
Definition: Si4430.h:16
diff --git a/_si4431_8h_source.html b/_si4431_8h_source.html index 15cf940d..416f4752 100644 --- a/_si4431_8h_source.html +++ b/_si4431_8h_source.html @@ -85,7 +85,7 @@ $(document).ready(function(){initNavTree('_si4431_8h_source.html','');});
1 #if !defined(_RADIOLIB_SI4431_H)
2 #define _RADIOLIB_SI4431_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SI443X)
7 
8 #include "../../Module.h"
9 #include "Si4432.h"
10 
16 class Si4431: public Si4432 {
17  public:
18 
19  // constructor
20 
26  Si4431(Module* mod);
27 
28  // basic methods
29 
47  int16_t begin(float freq = 434.0, float br = 48.0, float freqDev = 50.0, float rxBw = 181.1, int8_t power = 10, uint8_t preambleLen = 16);
48 
49  // configuration methods
50 
58  int16_t setOutputPower(int8_t power);
59 
60 
61 #ifndef RADIOLIB_GODMODE
62  protected:
63 #endif
64 
65 #ifndef RADIOLIB_GODMODE
66  private:
67 #endif
68 };
69 
70 #endif
71 
72 #endif
Si4432
Derived class for Si4432 modules.
Definition: Si4432.h:16
-
Si4431::setOutputPower
int16_t setOutputPower(int8_t power)
Sets output power. Allowed values range from -8 to 13 dBm in 3 dBm steps.
Definition: Si4431.cpp:23
+
Si4431::setOutputPower
int16_t setOutputPower(int8_t power)
Sets output power. Allowed values range from -8 to 13 dBm in 3 dBm steps.
Definition: Si4431.cpp:24
Module
Implements all common low-level SPI/UART/I2C methods to control the wireless module. Every module class contains one private instance of this class.
Definition: Module.h:17
Si4431
Derived class for Si4431 modules.
Definition: Si4431.h:16
Si4431::begin
int16_t begin(float freq=434.0, float br=48.0, float freqDev=50.0, float rxBw=181.1, int8_t power=10, uint8_t preambleLen=16)
Initialization method. Must be called at least once from Arduino sketch to initialize the module...
Definition: Si4431.cpp:8
diff --git a/_si4432_8h_source.html b/_si4432_8h_source.html index 5967fcb0..8a3a6329 100644 --- a/_si4432_8h_source.html +++ b/_si4432_8h_source.html @@ -84,12 +84,12 @@ $(document).ready(function(){initNavTree('_si4432_8h_source.html','');});
Si4432.h
-
1 #if !defined(_RADIOLIB_SI4432_H)
2 #define _RADIOLIB_SI4432_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SI443X)
7 
8 #include "../../Module.h"
9 #include "Si443x.h"
10 
16 class Si4432: public Si443x {
17  public:
18 
19  // constructor
20 
26  Si4432(Module* mod);
27 
28  // basic methods
29 
47  int16_t begin(float freq = 434.0, float br = 48.0, float freqDev = 50.0, float rxBw = 181.1, int8_t power = 10, uint8_t preambleLen = 16);
48 
49  // configuration methods
50 
58  int16_t setFrequency(float freq);
59 
67  int16_t setOutputPower(int8_t power);
68 
69 
70 #ifndef RADIOLIB_GODMODE
71  protected:
72 #endif
73 
74 #ifndef RADIOLIB_GODMODE
75  private:
76 #endif
77 };
78 
79 #endif
80 
81 #endif
Si4432::setFrequency
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values range from 240.0 MHz to 930.0 MHz.
Definition: Si4432.cpp:23
+
1 #if !defined(_RADIOLIB_SI4432_H)
2 #define _RADIOLIB_SI4432_H
3 
4 #include "../../TypeDef.h"
5 
6 #if !defined(RADIOLIB_EXCLUDE_SI443X)
7 
8 #include "../../Module.h"
9 #include "Si443x.h"
10 
16 class Si4432: public Si443x {
17  public:
18 
19  // constructor
20 
26  Si4432(Module* mod);
27 
28  // basic methods
29 
47  int16_t begin(float freq = 434.0, float br = 48.0, float freqDev = 50.0, float rxBw = 181.1, int8_t power = 10, uint8_t preambleLen = 16);
48 
49  // configuration methods
50 
58  int16_t setFrequency(float freq);
59 
67  int16_t setOutputPower(int8_t power);
68 
69 
70 #ifndef RADIOLIB_GODMODE
71  protected:
72 #endif
73 
74 #ifndef RADIOLIB_GODMODE
75  private:
76 #endif
77 };
78 
79 #endif
80 
81 #endif
Si4432::setFrequency
int16_t setFrequency(float freq)
Sets carrier frequency. Allowed values range from 240.0 MHz to 930.0 MHz.
Definition: Si4432.cpp:24
Si4432
Derived class for Si4432 modules.
Definition: Si4432.h:16
Si4432::begin
int16_t begin(float freq=434.0, float br=48.0, float freqDev=50.0, float rxBw=181.1, int8_t power=10, uint8_t preambleLen=16)
Initialization method. Must be called at least once from Arduino sketch to initialize the module...
Definition: Si4432.cpp:8
Si443x
Base class for Si443x series. All derived classes for Si443x (e.g. Si4431 or Si4432) inherit from thi...
Definition: Si443x.h:554
Module
Implements all common low-level SPI/UART/I2C methods to control the wireless module. Every module class contains one private instance of this class.
Definition: Module.h:17
-
Si4432::setOutputPower
int16_t setOutputPower(int8_t power)
Sets output power. Allowed values range from -1 to 20 dBm in 3 dBm steps.
Definition: Si4432.cpp:30
+
Si4432::setOutputPower
int16_t setOutputPower(int8_t power)
Sets output power. Allowed values range from -1 to 20 dBm in 3 dBm steps.
Definition: Si4432.cpp:31
Si4432::Si4432
Si4432(Module *mod)
Default constructor.
Definition: Si4432.cpp:4
diff --git a/n_r_f24_8h_source.html b/n_r_f24_8h_source.html index 63d10b97..380eb390 100644 --- a/n_r_f24_8h_source.html +++ b/n_r_f24_8h_source.html @@ -84,41 +84,41 @@ $(document).ready(function(){initNavTree('n_r_f24_8h_source.html','');});
nRF24.h
-
1 #if !defined(_RADIOLIB_NRF24_H) && !defined(RADIOLIB_EXCLUDE_NRF24)
2 #define _RADIOLIB_NRF24_H
3 
4 #include "../../Module.h"
5 #include "../../TypeDef.h"
6 
7 #include "../../protocols/PhysicalLayer/PhysicalLayer.h"
8 
9 // nRF24 physical layer properties
10 #define NRF24_FREQUENCY_STEP_SIZE 1000000.0
11 #define NRF24_MAX_PACKET_LENGTH 32
12 
13 // nRF24 SPI commands
14 #define NRF24_CMD_READ 0b00000000
15 #define NRF24_CMD_WRITE 0b00100000
16 #define NRF24_CMD_READ_RX_PAYLOAD 0b01100001
17 #define NRF24_CMD_WRITE_TX_PAYLOAD 0b10100000
18 #define NRF24_CMD_FLUSH_TX 0b11100001
19 #define NRF24_CMD_FLUSH_RX 0b11100010
20 #define NRF24_CMD_REUSE_TX_PAXLOAD 0b11100011
21 #define NRF24_CMD_READ_RX_PAYLOAD_WIDTH 0b01100000
22 #define NRF24_CMD_WRITE_ACK_PAYLOAD 0b10101000
23 #define NRF24_CMD_WRITE_TX_PAYLOAD_NOACK 0b10110000
24 #define NRF24_CMD_NOP 0b11111111
25 
26 // nRF24 register map
27 #define NRF24_REG_CONFIG 0x00
28 #define NRF24_REG_EN_AA 0x01
29 #define NRF24_REG_EN_RXADDR 0x02
30 #define NRF24_REG_SETUP_AW 0x03
31 #define NRF24_REG_SETUP_RETR 0x04
32 #define NRF24_REG_RF_CH 0x05
33 #define NRF24_REG_RF_SETUP 0x06
34 #define NRF24_REG_STATUS 0x07
35 #define NRF24_REG_OBSERVE_TX 0x08
36 #define NRF24_REG_RPD 0x09
37 #define NRF24_REG_RX_ADDR_P0 0x0A
38 #define NRF24_REG_RX_ADDR_P1 0x0B
39 #define NRF24_REG_RX_ADDR_P2 0x0C
40 #define NRF24_REG_RX_ADDR_P3 0x0D
41 #define NRF24_REG_RX_ADDR_P4 0x0E
42 #define NRF24_REG_RX_ADDR_P5 0x0F
43 #define NRF24_REG_TX_ADDR 0x10
44 #define NRF24_REG_RX_PW_P0 0x11
45 #define NRF24_REG_RX_PW_P1 0x12
46 #define NRF24_REG_RX_PW_P2 0x13
47 #define NRF24_REG_RX_PW_P3 0x14
48 #define NRF24_REG_RX_PW_P4 0x15
49 #define NRF24_REG_RX_PW_P5 0x16
50 #define NRF24_REG_FIFO_STATUS 0x17
51 #define NRF24_REG_DYNPD 0x1C
52 #define NRF24_REG_FEATURE 0x1D
53 
54 // NRF24_REG_CONFIG MSB LSB DESCRIPTION
55 #define NRF24_MASK_RX_DR_IRQ_OFF 0b01000000 // 6 6 RX_DR will not be reflected on IRQ pin
56 #define NRF24_MASK_RX_DR_IRQ_ON 0b00000000 // 6 6 RX_DR will be reflected on IRQ pin as active low (default)
57 #define NRF24_MASK_TX_DS_IRQ_OFF 0b00100000 // 5 5 TX_DS will not be reflected on IRQ pin
58 #define NRF24_MASK_TX_DS_IRQ_ON 0b00000000 // 5 5 TX_DS will be reflected on IRQ pin as active low (default)
59 #define NRF24_MASK_MAX_RT_IRQ_OFF 0b00010000 // 4 4 MAX_RT will not be reflected on IRQ pin
60 #define NRF24_MASK_MAX_RT_IRQ_ON 0b00000000 // 4 4 MAX_RT will be reflected on IRQ pin as active low (default)
61 #define NRF24_CRC_OFF 0b00000000 // 3 3 CRC calculation: disabled
62 #define NRF24_CRC_ON 0b00001000 // 3 3 enabled (default)
63 #define NRF24_CRC_8 0b00000000 // 2 2 CRC scheme: CRC8 (default)
64 #define NRF24_CRC_16 0b00000100 // 2 2 CRC16
65 #define NRF24_POWER_UP 0b00000010 // 1 1 power up
66 #define NRF24_POWER_DOWN 0b00000000 // 1 1 power down
67 #define NRF24_PTX 0b00000000 // 0 0 enable primary Tx
68 #define NRF24_PRX 0b00000001 // 0 0 enable primary Rx
69 
70 // NRF24_REG_EN_AA
71 #define NRF24_AA_ALL_OFF 0b00000000 // 5 0 auto-ACK on all pipes: disabled
72 #define NRF24_AA_ALL_ON 0b00111111 // 5 0 enabled (default)
73 #define NRF24_AA_P5_OFF 0b00000000 // 5 5 auto-ACK on pipe 5: disabled
74 #define NRF24_AA_P5_ON 0b00100000 // 5 5 enabled (default)
75 #define NRF24_AA_P4_OFF 0b00000000 // 4 4 auto-ACK on pipe 4: disabled
76 #define NRF24_AA_P4_ON 0b00010000 // 4 4 enabled (default)
77 #define NRF24_AA_P3_OFF 0b00000000 // 3 3 auto-ACK on pipe 3: disabled
78 #define NRF24_AA_P3_ON 0b00001000 // 3 3 enabled (default)
79 #define NRF24_AA_P2_OFF 0b00000000 // 2 2 auto-ACK on pipe 2: disabled
80 #define NRF24_AA_P2_ON 0b00000100 // 2 2 enabled (default)
81 #define NRF24_AA_P1_OFF 0b00000000 // 1 1 auto-ACK on pipe 1: disabled
82 #define NRF24_AA_P1_ON 0b00000010 // 1 1 enabled (default)
83 #define NRF24_AA_P0_OFF 0b00000000 // 0 0 auto-ACK on pipe 0: disabled
84 #define NRF24_AA_P0_ON 0b00000001 // 0 0 enabled (default)
85 
86 // NRF24_REG_EN_RXADDR
87 #define NRF24_P5_OFF 0b00000000 // 5 5 receive pipe 5: disabled (default)
88 #define NRF24_P5_ON 0b00100000 // 5 5 enabled
89 #define NRF24_P4_OFF 0b00000000 // 4 4 receive pipe 4: disabled (default)
90 #define NRF24_P4_ON 0b00010000 // 4 4 enabled
91 #define NRF24_P3_OFF 0b00000000 // 3 3 receive pipe 3: disabled (default)
92 #define NRF24_P3_ON 0b00001000 // 3 3 enabled
93 #define NRF24_P2_OFF 0b00000000 // 2 2 receive pipe 2: disabled (default)
94 #define NRF24_P2_ON 0b00000100 // 2 2 enabled
95 #define NRF24_P1_OFF 0b00000000 // 1 1 receive pipe 1: disabled
96 #define NRF24_P1_ON 0b00000010 // 1 1 enabled (default)
97 #define NRF24_P0_OFF 0b00000000 // 0 0 receive pipe 0: disabled
98 #define NRF24_P0_ON 0b00000001 // 0 0 enabled (default)
99 
100 // NRF24_REG_SETUP_AW
101 #define NRF24_ADDRESS_2_BYTES 0b00000000 // 1 0 address width: 2 bytes
102 #define NRF24_ADDRESS_3_BYTES 0b00000001 // 1 0 3 bytes
103 #define NRF24_ADDRESS_4_BYTES 0b00000010 // 1 0 4 bytes
104 #define NRF24_ADDRESS_5_BYTES 0b00000011 // 1 0 5 bytes (default)
105 
106 // NRF24_REG_SETUP_RETR
107 #define NRF24_ARD 0b00000000 // 7 4 auto retransmit delay: t[us] = (NRF24_ARD + 1) * 250 us
108 #define NRF24_ARC_OFF 0b00000000 // 3 0 auto retransmit count: auto retransmit disabled
109 #define NRF24_ARC 0b00000011 // 3 0 up to 3 retransmits on AA fail (default)
110 
111 // NRF24_REG_RF_CH
112 #define NRF24_RF_CH 0b00000010 // 6 0 RF channel: f_CH[MHz] = 2400 MHz + NRF24_RF_CH
113 
114 // NRF24_REG_RF_SETUP
115 #define NRF24_CONT_WAVE_OFF 0b00000000 // 7 7 continuous carrier transmit: disabled (default)
116 #define NRF24_CONT_WAVE_ON 0b10000000 // 7 7 enabled
117 #define NRF24_DR_250_KBPS 0b00100000 // 5 5 data rate: 250 kbps
118 #define NRF24_DR_1_MBPS 0b00000000 // 3 3 1 Mbps (default)
119 #define NRF24_DR_2_MBPS 0b00001000 // 3 3 2 Mbps
120 #define NRF24_PLL_LOCK_ON 0b00010000 // 4 4 force PLL lock: enabled
121 #define NRF24_PLL_LOCK_OFF 0b00000000 // 4 4 disabled (default)
122 #define NRF24_RF_PWR_18_DBM 0b00000000 // 2 1 output power: -18 dBm
123 #define NRF24_RF_PWR_12_DBM 0b00000010 // 2 1 -12 dBm
124 #define NRF24_RF_PWR_6_DBM 0b00000100 // 2 1 -6 dBm
125 #define NRF24_RF_PWR_0_DBM 0b00000110 // 2 1 0 dBm (default)
126 
127 // NRF24_REG_STATUS
128 #define NRF24_RX_DR 0b01000000 // 6 6 Rx data ready
129 #define NRF24_TX_DS 0b00100000 // 5 5 Tx data sent
130 #define NRF24_MAX_RT 0b00010000 // 4 4 maximum number of retransmits reached (must be cleared to continue)
131 #define NRF24_RX_FIFO_EMPTY 0b00001110 // 3 1 Rx FIFO is empty
132 #define NRF24_RX_P_NO 0b00000000 // 3 1 number of data pipe that received data
133 #define NRF24_TX_FIFO_FULL 0b00000001 // 0 0 Tx FIFO is full
134 
135 // NRF24_REG_OBSERVE_TX
136 #define NRF24_PLOS_CNT 0b00000000 // 7 4 number of lost packets
137 #define NRF24_ARC_CNT 0b00000000 // 3 0 number of retransmitted packets
138 
139 // NRF24_REG_RPD
140 #define NRF24_RP_BELOW_64_DBM 0b00000000 // 0 0 received power in the current channel: less than -64 dBm
141 #define NRF24_RP_ABOVE_64_DBM 0b00000001 // 0 0 more than -64 dBm
142 
143 // NRF24_REG_FIFO_STATUS
144 #define NRF24_TX_REUSE 0b01000000 // 6 6 reusing last transmitted payload
145 #define NRF24_TX_FIFO_FULL_FLAG 0b00100000 // 5 5 Tx FIFO is full
146 #define NRF24_TX_FIFO_EMPTY_FLAG 0b00010000 // 4 4 Tx FIFO is empty
147 #define NRF24_RX_FIFO_FULL_FLAG 0b00000010 // 1 1 Rx FIFO is full
148 #define NRF24_RX_FIFO_EMPTY_FLAG 0b00000001 // 0 0 Rx FIFO is empty
149 
150 // NRF24_REG_DYNPD
151 #define NRF24_DPL_P5_OFF 0b00000000 // 5 5 dynamic payload length on pipe 5: disabled (default)
152 #define NRF24_DPL_P5_ON 0b00100000 // 5 5 enabled
153 #define NRF24_DPL_P4_OFF 0b00000000 // 4 4 dynamic payload length on pipe 4: disabled (default)
154 #define NRF24_DPL_P4_ON 0b00010000 // 4 4 enabled
155 #define NRF24_DPL_P3_OFF 0b00000000 // 3 3 dynamic payload length on pipe 3: disabled (default)
156 #define NRF24_DPL_P3_ON 0b00001000 // 3 3 enabled
157 #define NRF24_DPL_P2_OFF 0b00000000 // 2 2 dynamic payload length on pipe 2: disabled (default)
158 #define NRF24_DPL_P2_ON 0b00000100 // 2 2 enabled
159 #define NRF24_DPL_P1_OFF 0b00000000 // 1 1 dynamic payload length on pipe 1: disabled (default)
160 #define NRF24_DPL_P1_ON 0b00000010 // 1 1 enabled
161 #define NRF24_DPL_P0_OFF 0b00000000 // 0 0 dynamic payload length on pipe 0: disabled (default)
162 #define NRF24_DPL_P0_ON 0b00000001 // 0 0 enabled
163 #define NRF24_DPL_ALL_OFF 0b00000000 // 5 0 disable all dynamic payloads
164 #define NRF24_DPL_ALL_ON 0b00111111 // 5 0 enable all dynamic payloads
165 
166 // NRF24_REG_FEATURE
167 #define NRF24_DPL_OFF 0b00000000 // 2 2 dynamic payload length: disabled (default)
168 #define NRF24_DPL_ON 0b00000100 // 2 2 enabled
169 #define NRF24_ACK_PAY_OFF 0b00000000 // 1 1 payload with ACK packets: disabled (default)
170 #define NRF24_ACK_PAY_ON 0b00000010 // 1 1 enabled
171 #define NRF24_DYN_ACK_OFF 0b00000000 // 0 0 payloads without ACK: disabled (default)
172 #define NRF24_DYN_ACK_ON 0b00000001 // 0 0 enabled
173 
179 class nRF24: public PhysicalLayer {
180  public:
181  // introduce PhysicalLayer overloads
182  using PhysicalLayer::transmit;
183  using PhysicalLayer::receive;
184  using PhysicalLayer::startTransmit;
185  using PhysicalLayer::readData;
186 
192  nRF24(Module* mod);
193 
194  // basic methods
195 
209  int16_t begin(int16_t freq = 2400, int16_t dataRate = 1000, int8_t power = -12, uint8_t addrWidth = 5);
210 
216  int16_t sleep();
217 
223  int16_t standby() override;
224 
237  int16_t transmit(uint8_t* data, size_t len, uint8_t addr) override;
238 
249  int16_t receive(uint8_t* data, size_t len) override;
250 
258  int16_t transmitDirect(uint32_t frf = 0) override;
259 
265  int16_t receiveDirect() override;
266 
267  // interrupt methods
268 
274  void setIrqAction(void (*func)(void));
275 
288  int16_t startTransmit(uint8_t* data, size_t len, uint8_t addr) override;
289 
295  int16_t startReceive();
296 
306  int16_t readData(uint8_t* data, size_t len) override;
307 
308  // configuration methods
309 
317  int16_t setFrequency(int16_t freq);
318 
326  int16_t setDataRate(int16_t dataRate);
327 
335  int16_t setOutputPower(int8_t power);
336 
344  int16_t setAddressWidth(uint8_t addrWidth);
345 
353  int16_t setTransmitPipe(uint8_t* addr);
354 
364  int16_t setReceivePipe(uint8_t pipeNum, uint8_t* addr);
365 
375  int16_t setReceivePipe(uint8_t pipeNum, uint8_t addrByte);
376 
384  int16_t disablePipe(uint8_t pipeNum);
385 
393  int16_t getStatus(uint8_t mask = 0xFF);
394 
400  bool isCarrierDetected();
401 
409  int16_t setFrequencyDeviation(float freqDev) override;
410 
418  size_t getPacketLength(bool update = true) override;
419 
427  int16_t setCrcFiltering(bool crcOn = true);
428 
436  int16_t setAutoAck(bool autoAckOn = true);
437 
447  int16_t setAutoAck(uint8_t pipeNum, bool autoAckOn);
448 
456  int16_t setDataShaping(uint8_t sh) override;
457 
465  int16_t setEncoding(uint8_t encoding) override;
466 
472  uint8_t random();
473 
474 #ifndef RADIOLIB_GODMODE
475  private:
476 #endif
477  Module* _mod;
478 
479  uint8_t _addrWidth = 0;
480 
481  int16_t config();
482  void clearIRQ();
483 
484  void SPIreadRxPayload(uint8_t* data, uint8_t numBytes);
485  void SPIwriteTxPayload(uint8_t* data, uint8_t numBytes);
486  void SPItransfer(uint8_t cmd, bool write = false, uint8_t* dataOut = NULL, uint8_t* dataIn = NULL, uint8_t numBytes = 0);
487 };
488 
489 #endif
nRF24::setDataRate
int16_t setDataRate(int16_t dataRate)
Sets data rate. Allowed values are 2000, 1000 or 250 kbps.
Definition: nRF24.cpp:250
+
1 #if !defined(_RADIOLIB_NRF24_H) && !defined(RADIOLIB_EXCLUDE_NRF24)
2 #define _RADIOLIB_NRF24_H
3 
4 #include "../../Module.h"
5 #include "../../TypeDef.h"
6 
7 #include "../../protocols/PhysicalLayer/PhysicalLayer.h"
8 
9 // nRF24 physical layer properties
10 #define NRF24_FREQUENCY_STEP_SIZE 1000000.0
11 #define NRF24_MAX_PACKET_LENGTH 32
12 
13 // nRF24 SPI commands
14 #define NRF24_CMD_READ 0b00000000
15 #define NRF24_CMD_WRITE 0b00100000
16 #define NRF24_CMD_READ_RX_PAYLOAD 0b01100001
17 #define NRF24_CMD_WRITE_TX_PAYLOAD 0b10100000
18 #define NRF24_CMD_FLUSH_TX 0b11100001
19 #define NRF24_CMD_FLUSH_RX 0b11100010
20 #define NRF24_CMD_REUSE_TX_PAXLOAD 0b11100011
21 #define NRF24_CMD_READ_RX_PAYLOAD_WIDTH 0b01100000
22 #define NRF24_CMD_WRITE_ACK_PAYLOAD 0b10101000
23 #define NRF24_CMD_WRITE_TX_PAYLOAD_NOACK 0b10110000
24 #define NRF24_CMD_NOP 0b11111111
25 
26 // nRF24 register map
27 #define NRF24_REG_CONFIG 0x00
28 #define NRF24_REG_EN_AA 0x01
29 #define NRF24_REG_EN_RXADDR 0x02
30 #define NRF24_REG_SETUP_AW 0x03
31 #define NRF24_REG_SETUP_RETR 0x04
32 #define NRF24_REG_RF_CH 0x05
33 #define NRF24_REG_RF_SETUP 0x06
34 #define NRF24_REG_STATUS 0x07
35 #define NRF24_REG_OBSERVE_TX 0x08
36 #define NRF24_REG_RPD 0x09
37 #define NRF24_REG_RX_ADDR_P0 0x0A
38 #define NRF24_REG_RX_ADDR_P1 0x0B
39 #define NRF24_REG_RX_ADDR_P2 0x0C
40 #define NRF24_REG_RX_ADDR_P3 0x0D
41 #define NRF24_REG_RX_ADDR_P4 0x0E
42 #define NRF24_REG_RX_ADDR_P5 0x0F
43 #define NRF24_REG_TX_ADDR 0x10
44 #define NRF24_REG_RX_PW_P0 0x11
45 #define NRF24_REG_RX_PW_P1 0x12
46 #define NRF24_REG_RX_PW_P2 0x13
47 #define NRF24_REG_RX_PW_P3 0x14
48 #define NRF24_REG_RX_PW_P4 0x15
49 #define NRF24_REG_RX_PW_P5 0x16
50 #define NRF24_REG_FIFO_STATUS 0x17
51 #define NRF24_REG_DYNPD 0x1C
52 #define NRF24_REG_FEATURE 0x1D
53 
54 // NRF24_REG_CONFIG MSB LSB DESCRIPTION
55 #define NRF24_MASK_RX_DR_IRQ_OFF 0b01000000 // 6 6 RX_DR will not be reflected on IRQ pin
56 #define NRF24_MASK_RX_DR_IRQ_ON 0b00000000 // 6 6 RX_DR will be reflected on IRQ pin as active low (default)
57 #define NRF24_MASK_TX_DS_IRQ_OFF 0b00100000 // 5 5 TX_DS will not be reflected on IRQ pin
58 #define NRF24_MASK_TX_DS_IRQ_ON 0b00000000 // 5 5 TX_DS will be reflected on IRQ pin as active low (default)
59 #define NRF24_MASK_MAX_RT_IRQ_OFF 0b00010000 // 4 4 MAX_RT will not be reflected on IRQ pin
60 #define NRF24_MASK_MAX_RT_IRQ_ON 0b00000000 // 4 4 MAX_RT will be reflected on IRQ pin as active low (default)
61 #define NRF24_CRC_OFF 0b00000000 // 3 3 CRC calculation: disabled
62 #define NRF24_CRC_ON 0b00001000 // 3 3 enabled (default)
63 #define NRF24_CRC_8 0b00000000 // 2 2 CRC scheme: CRC8 (default)
64 #define NRF24_CRC_16 0b00000100 // 2 2 CRC16
65 #define NRF24_POWER_UP 0b00000010 // 1 1 power up
66 #define NRF24_POWER_DOWN 0b00000000 // 1 1 power down
67 #define NRF24_PTX 0b00000000 // 0 0 enable primary Tx
68 #define NRF24_PRX 0b00000001 // 0 0 enable primary Rx
69 
70 // NRF24_REG_EN_AA
71 #define NRF24_AA_ALL_OFF 0b00000000 // 5 0 auto-ACK on all pipes: disabled
72 #define NRF24_AA_ALL_ON 0b00111111 // 5 0 enabled (default)
73 #define NRF24_AA_P5_OFF 0b00000000 // 5 5 auto-ACK on pipe 5: disabled
74 #define NRF24_AA_P5_ON 0b00100000 // 5 5 enabled (default)
75 #define NRF24_AA_P4_OFF 0b00000000 // 4 4 auto-ACK on pipe 4: disabled
76 #define NRF24_AA_P4_ON 0b00010000 // 4 4 enabled (default)
77 #define NRF24_AA_P3_OFF 0b00000000 // 3 3 auto-ACK on pipe 3: disabled
78 #define NRF24_AA_P3_ON 0b00001000 // 3 3 enabled (default)
79 #define NRF24_AA_P2_OFF 0b00000000 // 2 2 auto-ACK on pipe 2: disabled
80 #define NRF24_AA_P2_ON 0b00000100 // 2 2 enabled (default)
81 #define NRF24_AA_P1_OFF 0b00000000 // 1 1 auto-ACK on pipe 1: disabled
82 #define NRF24_AA_P1_ON 0b00000010 // 1 1 enabled (default)
83 #define NRF24_AA_P0_OFF 0b00000000 // 0 0 auto-ACK on pipe 0: disabled
84 #define NRF24_AA_P0_ON 0b00000001 // 0 0 enabled (default)
85 
86 // NRF24_REG_EN_RXADDR
87 #define NRF24_P5_OFF 0b00000000 // 5 5 receive pipe 5: disabled (default)
88 #define NRF24_P5_ON 0b00100000 // 5 5 enabled
89 #define NRF24_P4_OFF 0b00000000 // 4 4 receive pipe 4: disabled (default)
90 #define NRF24_P4_ON 0b00010000 // 4 4 enabled
91 #define NRF24_P3_OFF 0b00000000 // 3 3 receive pipe 3: disabled (default)
92 #define NRF24_P3_ON 0b00001000 // 3 3 enabled
93 #define NRF24_P2_OFF 0b00000000 // 2 2 receive pipe 2: disabled (default)
94 #define NRF24_P2_ON 0b00000100 // 2 2 enabled
95 #define NRF24_P1_OFF 0b00000000 // 1 1 receive pipe 1: disabled
96 #define NRF24_P1_ON 0b00000010 // 1 1 enabled (default)
97 #define NRF24_P0_OFF 0b00000000 // 0 0 receive pipe 0: disabled
98 #define NRF24_P0_ON 0b00000001 // 0 0 enabled (default)
99 
100 // NRF24_REG_SETUP_AW
101 #define NRF24_ADDRESS_2_BYTES 0b00000000 // 1 0 address width: 2 bytes
102 #define NRF24_ADDRESS_3_BYTES 0b00000001 // 1 0 3 bytes
103 #define NRF24_ADDRESS_4_BYTES 0b00000010 // 1 0 4 bytes
104 #define NRF24_ADDRESS_5_BYTES 0b00000011 // 1 0 5 bytes (default)
105 
106 // NRF24_REG_SETUP_RETR
107 #define NRF24_ARD 0b00000000 // 7 4 auto retransmit delay: t[us] = (NRF24_ARD + 1) * 250 us
108 #define NRF24_ARC_OFF 0b00000000 // 3 0 auto retransmit count: auto retransmit disabled
109 #define NRF24_ARC 0b00000011 // 3 0 up to 3 retransmits on AA fail (default)
110 
111 // NRF24_REG_RF_CH
112 #define NRF24_RF_CH 0b00000010 // 6 0 RF channel: f_CH[MHz] = 2400 MHz + NRF24_RF_CH
113 
114 // NRF24_REG_RF_SETUP
115 #define NRF24_CONT_WAVE_OFF 0b00000000 // 7 7 continuous carrier transmit: disabled (default)
116 #define NRF24_CONT_WAVE_ON 0b10000000 // 7 7 enabled
117 #define NRF24_DR_250_KBPS 0b00100000 // 5 5 data rate: 250 kbps
118 #define NRF24_DR_1_MBPS 0b00000000 // 3 3 1 Mbps (default)
119 #define NRF24_DR_2_MBPS 0b00001000 // 3 3 2 Mbps
120 #define NRF24_PLL_LOCK_ON 0b00010000 // 4 4 force PLL lock: enabled
121 #define NRF24_PLL_LOCK_OFF 0b00000000 // 4 4 disabled (default)
122 #define NRF24_RF_PWR_18_DBM 0b00000000 // 2 1 output power: -18 dBm
123 #define NRF24_RF_PWR_12_DBM 0b00000010 // 2 1 -12 dBm
124 #define NRF24_RF_PWR_6_DBM 0b00000100 // 2 1 -6 dBm
125 #define NRF24_RF_PWR_0_DBM 0b00000110 // 2 1 0 dBm (default)
126 
127 // NRF24_REG_STATUS
128 #define NRF24_RX_DR 0b01000000 // 6 6 Rx data ready
129 #define NRF24_TX_DS 0b00100000 // 5 5 Tx data sent
130 #define NRF24_MAX_RT 0b00010000 // 4 4 maximum number of retransmits reached (must be cleared to continue)
131 #define NRF24_RX_FIFO_EMPTY 0b00001110 // 3 1 Rx FIFO is empty
132 #define NRF24_RX_P_NO 0b00000000 // 3 1 number of data pipe that received data
133 #define NRF24_TX_FIFO_FULL 0b00000001 // 0 0 Tx FIFO is full
134 
135 // NRF24_REG_OBSERVE_TX
136 #define NRF24_PLOS_CNT 0b00000000 // 7 4 number of lost packets
137 #define NRF24_ARC_CNT 0b00000000 // 3 0 number of retransmitted packets
138 
139 // NRF24_REG_RPD
140 #define NRF24_RP_BELOW_64_DBM 0b00000000 // 0 0 received power in the current channel: less than -64 dBm
141 #define NRF24_RP_ABOVE_64_DBM 0b00000001 // 0 0 more than -64 dBm
142 
143 // NRF24_REG_FIFO_STATUS
144 #define NRF24_TX_REUSE 0b01000000 // 6 6 reusing last transmitted payload
145 #define NRF24_TX_FIFO_FULL_FLAG 0b00100000 // 5 5 Tx FIFO is full
146 #define NRF24_TX_FIFO_EMPTY_FLAG 0b00010000 // 4 4 Tx FIFO is empty
147 #define NRF24_RX_FIFO_FULL_FLAG 0b00000010 // 1 1 Rx FIFO is full
148 #define NRF24_RX_FIFO_EMPTY_FLAG 0b00000001 // 0 0 Rx FIFO is empty
149 
150 // NRF24_REG_DYNPD
151 #define NRF24_DPL_P5_OFF 0b00000000 // 5 5 dynamic payload length on pipe 5: disabled (default)
152 #define NRF24_DPL_P5_ON 0b00100000 // 5 5 enabled
153 #define NRF24_DPL_P4_OFF 0b00000000 // 4 4 dynamic payload length on pipe 4: disabled (default)
154 #define NRF24_DPL_P4_ON 0b00010000 // 4 4 enabled
155 #define NRF24_DPL_P3_OFF 0b00000000 // 3 3 dynamic payload length on pipe 3: disabled (default)
156 #define NRF24_DPL_P3_ON 0b00001000 // 3 3 enabled
157 #define NRF24_DPL_P2_OFF 0b00000000 // 2 2 dynamic payload length on pipe 2: disabled (default)
158 #define NRF24_DPL_P2_ON 0b00000100 // 2 2 enabled
159 #define NRF24_DPL_P1_OFF 0b00000000 // 1 1 dynamic payload length on pipe 1: disabled (default)
160 #define NRF24_DPL_P1_ON 0b00000010 // 1 1 enabled
161 #define NRF24_DPL_P0_OFF 0b00000000 // 0 0 dynamic payload length on pipe 0: disabled (default)
162 #define NRF24_DPL_P0_ON 0b00000001 // 0 0 enabled
163 #define NRF24_DPL_ALL_OFF 0b00000000 // 5 0 disable all dynamic payloads
164 #define NRF24_DPL_ALL_ON 0b00111111 // 5 0 enable all dynamic payloads
165 
166 // NRF24_REG_FEATURE
167 #define NRF24_DPL_OFF 0b00000000 // 2 2 dynamic payload length: disabled (default)
168 #define NRF24_DPL_ON 0b00000100 // 2 2 enabled
169 #define NRF24_ACK_PAY_OFF 0b00000000 // 1 1 payload with ACK packets: disabled (default)
170 #define NRF24_ACK_PAY_ON 0b00000010 // 1 1 enabled
171 #define NRF24_DYN_ACK_OFF 0b00000000 // 0 0 payloads without ACK: disabled (default)
172 #define NRF24_DYN_ACK_ON 0b00000001 // 0 0 enabled
173 
179 class nRF24: public PhysicalLayer {
180  public:
181  // introduce PhysicalLayer overloads
182  using PhysicalLayer::transmit;
183  using PhysicalLayer::receive;
184  using PhysicalLayer::startTransmit;
185  using PhysicalLayer::readData;
186 
192  nRF24(Module* mod);
193 
194  // basic methods
195 
209  int16_t begin(int16_t freq = 2400, int16_t dataRate = 1000, int8_t power = -12, uint8_t addrWidth = 5);
210 
216  int16_t sleep();
217 
223  int16_t standby() override;
224 
237  int16_t transmit(uint8_t* data, size_t len, uint8_t addr) override;
238 
249  int16_t receive(uint8_t* data, size_t len) override;
250 
258  int16_t transmitDirect(uint32_t frf = 0) override;
259 
265  int16_t receiveDirect() override;
266 
267  // interrupt methods
268 
274  void setIrqAction(void (*func)(void));
275 
288  int16_t startTransmit(uint8_t* data, size_t len, uint8_t addr) override;
289 
295  int16_t startReceive();
296 
306  int16_t readData(uint8_t* data, size_t len) override;
307 
308  // configuration methods
309 
317  int16_t setFrequency(int16_t freq);
318 
326  int16_t setDataRate(int16_t dataRate);
327 
335  int16_t setOutputPower(int8_t power);
336 
344  int16_t setAddressWidth(uint8_t addrWidth);
345 
353  int16_t setTransmitPipe(uint8_t* addr);
354 
364  int16_t setReceivePipe(uint8_t pipeNum, uint8_t* addr);
365 
375  int16_t setReceivePipe(uint8_t pipeNum, uint8_t addrByte);
376 
384  int16_t disablePipe(uint8_t pipeNum);
385 
393  int16_t getStatus(uint8_t mask = 0xFF);
394 
400  bool isCarrierDetected();
401 
409  int16_t setFrequencyDeviation(float freqDev) override;
410 
418  size_t getPacketLength(bool update = true) override;
419 
427  int16_t setCrcFiltering(bool crcOn = true);
428 
436  int16_t setAutoAck(bool autoAckOn = true);
437 
447  int16_t setAutoAck(uint8_t pipeNum, bool autoAckOn);
448 
456  int16_t setDataShaping(uint8_t sh) override;
457 
465  int16_t setEncoding(uint8_t encoding) override;
466 
472  uint8_t random();
473 
474 #ifndef RADIOLIB_GODMODE
475  private:
476 #endif
477  Module* _mod;
478 
479  uint8_t _addrWidth = 0;
480 
481  int16_t config();
482  void clearIRQ();
483 
484  void SPIreadRxPayload(uint8_t* data, uint8_t numBytes);
485  void SPIwriteTxPayload(uint8_t* data, uint8_t numBytes);
486  void SPItransfer(uint8_t cmd, bool write = false, uint8_t* dataOut = NULL, uint8_t* dataIn = NULL, uint8_t numBytes = 0);
487 };
488 
489 #endif
nRF24::setDataRate
int16_t setDataRate(int16_t dataRate)
Sets data rate. Allowed values are 2000, 1000 or 250 kbps.
Definition: nRF24.cpp:251
PhysicalLayer::startTransmit
int16_t startTransmit(String &str, uint8_t addr=0)
Interrupt-driven Arduino String transmit method. Unlike the standard transmit method, this one is non-blocking. Interrupt pin will be activated when transmission finishes.
Definition: PhysicalLayer.cpp:49
nRF24::nRF24
nRF24(Module *mod)
Default constructor.
Definition: nRF24.cpp:4
-
nRF24::receive
int16_t receive(uint8_t *data, size_t len) override
Blocking binary receive method. Overloads for string-based transmissions are implemented in PhysicalL...
Definition: nRF24.cpp:109
-
nRF24::setCrcFiltering
int16_t setCrcFiltering(bool crcOn=true)
Enable CRC filtering and generation.
Definition: nRF24.cpp:452
-
nRF24::transmitDirect
int16_t transmitDirect(uint32_t frf=0) override
Starts direct mode transmission.
Definition: nRF24.cpp:131
-
nRF24::setTransmitPipe
int16_t setTransmitPipe(uint8_t *addr)
Sets address of transmit pipe. The address width must be the same as the same as the configured in se...
Definition: nRF24.cpp:332
-
nRF24::transmit
int16_t transmit(uint8_t *data, size_t len, uint8_t addr) override
Blocking binary transmit method. Overloads for string-based transmissions are implemented in Physical...
Definition: nRF24.cpp:78
+
nRF24::receive
int16_t receive(uint8_t *data, size_t len) override
Blocking binary receive method. Overloads for string-based transmissions are implemented in PhysicalL...
Definition: nRF24.cpp:110
+
nRF24::setCrcFiltering
int16_t setCrcFiltering(bool crcOn=true)
Enable CRC filtering and generation.
Definition: nRF24.cpp:453
+
nRF24::transmitDirect
int16_t transmitDirect(uint32_t frf=0) override
Starts direct mode transmission.
Definition: nRF24.cpp:132
+
nRF24::setTransmitPipe
int16_t setTransmitPipe(uint8_t *addr)
Sets address of transmit pipe. The address width must be the same as the same as the configured in se...
Definition: nRF24.cpp:333
+
nRF24::transmit
int16_t transmit(uint8_t *data, size_t len, uint8_t addr) override
Blocking binary transmit method. Overloads for string-based transmissions are implemented in Physical...
Definition: nRF24.cpp:79
nRF24::begin
int16_t begin(int16_t freq=2400, int16_t dataRate=1000, int8_t power=-12, uint8_t addrWidth=5)
Initialization method.
Definition: nRF24.cpp:8
-
nRF24::getStatus
int16_t getStatus(uint8_t mask=0xFF)
Gets nRF24 status register.
Definition: nRF24.cpp:430
-
nRF24::setFrequencyDeviation
int16_t setFrequencyDeviation(float freqDev) override
Dummy configuration method, to ensure PhysicalLayer compatibility.
Definition: nRF24.cpp:438
-
nRF24::isCarrierDetected
bool isCarrierDetected()
Checks if carrier was detected during last RX.
Definition: nRF24.cpp:434
-
nRF24::setDataShaping
int16_t setDataShaping(uint8_t sh) override
Dummy data shaping configuration method, to ensure PhysicalLayer compatibility.
Definition: nRF24.cpp:492
-
nRF24::setFrequency
int16_t setFrequency(int16_t freq)
Sets carrier frequency. Allowed values range from 2400 MHz to 2525 MHz.
Definition: nRF24.cpp:242
+
nRF24::getStatus
int16_t getStatus(uint8_t mask=0xFF)
Gets nRF24 status register.
Definition: nRF24.cpp:431
+
nRF24::setFrequencyDeviation
int16_t setFrequencyDeviation(float freqDev) override
Dummy configuration method, to ensure PhysicalLayer compatibility.
Definition: nRF24.cpp:439
+
nRF24::isCarrierDetected
bool isCarrierDetected()
Checks if carrier was detected during last RX.
Definition: nRF24.cpp:435
+
nRF24::setDataShaping
int16_t setDataShaping(uint8_t sh) override
Dummy data shaping configuration method, to ensure PhysicalLayer compatibility.
Definition: nRF24.cpp:493
+
nRF24::setFrequency
int16_t setFrequency(int16_t freq)
Sets carrier frequency. Allowed values range from 2400 MHz to 2525 MHz.
Definition: nRF24.cpp:243
Module
Implements all common low-level SPI/UART/I2C methods to control the wireless module. Every module class contains one private instance of this class.
Definition: Module.h:17
PhysicalLayer::transmit
int16_t transmit(__FlashStringHelper *fstr, uint8_t addr=0)
Arduino Flash String transmit method.
Definition: PhysicalLayer.cpp:8
-
nRF24::receiveDirect
int16_t receiveDirect() override
Dummy direct mode reception method, to ensure PhysicalLayer compatibility.
Definition: nRF24.cpp:146
-
nRF24::sleep
int16_t sleep()
Sets the module to sleep mode.
Definition: nRF24.cpp:64
+
nRF24::receiveDirect
int16_t receiveDirect() override
Dummy direct mode reception method, to ensure PhysicalLayer compatibility.
Definition: nRF24.cpp:147
+
nRF24::sleep
int16_t sleep()
Sets the module to sleep mode.
Definition: nRF24.cpp:65
PhysicalLayer::receive
int16_t receive(String &str, size_t len=0)
Arduino String receive method.
Definition: PhysicalLayer.cpp:98
-
nRF24::setOutputPower
int16_t setOutputPower(int8_t power)
Sets output power. Allowed values are -18, -12, -6 or 0 dBm.
Definition: nRF24.cpp:272
-
nRF24::getPacketLength
size_t getPacketLength(bool update=true) override
Query modem for the packet length of received payload.
Definition: nRF24.cpp:445
-
nRF24::disablePipe
int16_t disablePipe(uint8_t pipeNum)
Disables specified receive pipe.
Definition: nRF24.cpp:399
-
nRF24::standby
int16_t standby() override
Sets the module to standby mode.
Definition: nRF24.cpp:68
-
nRF24::setAutoAck
int16_t setAutoAck(bool autoAckOn=true)
Enable or disable auto-acknowledge packets on all pipes.
Definition: nRF24.cpp:463
+
nRF24::setOutputPower
int16_t setOutputPower(int8_t power)
Sets output power. Allowed values are -18, -12, -6 or 0 dBm.
Definition: nRF24.cpp:273
+
nRF24::getPacketLength
size_t getPacketLength(bool update=true) override
Query modem for the packet length of received payload.
Definition: nRF24.cpp:446
+
nRF24::disablePipe
int16_t disablePipe(uint8_t pipeNum)
Disables specified receive pipe.
Definition: nRF24.cpp:400
+
nRF24::standby
int16_t standby() override
Sets the module to standby mode.
Definition: nRF24.cpp:69
+
nRF24::setAutoAck
int16_t setAutoAck(bool autoAckOn=true)
Enable or disable auto-acknowledge packets on all pipes.
Definition: nRF24.cpp:464
PhysicalLayer
Provides common interface for protocols that run on LoRa/FSK modules, such as RTTY or LoRaWAN...
Definition: PhysicalLayer.h:13
-
nRF24::setAddressWidth
int16_t setAddressWidth(uint8_t addrWidth)
Sets address width of transmit and receive pipes in bytes. Allowed values are 3, 4 or 5 bytes...
Definition: nRF24.cpp:301
-
nRF24::readData
int16_t readData(uint8_t *data, size_t len) override
Reads data received after calling startReceive method.
Definition: nRF24.cpp:222
-
nRF24::startTransmit
int16_t startTransmit(uint8_t *data, size_t len, uint8_t addr) override
Interrupt-driven binary transmit method. IRQ will be activated when full packet is transmitted...
Definition: nRF24.cpp:156
-
nRF24::setEncoding
int16_t setEncoding(uint8_t encoding) override
Dummy encoding configuration method, to ensure PhysicalLayer compatibility.
Definition: nRF24.cpp:499
+
nRF24::setAddressWidth
int16_t setAddressWidth(uint8_t addrWidth)
Sets address width of transmit and receive pipes in bytes. Allowed values are 3, 4 or 5 bytes...
Definition: nRF24.cpp:302
+
nRF24::readData
int16_t readData(uint8_t *data, size_t len) override
Reads data received after calling startReceive method.
Definition: nRF24.cpp:223
+
nRF24::startTransmit
int16_t startTransmit(uint8_t *data, size_t len, uint8_t addr) override
Interrupt-driven binary transmit method. IRQ will be activated when full packet is transmitted...
Definition: nRF24.cpp:157
+
nRF24::setEncoding
int16_t setEncoding(uint8_t encoding) override
Dummy encoding configuration method, to ensure PhysicalLayer compatibility.
Definition: nRF24.cpp:500
nRF24
Control class for nRF24 module.
Definition: nRF24.h:179
-
nRF24::startReceive
int16_t startReceive()
Interrupt-driven receive method. IRQ will be activated when full packet is received.
Definition: nRF24.cpp:196
-
nRF24::setReceivePipe
int16_t setReceivePipe(uint8_t pipeNum, uint8_t *addr)
Sets address of receive pipes 0 or 1. The address width must be the same as the same as the configure...
Definition: nRF24.cpp:347
-
nRF24::setIrqAction
void setIrqAction(void(*func)(void))
Sets interrupt service routine to call when IRQ activates.
Definition: nRF24.cpp:152
+
nRF24::startReceive
int16_t startReceive()
Interrupt-driven receive method. IRQ will be activated when full packet is received.
Definition: nRF24.cpp:197
+
nRF24::setReceivePipe
int16_t setReceivePipe(uint8_t pipeNum, uint8_t *addr)
Sets address of receive pipes 0 or 1. The address width must be the same as the same as the configure...
Definition: nRF24.cpp:348
+
nRF24::setIrqAction
void setIrqAction(void(*func)(void))
Sets interrupt service routine to call when IRQ activates.
Definition: nRF24.cpp:153
PhysicalLayer::readData
int16_t readData(String &str, size_t len=0)
Reads data that was received after calling startReceive method.
Definition: PhysicalLayer.cpp:57
-
nRF24::random
uint8_t random()
Dummy random method, to ensure PhysicalLayer compatibility.
Definition: nRF24.cpp:506
+
nRF24::random
uint8_t random()
Dummy random method, to ensure PhysicalLayer compatibility.
Definition: nRF24.cpp:507