Added comments
This commit is contained in:
parent
ffdab6487b
commit
14ae8382a5
7 changed files with 125 additions and 55 deletions
|
@ -1,20 +1,26 @@
|
||||||
#include "ESP8266.h"
|
#include "ESP8266.h"
|
||||||
|
|
||||||
ESP8266::ESP8266(Module* module) {
|
ESP8266::ESP8266(Module* module) {
|
||||||
portTcp = 80; // Default HTTP port (TCP application)
|
portTcp = 80; // Default HTTP port (TCP application)
|
||||||
portUdp = 53; // Default DNS port (UDP application)
|
portUdp = 53; // Default DNS port (UDP application)
|
||||||
portMqtt = 1883;
|
portMqtt = 1883;
|
||||||
_mod = module;
|
_mod = module;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t ESP8266::begin(long speed) {
|
uint8_t ESP8266::begin(long speed) {
|
||||||
|
// set module properties
|
||||||
_mod->AtLineFeed = "\r\n";
|
_mod->AtLineFeed = "\r\n";
|
||||||
_mod->baudrate = speed;
|
_mod->baudrate = speed;
|
||||||
_mod->init(USE_UART, INT_NONE);
|
_mod->init(USE_UART, INT_NONE);
|
||||||
|
|
||||||
|
// empty UART buffer (garbage data)
|
||||||
_mod->ATemptyBuffer();
|
_mod->ATemptyBuffer();
|
||||||
|
|
||||||
|
// test AT setup
|
||||||
if(!_mod->ATsendCommand("AT")) {
|
if(!_mod->ATsendCommand("AT")) {
|
||||||
return(ERR_AT_FAILED);
|
return(ERR_AT_FAILED);
|
||||||
}
|
}
|
||||||
|
|
||||||
return(ERR_NONE);
|
return(ERR_NONE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -27,7 +33,7 @@ uint8_t ESP8266::reset() {
|
||||||
// wait for the module to start
|
// wait for the module to start
|
||||||
delay(2000);
|
delay(2000);
|
||||||
|
|
||||||
// test AT
|
// test AT setup
|
||||||
uint32_t start = millis();
|
uint32_t start = millis();
|
||||||
while (millis() - start < 3000) {
|
while (millis() - start < 3000) {
|
||||||
if(!_mod->ATsendCommand("AT")) {
|
if(!_mod->ATsendCommand("AT")) {
|
||||||
|
@ -207,8 +213,8 @@ uint8_t ESP8266::MqttConnect(String host, String clientId, String username, Stri
|
||||||
packet[5] = 'Q';
|
packet[5] = 'Q';
|
||||||
packet[6] = 'T';
|
packet[6] = 'T';
|
||||||
packet[7] = 'T';
|
packet[7] = 'T';
|
||||||
packet[8] = 0x04; //protocol level
|
packet[8] = 0x04; //protocol level
|
||||||
packet[9] = 0b11000010; //flags: user name + password + clean session
|
packet[9] = 0b11000010; //flags: user name + password + clean session
|
||||||
packet[10] = 0x00; //keep-alive interval MSB
|
packet[10] = 0x00; //keep-alive interval MSB
|
||||||
packet[11] = 0x3C; //keep-alive interval LSB
|
packet[11] = 0x3C; //keep-alive interval LSB
|
||||||
|
|
||||||
|
@ -230,14 +236,6 @@ uint8_t ESP8266::MqttConnect(String host, String clientId, String username, Stri
|
||||||
packet[i + 18 + clientId.length() + username.length()] = (uint8_t)password.charAt(i);
|
packet[i + 18 + clientId.length() + username.length()] = (uint8_t)password.charAt(i);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*for(uint8_t i = 0; i < len + 2; i++) {
|
|
||||||
Serial.print(i);
|
|
||||||
Serial.print('\t');
|
|
||||||
Serial.write(packet[i]);
|
|
||||||
Serial.print("\t0x");
|
|
||||||
Serial.println(packet[i], HEX);
|
|
||||||
}*/
|
|
||||||
|
|
||||||
// create TCP connection
|
// create TCP connection
|
||||||
uint8_t state = openTransportConnection(_MqttHost.c_str(), "TCP", portMqtt, 7200);
|
uint8_t state = openTransportConnection(_MqttHost.c_str(), "TCP", portMqtt, 7200);
|
||||||
if(state != ERR_NONE) {
|
if(state != ERR_NONE) {
|
||||||
|
@ -251,18 +249,8 @@ uint8_t ESP8266::MqttConnect(String host, String clientId, String username, Stri
|
||||||
}
|
}
|
||||||
|
|
||||||
// read the response
|
// read the response
|
||||||
/*uint8_t response[] = {0, 0, 0, 0, 0};
|
|
||||||
receive(response);*/
|
|
||||||
String raw = receive();
|
String raw = receive();
|
||||||
|
|
||||||
/*for(uint8_t i = 0; i < raw.length(); i++) {
|
|
||||||
Serial.print(i);
|
|
||||||
Serial.print('\t');
|
|
||||||
Serial.write(raw.charAt(i));
|
|
||||||
Serial.print("\t0x");
|
|
||||||
Serial.println(raw.charAt(i), HEX);
|
|
||||||
}*/
|
|
||||||
|
|
||||||
// parse the response
|
// parse the response
|
||||||
int32_t numBytesIndex = raw.indexOf(":");
|
int32_t numBytesIndex = raw.indexOf(":");
|
||||||
if(numBytesIndex == -1) {
|
if(numBytesIndex == -1) {
|
||||||
|
@ -274,13 +262,6 @@ uint8_t ESP8266::MqttConnect(String host, String clientId, String username, Stri
|
||||||
response[i] = raw.charAt(i + numBytesIndex + 1);
|
response[i] = raw.charAt(i + numBytesIndex + 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*for(uint8_t i = 0; i < 4; i++) {
|
|
||||||
Serial.print(i);
|
|
||||||
Serial.print('\t');
|
|
||||||
Serial.write(response[i]);
|
|
||||||
Serial.print("\t0x");
|
|
||||||
Serial.println(response[i], HEX);
|
|
||||||
}*/
|
|
||||||
if(response[3] != 0x00) {
|
if(response[3] != 0x00) {
|
||||||
return(ERR_MQTT_CONNECTION_REFUSED);
|
return(ERR_MQTT_CONNECTION_REFUSED);
|
||||||
}
|
}
|
||||||
|
@ -307,14 +288,6 @@ uint8_t ESP8266::MqttPublish(String topic, String message) {
|
||||||
packet[i + 4 + topic.length()] = (uint8_t)message.charAt(i);
|
packet[i + 4 + topic.length()] = (uint8_t)message.charAt(i);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*for(uint8_t i = 0; i < len + 2; i++) {
|
|
||||||
Serial.print(i);
|
|
||||||
Serial.print('\t');
|
|
||||||
Serial.write(packet[i]);
|
|
||||||
Serial.print("\t0x");
|
|
||||||
Serial.println(packet[i], HEX);
|
|
||||||
}*/
|
|
||||||
|
|
||||||
// send MQTT packet
|
// send MQTT packet
|
||||||
uint8_t state = send(packet, len + 2);
|
uint8_t state = send(packet, len + 2);
|
||||||
if(state != ERR_NONE) {
|
if(state != ERR_NONE) {
|
||||||
|
@ -393,9 +366,6 @@ uint32_t ESP8266::receive(uint8_t* data, uint32_t timeout) {
|
||||||
while(millis() - start < timeout) {
|
while(millis() - start < timeout) {
|
||||||
while(_mod->ModuleSerial->available() > 0) {
|
while(_mod->ModuleSerial->available() > 0) {
|
||||||
uint8_t b = _mod->ModuleSerial->read();
|
uint8_t b = _mod->ModuleSerial->read();
|
||||||
/*Serial.write(b);
|
|
||||||
Serial.print("\t0x");
|
|
||||||
Serial.println(b, HEX);*/
|
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.print(b);
|
Serial.print(b);
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -22,6 +22,7 @@ class ESP8266 {
|
||||||
public:
|
public:
|
||||||
ESP8266(Module* module);
|
ESP8266(Module* module);
|
||||||
|
|
||||||
|
// Port numbers
|
||||||
uint16_t portTcp, portUdp, portMqtt;
|
uint16_t portTcp, portUdp, portMqtt;
|
||||||
|
|
||||||
// Basic methods
|
// Basic methods
|
||||||
|
|
|
@ -5,6 +5,7 @@ HC05::HC05(Module* module) {
|
||||||
}
|
}
|
||||||
|
|
||||||
void HC05::begin(long speed) {
|
void HC05::begin(long speed) {
|
||||||
|
// set module properties
|
||||||
_mod->baudrate = speed;
|
_mod->baudrate = speed;
|
||||||
_mod->init(USE_UART, INT_NONE);
|
_mod->init(USE_UART, INT_NONE);
|
||||||
}
|
}
|
||||||
|
|
|
@ -5,9 +5,10 @@ RF69::RF69(Module* module) {
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t RF69::begin() {
|
uint8_t RF69::begin() {
|
||||||
//_mod->init(USE_SPI, INT_BOTH);
|
// set module properties
|
||||||
_mod->init(USE_SPI, INT_0);
|
_mod->init(USE_SPI, INT_0);
|
||||||
|
|
||||||
|
// try to find the RF69 chip
|
||||||
uint8_t i = 0;
|
uint8_t i = 0;
|
||||||
bool flagFound = false;
|
bool flagFound = false;
|
||||||
while((i < 10) && !flagFound) {
|
while((i < 10) && !flagFound) {
|
||||||
|
@ -49,39 +50,48 @@ uint8_t RF69::begin() {
|
||||||
uint8_t RF69::transmit(Packet& pack) {
|
uint8_t RF69::transmit(Packet& pack) {
|
||||||
char buffer[256];
|
char buffer[256];
|
||||||
|
|
||||||
|
// copy packet source and destination addresses into buffer
|
||||||
for(uint8_t i = 0; i < 8; i++) {
|
for(uint8_t i = 0; i < 8; i++) {
|
||||||
buffer[i] = pack.source[i];
|
buffer[i] = pack.source[i];
|
||||||
buffer[i+8] = pack.destination[i];
|
buffer[i+8] = pack.destination[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// copy packet data into buffer
|
||||||
for(uint8_t i = 0; i < pack.length; i++) {
|
for(uint8_t i = 0; i < pack.length; i++) {
|
||||||
buffer[i+16] = pack.data[i];
|
buffer[i+16] = pack.data[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
//_mod->SPIsetRegValue(RF69_REG_PACKET_CONFIG_2, RF69_RESTART_RX, 2, 2);
|
// set mode to standby
|
||||||
|
|
||||||
setMode(RF69_STANDBY);
|
setMode(RF69_STANDBY);
|
||||||
|
|
||||||
|
// set DIO pin mapping
|
||||||
_mod->SPIsetRegValue(RF69_REG_DIO_MAPPING_1, RF69_DIO0_PACK_PACKET_SENT, 7, 6);
|
_mod->SPIsetRegValue(RF69_REG_DIO_MAPPING_1, RF69_DIO0_PACK_PACKET_SENT, 7, 6);
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
|
// check overall packet length
|
||||||
if(pack.length > 256) {
|
if(pack.length > 256) {
|
||||||
return(ERR_PACKET_TOO_LONG);
|
return(ERR_PACKET_TOO_LONG);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// write packet to FIFO
|
||||||
_mod->SPIwriteRegister(RF69_REG_FIFO, pack.length);
|
_mod->SPIwriteRegister(RF69_REG_FIFO, pack.length);
|
||||||
_mod->SPIwriteRegisterBurstStr(RF69_REG_FIFO, buffer, pack.length);
|
_mod->SPIwriteRegisterBurstStr(RF69_REG_FIFO, buffer, pack.length);
|
||||||
|
|
||||||
|
// set mode to transmit
|
||||||
setMode(RF69_TX);
|
setMode(RF69_TX);
|
||||||
_mod->SPIsetRegValue(RF69_REG_TEST_PA1, RF69_PA1_20_DBM);
|
_mod->SPIsetRegValue(RF69_REG_TEST_PA1, RF69_PA1_20_DBM);
|
||||||
_mod->SPIsetRegValue(RF69_REG_TEST_PA2, RF69_PA2_20_DBM);
|
_mod->SPIsetRegValue(RF69_REG_TEST_PA2, RF69_PA2_20_DBM);
|
||||||
|
|
||||||
|
// wait for transmission end
|
||||||
while(!_mod->getInt0State()) {
|
while(!_mod->getInt0State()) {
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.print('.');
|
Serial.print('.');
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
return(ERR_NONE);
|
return(ERR_NONE);
|
||||||
|
@ -90,18 +100,22 @@ uint8_t RF69::transmit(Packet& pack) {
|
||||||
uint8_t RF69::receive(Packet& pack) {
|
uint8_t RF69::receive(Packet& pack) {
|
||||||
char buffer[256];
|
char buffer[256];
|
||||||
|
|
||||||
|
// set mode to standby
|
||||||
setMode(RF69_STANDBY);
|
setMode(RF69_STANDBY);
|
||||||
|
|
||||||
//_mod->SPIsetRegValue(RF69_REG_PACKET_CONFIG_2, RF69_RESTART_RX, 2, 2);
|
// set DIO pin mapping
|
||||||
|
|
||||||
//_mod->SPIsetRegValue(RF69_REG_DIO_MAPPING_1, RF69_DIO0_PACK_PAYLOAD_READY | RF69_DIO1_PACK_TIMEOUT, 7, 4);
|
//_mod->SPIsetRegValue(RF69_REG_DIO_MAPPING_1, RF69_DIO0_PACK_PAYLOAD_READY | RF69_DIO1_PACK_TIMEOUT, 7, 4);
|
||||||
_mod->SPIsetRegValue(RF69_REG_DIO_MAPPING_1, RF69_DIO0_PACK_PAYLOAD_READY, 7, 6);
|
_mod->SPIsetRegValue(RF69_REG_DIO_MAPPING_1, RF69_DIO0_PACK_PAYLOAD_READY, 7, 6);
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
|
// set mode to receive
|
||||||
setMode(RF69_RX);
|
setMode(RF69_RX);
|
||||||
_mod->SPIsetRegValue(RF69_REG_TEST_PA1, RF69_PA1_NORMAL);
|
_mod->SPIsetRegValue(RF69_REG_TEST_PA1, RF69_PA1_NORMAL);
|
||||||
_mod->SPIsetRegValue(RF69_REG_TEST_PA2, RF69_PA2_NORMAL);
|
_mod->SPIsetRegValue(RF69_REG_TEST_PA2, RF69_PA2_NORMAL);
|
||||||
|
|
||||||
|
// wait for packet reception or timeout
|
||||||
/*while(!_mod->getInt0State()) {
|
/*while(!_mod->getInt0State()) {
|
||||||
if(_mod->getInt1State()) {
|
if(_mod->getInt1State()) {
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
@ -116,17 +130,20 @@ uint8_t RF69::receive(Packet& pack) {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// read packet from FIFO
|
||||||
pack.length = _mod->SPIreadRegister(RF69_REG_FIFO);
|
pack.length = _mod->SPIreadRegister(RF69_REG_FIFO);
|
||||||
|
|
||||||
_mod->SPIreadRegisterBurstStr(RF69_REG_FIFO, pack.length, buffer);
|
_mod->SPIreadRegisterBurstStr(RF69_REG_FIFO, pack.length, buffer);
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
|
// get packet source and destination addresses from buffer
|
||||||
for(uint8_t i = 0; i < 8; i++) {
|
for(uint8_t i = 0; i < 8; i++) {
|
||||||
pack.source[i] = buffer[i];
|
pack.source[i] = buffer[i];
|
||||||
pack.destination[i] = buffer[i+8];
|
pack.destination[i] = buffer[i+8];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// get packet source and destination addresses from buffer
|
||||||
for(uint8_t i = 16; i < pack.length; i++) {
|
for(uint8_t i = 16; i < pack.length; i++) {
|
||||||
pack.data[i-16] = buffer[i];
|
pack.data[i-16] = buffer[i];
|
||||||
}
|
}
|
||||||
|
|
|
@ -5,10 +5,12 @@ SX1272::SX1272(Module* module) {
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t SX1272::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t addrEeprom) {
|
uint8_t SX1272::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t addrEeprom) {
|
||||||
|
// copy LoRa modem settings
|
||||||
_bw = bw;
|
_bw = bw;
|
||||||
_sf = sf;
|
_sf = sf;
|
||||||
_cr = cr;
|
_cr = cr;
|
||||||
|
|
||||||
|
// ESP32-only: initialize EEPROM
|
||||||
#ifdef ESP32
|
#ifdef ESP32
|
||||||
if(!EEPROM.begin(9)) {
|
if(!EEPROM.begin(9)) {
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
|
@ -18,8 +20,10 @@ uint8_t SX1272::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
// copy EEPROM start address
|
||||||
_addrEeprom = addrEeprom;
|
_addrEeprom = addrEeprom;
|
||||||
|
|
||||||
|
// check if the node has address
|
||||||
bool hasAddress = false;
|
bool hasAddress = false;
|
||||||
for(uint16_t i = 0; i < 8; i++) {
|
for(uint16_t i = 0; i < 8; i++) {
|
||||||
if(EEPROM.read(_addrEeprom + i) != 255) {
|
if(EEPROM.read(_addrEeprom + i) != 255) {
|
||||||
|
@ -28,6 +32,7 @@ uint8_t SX1272::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// generate new address
|
||||||
if(!hasAddress) {
|
if(!hasAddress) {
|
||||||
randomSeed(analogRead(5));
|
randomSeed(analogRead(5));
|
||||||
generateLoRaAdress();
|
generateLoRaAdress();
|
||||||
|
@ -48,8 +53,10 @@ uint8_t SX1272::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// set module properties
|
||||||
_mod->init(USE_SPI, INT_BOTH);
|
_mod->init(USE_SPI, INT_BOTH);
|
||||||
|
|
||||||
|
// try to find the SX1272 chip
|
||||||
uint8_t i = 0;
|
uint8_t i = 0;
|
||||||
bool flagFound = false;
|
bool flagFound = false;
|
||||||
while((i < 10) && !flagFound) {
|
while((i < 10) && !flagFound) {
|
||||||
|
@ -85,38 +92,49 @@ uint8_t SX1272::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
// configure LoRa modem
|
||||||
return(config(_bw, _sf, _cr));
|
return(config(_bw, _sf, _cr));
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t SX1272::transmit(Packet& pack) {
|
uint8_t SX1272::transmit(Packet& pack) {
|
||||||
char buffer[256];
|
char buffer[256];
|
||||||
|
|
||||||
|
// copy packet source and destination addresses into buffer
|
||||||
for(uint8_t i = 0; i < 8; i++) {
|
for(uint8_t i = 0; i < 8; i++) {
|
||||||
buffer[i] = pack.source[i];
|
buffer[i] = pack.source[i];
|
||||||
buffer[i+8] = pack.destination[i];
|
buffer[i+8] = pack.destination[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// copy packet data into buffer
|
||||||
for(uint8_t i = 0; i < pack.length; i++) {
|
for(uint8_t i = 0; i < pack.length; i++) {
|
||||||
buffer[i+16] = pack.data[i];
|
buffer[i+16] = pack.data[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// set mode to standby
|
||||||
setMode(SX1272_STANDBY);
|
setMode(SX1272_STANDBY);
|
||||||
|
|
||||||
|
// set DIO pin mapping
|
||||||
_mod->SPIsetRegValue(SX1272_REG_DIO_MAPPING_1, SX1272_DIO0_TX_DONE, 7, 6);
|
_mod->SPIsetRegValue(SX1272_REG_DIO_MAPPING_1, SX1272_DIO0_TX_DONE, 7, 6);
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
|
// check overall packet length
|
||||||
if(pack.length > 256) {
|
if(pack.length > 256) {
|
||||||
return(ERR_PACKET_TOO_LONG);
|
return(ERR_PACKET_TOO_LONG);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// write packet to FIFO
|
||||||
_mod->SPIsetRegValue(SX1272_REG_PAYLOAD_LENGTH, pack.length);
|
_mod->SPIsetRegValue(SX1272_REG_PAYLOAD_LENGTH, pack.length);
|
||||||
_mod->SPIsetRegValue(SX1272_REG_FIFO_TX_BASE_ADDR, SX1272_FIFO_TX_BASE_ADDR_MAX);
|
_mod->SPIsetRegValue(SX1272_REG_FIFO_TX_BASE_ADDR, SX1272_FIFO_TX_BASE_ADDR_MAX);
|
||||||
_mod->SPIsetRegValue(SX1272_REG_FIFO_ADDR_PTR, SX1272_FIFO_TX_BASE_ADDR_MAX);
|
_mod->SPIsetRegValue(SX1272_REG_FIFO_ADDR_PTR, SX1272_FIFO_TX_BASE_ADDR_MAX);
|
||||||
|
|
||||||
_mod->SPIwriteRegisterBurstStr(SX1272_REG_FIFO, buffer, pack.length);
|
_mod->SPIwriteRegisterBurstStr(SX1272_REG_FIFO, buffer, pack.length);
|
||||||
|
|
||||||
|
|
||||||
|
// set mode to transmit
|
||||||
setMode(SX1272_TX);
|
setMode(SX1272_TX);
|
||||||
|
|
||||||
|
// wait for transmission end
|
||||||
unsigned long start = millis();
|
unsigned long start = millis();
|
||||||
while(!_mod->getInt0State()) {
|
while(!_mod->getInt0State()) {
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
|
@ -124,6 +142,7 @@ uint8_t SX1272::transmit(Packet& pack) {
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
return(ERR_NONE);
|
return(ERR_NONE);
|
||||||
|
@ -133,16 +152,23 @@ uint8_t SX1272::receive(Packet& pack) {
|
||||||
char buffer[256];
|
char buffer[256];
|
||||||
uint32_t startTime = millis();
|
uint32_t startTime = millis();
|
||||||
|
|
||||||
|
// set mode to standby
|
||||||
setMode(SX1272_STANDBY);
|
setMode(SX1272_STANDBY);
|
||||||
|
|
||||||
|
// set DIO pin mapping
|
||||||
_mod->SPIsetRegValue(SX1272_REG_DIO_MAPPING_1, SX1272_DIO0_RX_DONE | SX1272_DIO1_RX_TIMEOUT, 7, 4);
|
_mod->SPIsetRegValue(SX1272_REG_DIO_MAPPING_1, SX1272_DIO0_RX_DONE | SX1272_DIO1_RX_TIMEOUT, 7, 4);
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
|
// set FIFO address pointers
|
||||||
_mod->SPIsetRegValue(SX1272_REG_FIFO_RX_BASE_ADDR, SX1272_FIFO_RX_BASE_ADDR_MAX);
|
_mod->SPIsetRegValue(SX1272_REG_FIFO_RX_BASE_ADDR, SX1272_FIFO_RX_BASE_ADDR_MAX);
|
||||||
_mod->SPIsetRegValue(SX1272_REG_FIFO_ADDR_PTR, SX1272_FIFO_RX_BASE_ADDR_MAX);
|
_mod->SPIsetRegValue(SX1272_REG_FIFO_ADDR_PTR, SX1272_FIFO_RX_BASE_ADDR_MAX);
|
||||||
|
|
||||||
|
// set mode to receive
|
||||||
setMode(SX1272_RXSINGLE);
|
setMode(SX1272_RXSINGLE);
|
||||||
|
|
||||||
|
// wait for packet reception or timeout
|
||||||
while(!_mod->getInt0State()) {
|
while(!_mod->getInt0State()) {
|
||||||
if(_mod->getInt1State()) {
|
if(_mod->getInt1State()) {
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
@ -150,31 +176,40 @@ uint8_t SX1272::receive(Packet& pack) {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// check received packet CRC
|
||||||
if(_mod->SPIgetRegValue(SX1272_REG_IRQ_FLAGS, 5, 5) == SX1272_CLEAR_IRQ_FLAG_PAYLOAD_CRC_ERROR) {
|
if(_mod->SPIgetRegValue(SX1272_REG_IRQ_FLAGS, 5, 5) == SX1272_CLEAR_IRQ_FLAG_PAYLOAD_CRC_ERROR) {
|
||||||
return(ERR_CRC_MISMATCH);
|
return(ERR_CRC_MISMATCH);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// get header type
|
||||||
uint8_t headerMode = _mod->SPIgetRegValue(SX1272_REG_MODEM_CONFIG_1, 0, 0);
|
uint8_t headerMode = _mod->SPIgetRegValue(SX1272_REG_MODEM_CONFIG_1, 0, 0);
|
||||||
if(headerMode == SX1272_HEADER_EXPL_MODE) {
|
if(headerMode == SX1272_HEADER_EXPL_MODE) {
|
||||||
pack.length = _mod->SPIgetRegValue(SX1272_REG_RX_NB_BYTES);
|
pack.length = _mod->SPIgetRegValue(SX1272_REG_RX_NB_BYTES);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// read packet from FIFO
|
||||||
_mod->SPIreadRegisterBurstStr(SX1272_REG_FIFO, pack.length, buffer);
|
_mod->SPIreadRegisterBurstStr(SX1272_REG_FIFO, pack.length, buffer);
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
|
// get packet source and destination addresses from buffer
|
||||||
for(uint8_t i = 0; i < 8; i++) {
|
for(uint8_t i = 0; i < 8; i++) {
|
||||||
pack.source[i] = buffer[i];
|
pack.source[i] = buffer[i];
|
||||||
pack.destination[i] = buffer[i+8];
|
pack.destination[i] = buffer[i+8];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// get packet source and destination addresses from buffer
|
||||||
for(uint8_t i = 16; i < pack.length; i++) {
|
for(uint8_t i = 16; i < pack.length; i++) {
|
||||||
pack.data[i-16] = buffer[i];
|
pack.data[i-16] = buffer[i];
|
||||||
}
|
}
|
||||||
pack.data[pack.length-16] = 0;
|
pack.data[pack.length-16] = 0;
|
||||||
|
|
||||||
|
// measure overall datarate
|
||||||
uint32_t elapsedTime = millis() - startTime;
|
uint32_t elapsedTime = millis() - startTime;
|
||||||
dataRate = (pack.length*8.0)/((float)elapsedTime/1000.0);
|
dataRate = (pack.length*8.0)/((float)elapsedTime/1000.0);
|
||||||
|
|
||||||
|
// get packet RSSI
|
||||||
lastPacketRSSI = getLastPacketRSSI();
|
lastPacketRSSI = getLastPacketRSSI();
|
||||||
|
|
||||||
return(ERR_NONE);
|
return(ERR_NONE);
|
||||||
|
|
|
@ -5,10 +5,12 @@ SX1278::SX1278(Module* module) {
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t SX1278::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t addrEeprom) {
|
uint8_t SX1278::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t addrEeprom) {
|
||||||
|
// copy LoRa modem settings
|
||||||
_bw = bw;
|
_bw = bw;
|
||||||
_sf = sf;
|
_sf = sf;
|
||||||
_cr = cr;
|
_cr = cr;
|
||||||
|
|
||||||
|
// ESP32-only: initialize EEPROM
|
||||||
#ifdef ESP32
|
#ifdef ESP32
|
||||||
if(!EEPROM.begin(9)) {
|
if(!EEPROM.begin(9)) {
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
|
@ -18,8 +20,10 @@ uint8_t SX1278::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
// copy EEPROM start address
|
||||||
_addrEeprom = addrEeprom;
|
_addrEeprom = addrEeprom;
|
||||||
|
|
||||||
|
// check if the node has address
|
||||||
bool hasAddress = false;
|
bool hasAddress = false;
|
||||||
for(uint16_t i = 0; i < 8; i++) {
|
for(uint16_t i = 0; i < 8; i++) {
|
||||||
if(EEPROM.read(_addrEeprom + i) != 255) {
|
if(EEPROM.read(_addrEeprom + i) != 255) {
|
||||||
|
@ -28,6 +32,7 @@ uint8_t SX1278::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// generate new address
|
||||||
if(!hasAddress) {
|
if(!hasAddress) {
|
||||||
randomSeed(analogRead(5));
|
randomSeed(analogRead(5));
|
||||||
generateLoRaAdress();
|
generateLoRaAdress();
|
||||||
|
@ -48,8 +53,10 @@ uint8_t SX1278::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// set module properties
|
||||||
_mod->init(USE_SPI, INT_BOTH);
|
_mod->init(USE_SPI, INT_BOTH);
|
||||||
|
|
||||||
|
// try to find the SX1278 chip
|
||||||
uint8_t i = 0;
|
uint8_t i = 0;
|
||||||
bool flagFound = false;
|
bool flagFound = false;
|
||||||
while((i < 10) && !flagFound) {
|
while((i < 10) && !flagFound) {
|
||||||
|
@ -85,38 +92,48 @@ uint8_t SX1278::begin(Bandwidth bw, SpreadingFactor sf, CodingRate cr, uint16_t
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
// configure LoRa modem
|
||||||
return(config(_bw, _sf, _cr));
|
return(config(_bw, _sf, _cr));
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t SX1278::transmit(Packet& pack) {
|
uint8_t SX1278::transmit(Packet& pack) {
|
||||||
char buffer[256];
|
char buffer[256];
|
||||||
|
|
||||||
|
// copy packet source and destination addresses into buffer
|
||||||
for(uint8_t i = 0; i < 8; i++) {
|
for(uint8_t i = 0; i < 8; i++) {
|
||||||
buffer[i] = pack.source[i];
|
buffer[i] = pack.source[i];
|
||||||
buffer[i+8] = pack.destination[i];
|
buffer[i+8] = pack.destination[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// copy packet data into buffer
|
||||||
for(uint8_t i = 0; i < pack.length; i++) {
|
for(uint8_t i = 0; i < pack.length; i++) {
|
||||||
buffer[i+16] = pack.data[i];
|
buffer[i+16] = pack.data[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// set mode to standby
|
||||||
setMode(SX1278_STANDBY);
|
setMode(SX1278_STANDBY);
|
||||||
|
|
||||||
|
// set DIO pin mapping
|
||||||
_mod->SPIsetRegValue(SX1278_REG_DIO_MAPPING_1, SX1278_DIO0_TX_DONE, 7, 6);
|
_mod->SPIsetRegValue(SX1278_REG_DIO_MAPPING_1, SX1278_DIO0_TX_DONE, 7, 6);
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
|
// check overall packet length
|
||||||
if(pack.length > 256) {
|
if(pack.length > 256) {
|
||||||
return(ERR_PACKET_TOO_LONG);
|
return(ERR_PACKET_TOO_LONG);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// write packet to FIFO
|
||||||
_mod->SPIsetRegValue(SX1278_REG_PAYLOAD_LENGTH, pack.length);
|
_mod->SPIsetRegValue(SX1278_REG_PAYLOAD_LENGTH, pack.length);
|
||||||
_mod->SPIsetRegValue(SX1278_REG_FIFO_TX_BASE_ADDR, SX1278_FIFO_TX_BASE_ADDR_MAX);
|
_mod->SPIsetRegValue(SX1278_REG_FIFO_TX_BASE_ADDR, SX1278_FIFO_TX_BASE_ADDR_MAX);
|
||||||
_mod->SPIsetRegValue(SX1278_REG_FIFO_ADDR_PTR, SX1278_FIFO_TX_BASE_ADDR_MAX);
|
_mod->SPIsetRegValue(SX1278_REG_FIFO_ADDR_PTR, SX1278_FIFO_TX_BASE_ADDR_MAX);
|
||||||
|
|
||||||
_mod->SPIwriteRegisterBurstStr(SX1278_REG_FIFO, buffer, pack.length);
|
_mod->SPIwriteRegisterBurstStr(SX1278_REG_FIFO, buffer, pack.length);
|
||||||
|
|
||||||
|
// set mode to transmit
|
||||||
setMode(SX1278_TX);
|
setMode(SX1278_TX);
|
||||||
|
|
||||||
|
// wait for transmission end
|
||||||
unsigned long start = millis();
|
unsigned long start = millis();
|
||||||
while(!_mod->getInt0State()) {
|
while(!_mod->getInt0State()) {
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
|
@ -124,6 +141,7 @@ uint8_t SX1278::transmit(Packet& pack) {
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
return(ERR_NONE);
|
return(ERR_NONE);
|
||||||
|
@ -133,16 +151,23 @@ uint8_t SX1278::receive(Packet& pack) {
|
||||||
char buffer[256];
|
char buffer[256];
|
||||||
uint32_t startTime = millis();
|
uint32_t startTime = millis();
|
||||||
|
|
||||||
|
// set mode to standby
|
||||||
setMode(SX1278_STANDBY);
|
setMode(SX1278_STANDBY);
|
||||||
|
|
||||||
|
// set DIO pin mapping
|
||||||
_mod->SPIsetRegValue(SX1278_REG_DIO_MAPPING_1, SX1278_DIO0_RX_DONE | SX1278_DIO1_RX_TIMEOUT, 7, 4);
|
_mod->SPIsetRegValue(SX1278_REG_DIO_MAPPING_1, SX1278_DIO0_RX_DONE | SX1278_DIO1_RX_TIMEOUT, 7, 4);
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
|
// set FIFO address pointers
|
||||||
_mod->SPIsetRegValue(SX1278_REG_FIFO_RX_BASE_ADDR, SX1278_FIFO_RX_BASE_ADDR_MAX);
|
_mod->SPIsetRegValue(SX1278_REG_FIFO_RX_BASE_ADDR, SX1278_FIFO_RX_BASE_ADDR_MAX);
|
||||||
_mod->SPIsetRegValue(SX1278_REG_FIFO_ADDR_PTR, SX1278_FIFO_RX_BASE_ADDR_MAX);
|
_mod->SPIsetRegValue(SX1278_REG_FIFO_ADDR_PTR, SX1278_FIFO_RX_BASE_ADDR_MAX);
|
||||||
|
|
||||||
|
// set mode to receive
|
||||||
setMode(SX1278_RXSINGLE);
|
setMode(SX1278_RXSINGLE);
|
||||||
|
|
||||||
|
// wait for packet reception or timeout
|
||||||
while(!_mod->getInt0State()) {
|
while(!_mod->getInt0State()) {
|
||||||
if(_mod->getInt1State()) {
|
if(_mod->getInt1State()) {
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
@ -150,31 +175,40 @@ uint8_t SX1278::receive(Packet& pack) {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// check received packet CRC
|
||||||
if(_mod->SPIgetRegValue(SX1278_REG_IRQ_FLAGS, 5, 5) == SX1278_CLEAR_IRQ_FLAG_PAYLOAD_CRC_ERROR) {
|
if(_mod->SPIgetRegValue(SX1278_REG_IRQ_FLAGS, 5, 5) == SX1278_CLEAR_IRQ_FLAG_PAYLOAD_CRC_ERROR) {
|
||||||
return(ERR_CRC_MISMATCH);
|
return(ERR_CRC_MISMATCH);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// get header type
|
||||||
uint8_t headerMode = _mod->SPIgetRegValue(SX1278_REG_MODEM_CONFIG_1, 0, 0);
|
uint8_t headerMode = _mod->SPIgetRegValue(SX1278_REG_MODEM_CONFIG_1, 0, 0);
|
||||||
if(headerMode == SX1278_HEADER_EXPL_MODE) {
|
if(headerMode == SX1278_HEADER_EXPL_MODE) {
|
||||||
pack.length = _mod->SPIgetRegValue(SX1278_REG_RX_NB_BYTES);
|
pack.length = _mod->SPIgetRegValue(SX1278_REG_RX_NB_BYTES);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// read packet from FIFO
|
||||||
_mod->SPIreadRegisterBurstStr(SX1278_REG_FIFO, pack.length, buffer);
|
_mod->SPIreadRegisterBurstStr(SX1278_REG_FIFO, pack.length, buffer);
|
||||||
|
|
||||||
|
// clear interrupt flags
|
||||||
clearIRQFlags();
|
clearIRQFlags();
|
||||||
|
|
||||||
|
// get packet source and destination addresses from buffer
|
||||||
for(uint8_t i = 0; i < 8; i++) {
|
for(uint8_t i = 0; i < 8; i++) {
|
||||||
pack.source[i] = buffer[i];
|
pack.source[i] = buffer[i];
|
||||||
pack.destination[i] = buffer[i+8];
|
pack.destination[i] = buffer[i+8];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// get packet source and destination addresses from buffer
|
||||||
for(uint8_t i = 16; i < pack.length; i++) {
|
for(uint8_t i = 16; i < pack.length; i++) {
|
||||||
pack.data[i-16] = buffer[i];
|
pack.data[i-16] = buffer[i];
|
||||||
}
|
}
|
||||||
pack.data[pack.length-16] = 0;
|
pack.data[pack.length-16] = 0;
|
||||||
|
|
||||||
|
// measure overall datarate
|
||||||
uint32_t elapsedTime = millis() - startTime;
|
uint32_t elapsedTime = millis() - startTime;
|
||||||
dataRate = (pack.length*8.0)/((float)elapsedTime/1000.0);
|
dataRate = (pack.length*8.0)/((float)elapsedTime/1000.0);
|
||||||
|
|
||||||
|
// get packet RSSI
|
||||||
lastPacketRSSI = getLastPacketRSSI();
|
lastPacketRSSI = getLastPacketRSSI();
|
||||||
|
|
||||||
return(ERR_NONE);
|
return(ERR_NONE);
|
||||||
|
|
|
@ -10,20 +10,23 @@ XBee::XBee(Module* module) {
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t XBee::begin(long speed) {
|
uint8_t XBee::begin(long speed) {
|
||||||
|
// set Arduino pins
|
||||||
pinMode(A4, OUTPUT);
|
pinMode(A4, OUTPUT);
|
||||||
pinMode(A5, OUTPUT);
|
pinMode(A5, OUTPUT);
|
||||||
//pinMode(3, INPUT);
|
|
||||||
pinMode(3, OUTPUT);
|
pinMode(3, OUTPUT);
|
||||||
digitalWrite(A4, LOW);
|
digitalWrite(A4, LOW);
|
||||||
digitalWrite(A5, LOW);
|
digitalWrite(A5, LOW);
|
||||||
digitalWrite(3, HIGH);
|
digitalWrite(3, HIGH);
|
||||||
|
|
||||||
|
// set module properties
|
||||||
_mod->AtLineFeed = "\r";
|
_mod->AtLineFeed = "\r";
|
||||||
|
|
||||||
_mod->baudrate = speed;
|
_mod->baudrate = speed;
|
||||||
_mod->init(USE_UART, INT_NONE);
|
_mod->init(USE_UART, INT_NONE);
|
||||||
|
|
||||||
|
// empty UART buffer (garbage data)
|
||||||
_mod->ATemptyBuffer();
|
_mod->ATemptyBuffer();
|
||||||
|
|
||||||
|
// enter command mode
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.println("Entering command mode ...");
|
Serial.println("Entering command mode ...");
|
||||||
#endif
|
#endif
|
||||||
|
@ -31,6 +34,7 @@ uint8_t XBee::begin(long speed) {
|
||||||
return(ERR_CMD_MODE_FAILED);
|
return(ERR_CMD_MODE_FAILED);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// test AT setup
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.println("Sending test command ...");
|
Serial.println("Sending test command ...");
|
||||||
#endif
|
#endif
|
||||||
|
@ -38,6 +42,7 @@ uint8_t XBee::begin(long speed) {
|
||||||
return(ERR_AT_FAILED);
|
return(ERR_AT_FAILED);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// exit command mode
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.println("Exiting command mode ...");
|
Serial.println("Exiting command mode ...");
|
||||||
#endif
|
#endif
|
||||||
|
@ -51,6 +56,7 @@ uint8_t XBee::begin(long speed) {
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t XBee::setDestinationAddress(const char destinationAddressHigh[], const char destinationAddressLow[]) {
|
uint8_t XBee::setDestinationAddress(const char destinationAddressHigh[], const char destinationAddressLow[]) {
|
||||||
|
// enter command mode
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.println("Entering command mode ...");
|
Serial.println("Entering command mode ...");
|
||||||
#endif
|
#endif
|
||||||
|
@ -58,6 +64,7 @@ uint8_t XBee::setDestinationAddress(const char destinationAddressHigh[], const c
|
||||||
return(ERR_CMD_MODE_FAILED);
|
return(ERR_CMD_MODE_FAILED);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// set higher address bytes
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.println("Setting address (high) ...");
|
Serial.println("Setting address (high) ...");
|
||||||
#endif
|
#endif
|
||||||
|
@ -67,6 +74,7 @@ uint8_t XBee::setDestinationAddress(const char destinationAddressHigh[], const c
|
||||||
return(ERR_AT_FAILED);
|
return(ERR_AT_FAILED);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// set lower address bytes
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.println("Setting address (low) ...");
|
Serial.println("Setting address (low) ...");
|
||||||
#endif
|
#endif
|
||||||
|
@ -76,6 +84,7 @@ uint8_t XBee::setDestinationAddress(const char destinationAddressHigh[], const c
|
||||||
return(ERR_AT_FAILED);
|
return(ERR_AT_FAILED);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// exit command mode
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.println("Exiting command mode ...");
|
Serial.println("Exiting command mode ...");
|
||||||
#endif
|
#endif
|
||||||
|
@ -87,6 +96,7 @@ uint8_t XBee::setDestinationAddress(const char destinationAddressHigh[], const c
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t XBee::setPanId(const char panId[]) {
|
uint8_t XBee::setPanId(const char panId[]) {
|
||||||
|
// enter command mode
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.println("Entering command mode ...");
|
Serial.println("Entering command mode ...");
|
||||||
#endif
|
#endif
|
||||||
|
@ -94,6 +104,7 @@ uint8_t XBee::setPanId(const char panId[]) {
|
||||||
return(ERR_CMD_MODE_FAILED);
|
return(ERR_CMD_MODE_FAILED);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// set PAN ID
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.println("Setting PAN ID ...");
|
Serial.println("Setting PAN ID ...");
|
||||||
#endif
|
#endif
|
||||||
|
@ -103,6 +114,7 @@ uint8_t XBee::setPanId(const char panId[]) {
|
||||||
return(ERR_AT_FAILED);
|
return(ERR_AT_FAILED);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// exit command mode
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
Serial.println("Exiting command mode ...");
|
Serial.println("Exiting command mode ...");
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Add table
Reference in a new issue