diff --git a/_s_x1231_8h_source.html b/_s_x1231_8h_source.html index 862acb3d..2427863c 100644 --- a/_s_x1231_8h_source.html +++ b/_s_x1231_8h_source.html @@ -111,101 +111,102 @@ $(document).ready(function(){initNavTree('_s_x1231_8h_source.html',''); initResi
11#define RADIOLIB_SX123X_CHIP_REVISION_2_A 0x21
12#define RADIOLIB_SX123X_CHIP_REVISION_2_B 0x22
13#define RADIOLIB_SX123X_CHIP_REVISION_2_C 0x23
-
14
-
15// RADIOLIB_SX1231 specific register map
-
16#define RADIOLIB_SX1231_REG_TEST_OOK 0x6E
-
17
-
18// RADIOLIB_SX1231_REG_TEST_OOK
-
19#define RADIOLIB_SX1231_OOK_DELTA_THRESHOLD 0x0C
-
20
-
21// RADIOLIB_SX1231_REG_DIO_MAPPING_1
-
22#define RADIOLIB_SX1231_DIO0_CONT_LOW_BAT 0b10000000 // 7 6
-
23#define RADIOLIB_SX1231_DIO0_CONT_MODE_READY 0b11000000 // 7 6
-
24#define RADIOLIB_SX1231_DIO0_CONT_PLL_LOCK 0b00000000 // 7 6
-
25#define RADIOLIB_SX1231_DIO0_CONT_SYNC_ADDRESS 0b00000000 // 7 6
-
26#define RADIOLIB_SX1231_DIO0_CONT_TIMEOUT 0b01000000 // 7 6
-
27#define RADIOLIB_SX1231_DIO0_CONT_RSSI 0b10000000 // 7 6
-
28#define RADIOLIB_SX1231_DIO0_CONT_MODE_READY 0b11000000 // 7 6
-
29#define RADIOLIB_SX1231_DIO0_CONT_TX_READY 0b01000000 // 7 6
-
30#define RADIOLIB_SX1231_DIO0_PACK_LOW_BAT 0b10000000 // 7 6
-
31#define RADIOLIB_SX1231_DIO0_PACK_PLL_LOCK 0b11000000 // 7 6
-
32#define RADIOLIB_SX1231_DIO0_PACK_CRC_OK 0b00000000 // 7 6
-
33#define RADIOLIB_SX1231_DIO0_PACK_PAYLOAD_READY 0b01000000 // 7 6
-
34#define RADIOLIB_SX1231_DIO0_PACK_SYNC_ADDRESS 0b10000000 // 7 6
-
35#define RADIOLIB_SX1231_DIO0_PACK_RSSI 0b11000000 // 7 6
-
36#define RADIOLIB_SX1231_DIO0_PACK_PACKET_SENT 0b00000000 // 7 6
-
37#define RADIOLIB_SX1231_DIO0_PACK_TX_READY 0b01000000 // 7 6
-
38#define RADIOLIB_SX1231_DIO1_CONT_LOW_BAT 0b00100000 // 5 4
-
39#define RADIOLIB_SX1231_DIO1_CONT_PLL_LOCK 0b00110000 // 5 4
-
40#define RADIOLIB_SX1231_DIO1_CONT_DCLK 0b00000000 // 5 4
-
41#define RADIOLIB_SX1231_DIO1_CONT_RX_READY 0b00010000 // 5 4
-
42#define RADIOLIB_SX1231_DIO1_CONT_SYNC_ADDRESS 0b00110000 // 5 4
-
43#define RADIOLIB_SX1231_DIO1_CONT_TX_READY 0b00010000 // 5 4
-
44#define RADIOLIB_SX1231_DIO1_PACK_FIFO_LEVEL 0b00000000 // 5 4
-
45#define RADIOLIB_SX1231_DIO1_PACK_FIFO_FULL 0b00010000 // 5 4
-
46#define RADIOLIB_SX1231_DIO1_PACK_FIFO_NOT_EMPTY 0b00100000 // 5 4
-
47#define RADIOLIB_SX1231_DIO1_PACK_PLL_LOCK 0b00110000 // 5 4
-
48#define RADIOLIB_SX1231_DIO1_PACK_TIMEOUT 0b00110000 // 5 4
-
49#define RADIOLIB_SX1231_DIO2_CONT_DATA 0b00000000 // 3 2
-
50#define RADIOLIB_SX1231_DIO2_PACK_FIFO_NOT_EMPTY 0b00000000 // 3 2
-
51#define RADIOLIB_SX1231_DIO2_PACK_LOW_BAT 0b00001000 // 3 2
-
52#define RADIOLIB_SX1231_DIO2_PACK_AUTO_MODE 0b00001100 // 3 2
-
53#define RADIOLIB_SX1231_DIO2_PACK_DATA 0b00000100 // 3 2
-
54#define RADIOLIB_SX1231_DIO3_CONT_AUTO_MODE 0b00000010 // 0 1
-
55#define RADIOLIB_SX1231_DIO3_CONT_RSSI 0b00000000 // 0 1
-
56#define RADIOLIB_SX1231_DIO3_CONT_RX_READY 0b00000001 // 0 1
-
57#define RADIOLIB_SX1231_DIO3_CONT_TIMEOUT 0b00000011 // 0 1
-
58#define RADIOLIB_SX1231_DIO3_CONT_TX_READY 0b00000001 // 0 1
-
59#define RADIOLIB_SX1231_DIO3_PACK_FIFO_FULL 0b00000000 // 0 1
-
60#define RADIOLIB_SX1231_DIO3_PACK_LOW_BAT 0b00000010 // 0 1
-
61#define RADIOLIB_SX1231_DIO3_PACK_PLL_LOCK 0b00000011 // 0 1
-
62#define RADIOLIB_SX1231_DIO3_PACK_RSSI 0b00000001 // 0 1
-
63#define RADIOLIB_SX1231_DIO3_PACK_SYNC_ADDRESSS 0b00000010 // 0 1
-
64#define RADIOLIB_SX1231_DIO3_PACK_TX_READY 0b00000001 // 0 1
-
65
-
66// RADIOLIB_SX1231_REG_DIO_MAPPING_2
-
67#define RADIOLIB_SX1231_DIO4_CONT_LOW_BAT 0b10000000 // 7 6
-
68#define RADIOLIB_SX1231_DIO4_CONT_PLL_LOCK 0b11000000 // 7 6
-
69#define RADIOLIB_SX1231_DIO4_CONT_TIMEOUT 0b00000000 // 7 6
-
70#define RADIOLIB_SX1231_DIO4_CONT_RX_READY 0b01000000 // 7 6
-
71#define RADIOLIB_SX1231_DIO4_CONT_SYNC_ADDRESS 0b10000000 // 7 6
-
72#define RADIOLIB_SX1231_DIO4_CONT_TX_READY 0b01000000 // 7 6
-
73#define RADIOLIB_SX1231_DIO4_PACK_LOW_BAT 0b10000000 // 7 6
-
74#define RADIOLIB_SX1231_DIO4_PACK_PLL_LOCK 0b11000000 // 7 6
-
75#define RADIOLIB_SX1231_DIO4_PACK_TIMEOUT 0b00000000 // 7 6
-
76#define RADIOLIB_SX1231_DIO4_PACK_RSSI 0b01000000 // 7 6
-
77#define RADIOLIB_SX1231_DIO4_PACK_RX_READY 0b10000000 // 7 6
-
78#define RADIOLIB_SX1231_DIO4_PACK_MODE_READY 0b00000000 // 7 6
-
79#define RADIOLIB_SX1231_DIO4_PACK_TX_READY 0b01000000 // 7 6
-
80#define RADIOLIB_SX1231_DIO5_CONT_LOW_BAT 0b00100000 // 5 4
-
81#define RADIOLIB_SX1231_DIO5_CONT_MODE_READY 0b00110000 // 5 4
-
82#define RADIOLIB_SX1231_DIO5_CONT_CLK_OUT 0b00000000 // 5 4
-
83#define RADIOLIB_SX1231_DIO5_CONT_RSSI 0b00010000 // 5 4
-
84#define RADIOLIB_SX1231_DIO5_PACK_LOW_BAT 0b00100000 // 5 4
-
85#define RADIOLIB_SX1231_DIO5_PACK_MODE_READY 0b00110000 // 5 4
-
86#define RADIOLIB_SX1231_DIO5_PACK_CLK_OUT 0b00000000 // 5 4
-
87#define RADIOLIB_SX1231_DIO5_PACK_DATA 0b00010000 // 5 4
-
88
-
-
93class SX1231: public RF69 {
-
94 public:
-
99 SX1231(Module* mod); // cppcheck-suppress noExplicitConstructor
-
100
-
111 virtual int16_t begin(float freq = 434.0, float br = 4.8, float freqDev = 5.0, float rxBw = 125.0, int8_t power = 10, uint8_t preambleLen = 16);
-
112
-
113#if !RADIOLIB_GODMODE
-
114 protected:
-
115#endif
-
116 uint8_t chipRevision = 0;
-
117};
+
14#define RADIOLIB_SX123X_CHIP_REVISION_2_D 0x24
+
15
+
16// RADIOLIB_SX1231 specific register map
+
17#define RADIOLIB_SX1231_REG_TEST_OOK 0x6E
+
18
+
19// RADIOLIB_SX1231_REG_TEST_OOK
+
20#define RADIOLIB_SX1231_OOK_DELTA_THRESHOLD 0x0C
+
21
+
22// RADIOLIB_SX1231_REG_DIO_MAPPING_1
+
23#define RADIOLIB_SX1231_DIO0_CONT_LOW_BAT 0b10000000 // 7 6
+
24#define RADIOLIB_SX1231_DIO0_CONT_MODE_READY 0b11000000 // 7 6
+
25#define RADIOLIB_SX1231_DIO0_CONT_PLL_LOCK 0b00000000 // 7 6
+
26#define RADIOLIB_SX1231_DIO0_CONT_SYNC_ADDRESS 0b00000000 // 7 6
+
27#define RADIOLIB_SX1231_DIO0_CONT_TIMEOUT 0b01000000 // 7 6
+
28#define RADIOLIB_SX1231_DIO0_CONT_RSSI 0b10000000 // 7 6
+
29#define RADIOLIB_SX1231_DIO0_CONT_MODE_READY 0b11000000 // 7 6
+
30#define RADIOLIB_SX1231_DIO0_CONT_TX_READY 0b01000000 // 7 6
+
31#define RADIOLIB_SX1231_DIO0_PACK_LOW_BAT 0b10000000 // 7 6
+
32#define RADIOLIB_SX1231_DIO0_PACK_PLL_LOCK 0b11000000 // 7 6
+
33#define RADIOLIB_SX1231_DIO0_PACK_CRC_OK 0b00000000 // 7 6
+
34#define RADIOLIB_SX1231_DIO0_PACK_PAYLOAD_READY 0b01000000 // 7 6
+
35#define RADIOLIB_SX1231_DIO0_PACK_SYNC_ADDRESS 0b10000000 // 7 6
+
36#define RADIOLIB_SX1231_DIO0_PACK_RSSI 0b11000000 // 7 6
+
37#define RADIOLIB_SX1231_DIO0_PACK_PACKET_SENT 0b00000000 // 7 6
+
38#define RADIOLIB_SX1231_DIO0_PACK_TX_READY 0b01000000 // 7 6
+
39#define RADIOLIB_SX1231_DIO1_CONT_LOW_BAT 0b00100000 // 5 4
+
40#define RADIOLIB_SX1231_DIO1_CONT_PLL_LOCK 0b00110000 // 5 4
+
41#define RADIOLIB_SX1231_DIO1_CONT_DCLK 0b00000000 // 5 4
+
42#define RADIOLIB_SX1231_DIO1_CONT_RX_READY 0b00010000 // 5 4
+
43#define RADIOLIB_SX1231_DIO1_CONT_SYNC_ADDRESS 0b00110000 // 5 4
+
44#define RADIOLIB_SX1231_DIO1_CONT_TX_READY 0b00010000 // 5 4
+
45#define RADIOLIB_SX1231_DIO1_PACK_FIFO_LEVEL 0b00000000 // 5 4
+
46#define RADIOLIB_SX1231_DIO1_PACK_FIFO_FULL 0b00010000 // 5 4
+
47#define RADIOLIB_SX1231_DIO1_PACK_FIFO_NOT_EMPTY 0b00100000 // 5 4
+
48#define RADIOLIB_SX1231_DIO1_PACK_PLL_LOCK 0b00110000 // 5 4
+
49#define RADIOLIB_SX1231_DIO1_PACK_TIMEOUT 0b00110000 // 5 4
+
50#define RADIOLIB_SX1231_DIO2_CONT_DATA 0b00000000 // 3 2
+
51#define RADIOLIB_SX1231_DIO2_PACK_FIFO_NOT_EMPTY 0b00000000 // 3 2
+
52#define RADIOLIB_SX1231_DIO2_PACK_LOW_BAT 0b00001000 // 3 2
+
53#define RADIOLIB_SX1231_DIO2_PACK_AUTO_MODE 0b00001100 // 3 2
+
54#define RADIOLIB_SX1231_DIO2_PACK_DATA 0b00000100 // 3 2
+
55#define RADIOLIB_SX1231_DIO3_CONT_AUTO_MODE 0b00000010 // 0 1
+
56#define RADIOLIB_SX1231_DIO3_CONT_RSSI 0b00000000 // 0 1
+
57#define RADIOLIB_SX1231_DIO3_CONT_RX_READY 0b00000001 // 0 1
+
58#define RADIOLIB_SX1231_DIO3_CONT_TIMEOUT 0b00000011 // 0 1
+
59#define RADIOLIB_SX1231_DIO3_CONT_TX_READY 0b00000001 // 0 1
+
60#define RADIOLIB_SX1231_DIO3_PACK_FIFO_FULL 0b00000000 // 0 1
+
61#define RADIOLIB_SX1231_DIO3_PACK_LOW_BAT 0b00000010 // 0 1
+
62#define RADIOLIB_SX1231_DIO3_PACK_PLL_LOCK 0b00000011 // 0 1
+
63#define RADIOLIB_SX1231_DIO3_PACK_RSSI 0b00000001 // 0 1
+
64#define RADIOLIB_SX1231_DIO3_PACK_SYNC_ADDRESSS 0b00000010 // 0 1
+
65#define RADIOLIB_SX1231_DIO3_PACK_TX_READY 0b00000001 // 0 1
+
66
+
67// RADIOLIB_SX1231_REG_DIO_MAPPING_2
+
68#define RADIOLIB_SX1231_DIO4_CONT_LOW_BAT 0b10000000 // 7 6
+
69#define RADIOLIB_SX1231_DIO4_CONT_PLL_LOCK 0b11000000 // 7 6
+
70#define RADIOLIB_SX1231_DIO4_CONT_TIMEOUT 0b00000000 // 7 6
+
71#define RADIOLIB_SX1231_DIO4_CONT_RX_READY 0b01000000 // 7 6
+
72#define RADIOLIB_SX1231_DIO4_CONT_SYNC_ADDRESS 0b10000000 // 7 6
+
73#define RADIOLIB_SX1231_DIO4_CONT_TX_READY 0b01000000 // 7 6
+
74#define RADIOLIB_SX1231_DIO4_PACK_LOW_BAT 0b10000000 // 7 6
+
75#define RADIOLIB_SX1231_DIO4_PACK_PLL_LOCK 0b11000000 // 7 6
+
76#define RADIOLIB_SX1231_DIO4_PACK_TIMEOUT 0b00000000 // 7 6
+
77#define RADIOLIB_SX1231_DIO4_PACK_RSSI 0b01000000 // 7 6
+
78#define RADIOLIB_SX1231_DIO4_PACK_RX_READY 0b10000000 // 7 6
+
79#define RADIOLIB_SX1231_DIO4_PACK_MODE_READY 0b00000000 // 7 6
+
80#define RADIOLIB_SX1231_DIO4_PACK_TX_READY 0b01000000 // 7 6
+
81#define RADIOLIB_SX1231_DIO5_CONT_LOW_BAT 0b00100000 // 5 4
+
82#define RADIOLIB_SX1231_DIO5_CONT_MODE_READY 0b00110000 // 5 4
+
83#define RADIOLIB_SX1231_DIO5_CONT_CLK_OUT 0b00000000 // 5 4
+
84#define RADIOLIB_SX1231_DIO5_CONT_RSSI 0b00010000 // 5 4
+
85#define RADIOLIB_SX1231_DIO5_PACK_LOW_BAT 0b00100000 // 5 4
+
86#define RADIOLIB_SX1231_DIO5_PACK_MODE_READY 0b00110000 // 5 4
+
87#define RADIOLIB_SX1231_DIO5_PACK_CLK_OUT 0b00000000 // 5 4
+
88#define RADIOLIB_SX1231_DIO5_PACK_DATA 0b00010000 // 5 4
+
89
+
+
94class SX1231: public RF69 {
+
95 public:
+
100 SX1231(Module* mod); // cppcheck-suppress noExplicitConstructor
+
101
+
112 virtual int16_t begin(float freq = 434.0, float br = 4.8, float freqDev = 5.0, float rxBw = 125.0, int8_t power = 10, uint8_t preambleLen = 16);
+
113
+
114#if !RADIOLIB_GODMODE
+
115 protected:
+
116#endif
+
117 uint8_t chipRevision = 0;
+
118};
-
118
-
119#endif
-
120
-
121#endif
+
119
+
120#endif
+
121
+
122#endif
Module
Implements all common low-level methods to control the wireless module. Every module class contains o...
Definition Module.h:73
RF69
Control class for RF69 module. Also serves as base class for SX1231.
Definition RF69.h:479
-
SX1231
Control class for SX1231 module. Overrides some methods from RF69 due to different register values.
Definition SX1231.h:93
+
SX1231
Control class for SX1231 module. Overrides some methods from RF69 due to different register values.
Definition SX1231.h:94
SX1231::begin
virtual int16_t begin(float freq=434.0, float br=4.8, float freqDev=5.0, float rxBw=125.0, int8_t power=10, uint8_t preambleLen=16)
Initialization method.
Definition SX1231.cpp:8
diff --git a/_s_x1233_8h_source.html b/_s_x1233_8h_source.html index 24b6f9d2..5eff4c84 100644 --- a/_s_x1233_8h_source.html +++ b/_s_x1233_8h_source.html @@ -136,9 +136,9 @@ $(document).ready(function(){initNavTree('_s_x1233_8h_source.html',''); initResi
60
61#endif
Module
Implements all common low-level methods to control the wireless module. Every module class contains o...
Definition Module.h:73
-
SX1231
Control class for SX1231 module. Overrides some methods from RF69 due to different register values.
Definition SX1231.h:93
+
SX1231
Control class for SX1231 module. Overrides some methods from RF69 due to different register values.
Definition SX1231.h:94
SX1233
Control class for SX1233 module. Overrides some methods from SX1231/RF69 due to different register va...
Definition SX1233.h:23
-
SX1233::setBitRate
int16_t setBitRate(float br) override
Sets bit rate. Allowed values range from 0.5 to 300.0 kbps. SX1233 also allows 500 kbps and 600 kbps ...
Definition SX1233.cpp:93
+
SX1233::setBitRate
int16_t setBitRate(float br) override
Sets bit rate. Allowed values range from 0.5 to 300.0 kbps. SX1233 also allows 500 kbps and 600 kbps ...
Definition SX1233.cpp:96
SX1233::begin
int16_t begin(float freq=434.0, float br=4.8, float freqDev=5.0, float rxBw=125.0, int8_t power=10, uint8_t preambleLen=16) override
Initialization method.
Definition SX1233.cpp:9