Merge pull request #279 from rfquack/master
New .gitignore pattern, CC1101 streaming mode, RF69 SPI get/set/read/write overrides
This commit is contained in:
commit
070b4f5f83
5 changed files with 120 additions and 24 deletions
3
.gitignore
vendored
3
.gitignore
vendored
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@ -11,3 +11,6 @@
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# Debug decoder
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extras/decoder/log.txt
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extras/decoder/out.txt
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# PlatformIO
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.pio*
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@ -262,19 +262,32 @@ int16_t CC1101::startTransmit(uint8_t* data, size_t len, uint8_t addr) {
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int16_t state = SPIsetRegValue(CC1101_REG_IOCFG0, CC1101_GDOX_SYNC_WORD_SENT_OR_RECEIVED);
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RADIOLIB_ASSERT(state);
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// data put on FIFO.
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uint8_t dataSent = 0;
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// optionally write packet length
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if (_packetLengthConfig == CC1101_LENGTH_CONFIG_VARIABLE) {
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// enforce variable len limit.
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if (len > CC1101_MAX_PACKET_LENGTH - 1) {
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return (ERR_PACKET_TOO_LONG);
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}
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SPIwriteRegister(CC1101_REG_FIFO, len);
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dataSent += 1;
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}
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// check address filtering
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uint8_t filter = SPIgetRegValue(CC1101_REG_PKTCTRL1, 1, 0);
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if(filter != CC1101_ADR_CHK_NONE) {
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SPIwriteRegister(CC1101_REG_FIFO, addr);
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dataSent += 1;
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}
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// write packet to FIFO
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SPIwriteRegisterBurst(CC1101_REG_FIFO, data, len);
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// fill the FIFO.
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uint8_t initialWrite = min((uint8_t)len, (uint8_t)(CC1101_FIFO_SIZE - dataSent));
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SPIwriteRegisterBurst(CC1101_REG_FIFO, data, initialWrite);
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dataSent += initialWrite;
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// set RF switch (if present)
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_mod->setRfSwitchState(LOW, HIGH);
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@ -282,6 +295,28 @@ int16_t CC1101::startTransmit(uint8_t* data, size_t len, uint8_t addr) {
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// set mode to transmit
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SPIsendCommand(CC1101_CMD_TX);
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// keep feeding the FIFO until the packet is over.
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while (dataSent < len) {
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// get number of bytes in FIFO.
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uint8_t bytesInFIFO = SPIgetRegValue(CC1101_REG_TXBYTES, 6, 0);
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// if there's room then put other data.
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if (bytesInFIFO < CC1101_FIFO_SIZE) {
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uint8_t bytesToWrite = min((uint8_t)(CC1101_FIFO_SIZE - bytesInFIFO), (uint8_t)(len - dataSent));
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SPIwriteRegisterBurst(CC1101_REG_FIFO, &data[dataSent], bytesToWrite);
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dataSent += bytesToWrite;
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} else {
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// wait for radio to send some data.
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/*
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* Does this work for all rates? If 1 ms is longer than the 1ms delay
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* then the entire FIFO will be transmitted during that delay.
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*
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* TODO: test this on real hardware
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*/
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delayMicroseconds(250);
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}
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}
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return (state);
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}
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@ -292,8 +327,9 @@ int16_t CC1101::startReceive() {
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// flush Rx FIFO
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SPIsendCommand(CC1101_CMD_FLUSH_RX);
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// set GDO0 mapping
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int state = SPIsetRegValue(CC1101_REG_IOCFG0, CC1101_GDOX_SYNC_WORD_SENT_OR_RECEIVED);
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// set GDO0 mapping: Asserted when RX FIFO > 4 bytes.
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int16_t state = SPIsetRegValue(CC1101_REG_IOCFG0, CC1101_GDOX_RX_FIFO_FULL_OR_PKT_END);
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state |= SPIsetRegValue(CC1101_REG_FIFOTHR, CC1101_FIFO_THR_TX_61_RX_4, 3, 0);
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RADIOLIB_ASSERT(state);
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// set RF switch (if present)
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@ -309,7 +345,7 @@ int16_t CC1101::readData(uint8_t* data, size_t len) {
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// get packet length
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size_t length = len;
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if (len == CC1101_MAX_PACKET_LENGTH) {
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length = getPacketLength();
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length = getPacketLength(true);
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}
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// check address filtering
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@ -318,9 +354,45 @@ int16_t CC1101::readData(uint8_t* data, size_t len) {
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SPIreadRegister(CC1101_REG_FIFO);
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}
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// read packet data
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SPIreadRegisterBurst(CC1101_REG_FIFO, length, data);
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uint8_t bytesInFIFO = SPIgetRegValue(CC1101_REG_RXBYTES, 6, 0);
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size_t readBytes = 0;
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uint32_t lastPop = millis();
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// keep reading from FIFO until we get all the packet.
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while (readBytes < length) {
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if (bytesInFIFO == 0) {
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if (millis() - lastPop > 5) {
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// readData was required to read a packet longer than the one received.
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RADIOLIB_DEBUG_PRINTLN(F("No data for more than 5mS. Stop here."));
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break;
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} else {
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/*
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* Does this work for all rates? If 1 ms is longer than the 1ms delay
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* then the entire FIFO will be transmitted during that delay.
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*
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* TODO: drop this delay(1) or come up with a better solution:
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*/
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delay(1);
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bytesInFIFO = SPIgetRegValue(CC1101_REG_RXBYTES, 6, 0);
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continue;
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}
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}
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// read the minimum between "remaining length" and bytesInFifo
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uint8_t bytesToRead = min((uint8_t)(length - readBytes), bytesInFIFO);
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SPIreadRegisterBurst(CC1101_REG_FIFO, bytesToRead, &(data[readBytes]));
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readBytes += bytesToRead;
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lastPop = millis();
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// Get how many bytes are left in FIFO.
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bytesInFIFO = SPIgetRegValue(CC1101_REG_RXBYTES, 6, 0);
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}
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// check if status bytes are enabled (default: CC1101_APPEND_STATUS_ON)
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bool isAppendStatus = SPIgetRegValue(CC1101_REG_PKTCTRL1, 2, 2) == CC1101_APPEND_STATUS_ON;
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// If status byte is enabled at least 2 bytes (2 status bytes + any following packet) will remain in FIFO.
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if (bytesInFIFO >= 2 && isAppendStatus) {
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// read RSSI byte
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_rawRSSI = SPIgetRegValue(CC1101_REG_FIFO);
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@ -328,18 +400,23 @@ int16_t CC1101::readData(uint8_t* data, size_t len) {
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uint8_t val = SPIgetRegValue(CC1101_REG_FIFO);
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_rawLQI = val & 0x7F;
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// flush Rx FIFO
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SPIsendCommand(CC1101_CMD_FLUSH_RX);
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// check CRC
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if (_crcOn && (val & CC1101_CRC_OK) == CC1101_CRC_ERROR) {
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return (ERR_CRC_MISMATCH);
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}
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}
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// clear internal flag so getPacketLength can return the new packet length
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_packetLengthQueried = false;
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// Flush then standby according to RXOFF_MODE (default: CC1101_RXOFF_IDLE)
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if (SPIgetRegValue(CC1101_REG_MCSM1, 3, 2) == CC1101_RXOFF_IDLE) {
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// flush Rx FIFO
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SPIsendCommand(CC1101_CMD_FLUSH_RX);
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// set mode to standby
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standby();
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// check CRC
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if (_crcOn && (val & 0b10000000) == 0b00000000) {
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return (ERR_CRC_MISMATCH);
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}
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return(ERR_NONE);
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@ -609,7 +686,6 @@ int16_t CC1101::setOOK(bool enableOOK) {
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state = SPIsetRegValue(CC1101_REG_FREND0, 1, 2, 0);
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RADIOLIB_ASSERT(state);
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// update current modulation
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_modulation = CC1101_MOD_FORMAT_ASK_OOK;
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} else {
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@ -628,7 +704,6 @@ int16_t CC1101::setOOK(bool enableOOK) {
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return(setOutputPower(_power));
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}
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float CC1101::getRSSI() const {
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float rssi;
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if(_rawRSSI >= 128) {
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@ -715,9 +790,15 @@ int16_t CC1101::setPromiscuousMode(bool promiscuous) {
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state = setCrcFiltering(true);
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}
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_promiscuous = promiscuous;
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return(state);
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}
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bool CC1101::getPromiscuousMode() {
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return (_promiscuous);
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}
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int16_t CC1101::setDataShaping(uint8_t sh) {
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// set mode to standby
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int16_t state = standby();
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@ -8,9 +8,10 @@
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// CC1101 physical layer properties
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#define CC1101_FREQUENCY_STEP_SIZE 396.7285156
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#define CC1101_MAX_PACKET_LENGTH 63
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#define CC1101_MAX_PACKET_LENGTH 255
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#define CC1101_CRYSTAL_FREQ 26.0
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#define CC1101_DIV_EXPONENT 16
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#define CC1101_FIFO_SIZE 64
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// CC1101 SPI commands
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#define CC1101_CMD_READ 0b10000000
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#define CC1101_RX_ATTEN_6_DB 0b00010000 // 5 4 6 dB
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#define CC1101_RX_ATTEN_12_DB 0b00100000 // 5 4 12 dB
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#define CC1101_RX_ATTEN_18_DB 0b00110000 // 5 4 18 dB
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#define CC1101_FIFO_THR 0b00000111 // 5 4 Rx FIFO threshold [bytes] = CC1101_FIFO_THR * 4; Tx FIFO threshold [bytes] = 65 - (CC1101_FIFO_THR * 4)
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#define CC1101_FIFO_THR_TX_61_RX_4 0b00000000 // 3 0 TX fifo threshold: 61, RX fifo threshold: 4
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// CC1101_REG_SYNC1
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#define CC1101_SYNC_WORD_MSB 0xD3 // 7 0 sync word MSB
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@ -599,9 +600,9 @@ class CC1101: public PhysicalLayer {
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\param func ISR to call.
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\param dir Signal change direction. Defaults to FALLING.
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\param dir Signal change direction. Defaults to RISING.
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*/
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void setGdo0Action(void (*func)(void), RADIOLIB_INTERRUPT_STATUS dir = FALLING);
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void setGdo0Action(void (*func)(void), RADIOLIB_INTERRUPT_STATUS dir = RISING);
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/*!
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\brief Clears interrupt service routine to call when GDO0 activates.
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@ -846,6 +847,13 @@ class CC1101: public PhysicalLayer {
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*/
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int16_t setPromiscuousMode(bool promiscuous = true);
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/*!
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\brief Get whether the modem is in promiscuous mode: no packet filtering (e.g., no preamble, sync word, address, CRC).
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\returns Whether the modem is in promiscuous mode
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*/
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bool getPromiscuousMode();
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/*!
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\brief Sets Gaussian filter bandwidth-time product that will be used for data shaping.
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Allowed value is RADIOLIB_SHAPING_0_5. Set to RADIOLIB_SHAPING_NONE to disable data shaping.
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@ -407,6 +407,9 @@ int16_t RF69::setFrequency(float freq) {
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_mod->SPIwriteRegister(RF69_REG_FRF_MSB, (FRF & 0xFF0000) >> 16);
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_mod->SPIwriteRegister(RF69_REG_FRF_MID, (FRF & 0x00FF00) >> 8);
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_mod->SPIwriteRegister(RF69_REG_FRF_LSB, FRF & 0x0000FF);
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_freq = freq;
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return(ERR_NONE);
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}
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@ -878,6 +878,7 @@ class RF69: public PhysicalLayer {
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protected:
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#endif
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float _freq = 0;
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float _br = 0;
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float _rxBw = 0;
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bool _ook = false;
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